JPH0571113B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a computer graphics display device, in particular, a computer graphics display device in which different image signals are stored in a plurality of frame buffers, and these frame buffers are sequentially read out to display a moving image. Related to display devices.

[Conventional technology]

In the field of computer graphics display devices, it is known to display moving images on a display. For example, as disclosed in Japanese Patent Publication No. 53-26952, two buffer memories are provided,
While an image stored in one memory is being displayed, the next image is stored in the other memory, and these operations are alternately repeated to display a moving image. Such a method is known as a double buffer method, and it produces a so-called strobe effect. Due to this strobe effect, moving objects appear intermittently to the viewer, making the display unnatural.

[Problem that the invention seeks to solve]

The present invention is intended to improve the influence of a strobe effect when displaying a moving image using the double buffer method.

[Means for solving problems]

The display device of the present invention has first and second frames.
The image signals are sequentially stored in the buffer, the first and second selection circuits, and the first and second frame buffers, and the output output signals of the first and second frame buffers are sent to the first and second selection circuits, respectively. a first multiplication circuit that multiplies the output signal of the first selection circuit and the first digital value; and a control means that multiplies the output signal of the second selection circuit and the second digital value. a 2 multiplication circuit; an addition circuit that adds the output signals of the first and second multiplication circuits;
A display device that performs display based on the output signal of the adder circuit is provided.

[Effect]

In the present invention, screens are sequentially stored in the first and second frame buffers as time passes, and
Read out. For example, the first selection circuit always selects the current screen, and the second selection circuit always selects the immediately previous screen. The output signal of the adder circuit is a combination of the current and previous screen, but if the first digital value is larger than the second digital value, the current screen component will be larger. Therefore, the screen immediately before the small component creates an afterimage effect, making the moving object appear continuous.

〔Example〕

Hereinafter, preferred embodiments of the present invention will be described with reference to the accompanying drawings. The bus (including data lines, address lines, and control lines) 10 includes a central processing unit (CPU).
12. Large capacity memory 14 such as a fixed disk device,
Display control circuit 16 and frame buffers 18 and 20 are connected. Note that the CPU 12 and the display control circuit 16 constitute a control means. Also, the frame buffers 18 and 20 are bit map buffers 18 and 20.
The number of planes is determined according to display color and brightness requirements. As these frame buffers, for example, dual port memories (memories that can be read while being written to) can be used. The bus 10 also includes input/output devices (I/O).
A host computer 24 is connected via 22. Multiplexer (MUX) 2 which is a selection circuit
6 and 28 are frame buffers 18 and 2, respectively.
Select one output signal of 0. The digital multiplication circuit 30 combines the first digital value from the display control circuit with
Multiplication is performed with the output signal of MUX26. The complement circuit 32 obtains a second digital value which is the two's complement of the first digital value, and the digital multiplication circuit 34 multiplies this second digital value by the output signal of the MUX 28. The addition circuit 36 calculates the sum of the output signals of the multiplication circuits 30 and 34, and uses the sum as an image signal for the display 38. Display 38 is a flat display device such as a raster scan type CRT, liquid crystal, or plasma. Note that the display control circuit 16 controls the frame
write/read operations of buffers 18 and 20;
It controls the selection operations of the MUXs 26 and 28, the timing of the display 38, etc.

Next, the operation of this embodiment will be explained in detail. First, under the control of the CPU 12, image information necessary to display a moving image is transferred to the host computer 24.
from there to the large capacity memory 14. Next CPU1
2 and the display control circuit 16 perform the following operations. First, a first screen and a second screen are written and read into frame buffers 18 and 20, respectively.
MUX26 always selects the current screen and
8 is set to always select the immediately previous screen, MUXs 26 and 28 select frame buffers 20 and 18, respectively. (Since the second screen is the next after the first screen, the first screen becomes the previous screen.) The multiplier of the multiplication circuit 30 for the current screen (the first
The digital value) is the multiplication circuit 3 for the previous screen.
Since it is set larger than the multiplier of 4 (second digital value), the output signal of the adding circuit 36 is larger than the screen component immediately before the current screen component.
When the display 38 controls brightness in an analog manner, such as in a raster scanning CRT, the output signal of the adder circuit 36 is converted into an analog signal by a digital-to-analog converter to control the electron beam of the CRT.

When the third screen is then written from the mass memory 14 to the frame buffer 18, the frame buffer 18 stores the current screen and the frame buffer 20 stores the previous screen. Therefore, MUX 26 and 28 are frame buffer 1.
8 and 20, respectively, and perform the same operation as described above. Furthermore, the 4th screen is set to frame buffer 2.
When written to 0, MUXs 26 and 28 select frame buffers 20 and 18, respectively. Thereafter, the same operation is repeated. Note that in this embodiment, frame buffers 18 and 20 are dual port memories.

By the way, since the multiplication circuits 30 and 34 each multiply two digital signals, the number of bits of the output signal increases. If the number of bits required by the display 38 is less than the number of output bits of the multiplication circuit, the upper bits of this output signal may be used. However, in order to obtain a natural afterimage effect,
Addition circuit 36 is the sum of the multipliers of multiplication circuits 30 and 34.
It is better to divide the output signal of . At this time, if the sum of the multipliers is an n number of 2 (n is a positive integer), if the output signal of the adder circuit 36 is shifted by n digits toward the lower bits, that is, if the lower bits are truncated,
This means dividing by the sum of the multipliers. In order to set the sum of the multipliers to the nth power of 2 in this way, in the illustrated embodiment, the complement circuit 32 is used to convert the multiplier of the multiplier circuit 34, which is the second digital value, to the multiplier of the multiplier circuit 30, which is the first digital value. It is a two's complement number. However, the function of the complement circuit 32 may be provided in the CPU 12, and the display control circuit 16 may supply the first and second digital values, which are two's complements, to the multiplication circuits 30 and 34, respectively.

Although the preferred embodiments of the present invention have been described above, various modifications can be made without departing from the gist of the present invention. For example, instead of shifting the output signal of the adder circuit 36 (truncating the lower bits), a division circuit may be provided to perform the division. Also, when using normal RAM (RAM that cannot be written and read at the same time) instead of dual port memory for the frame buffer, three frame buffers are used, and two frame buffers are used for reading. The third frame buffer may write the next screen while the third frame buffer is in use.

[Effects of the Invention] As described above, according to the present invention, the current screen and the immediately previous screen are combined at a predetermined ratio to obtain an afterimage effect, thereby reducing the strobe effect and producing continuous moving videos. can get. Furthermore, the present invention can be used for translucent display, that is, a display in which the screen of one frame buffer can be seen through the screen of the other frame buffer, with the present invention expanding its range of applications.

[Brief explanation of the drawing]

The accompanying drawings are block diagrams of preferred embodiments of the present invention. In the figure, 12 and 16 are control means, 18 and 20 are frame buffers, 26 and 28 are selection circuits, 30 and 34 are multiplication circuits, 36 is an addition circuit, and 38 is a display.

Claims (1)

[Claims] 1 first and second frame buffers, first and second selection circuits, and the first and second frame buffers;
The image signals are sequentially stored in the buffer, and the first and second selection circuits are stored in the first and second selection circuits, respectively.
control means for alternately selecting one of the output signals of the frame buffer; a first multiplication circuit for multiplying the output signal of the first selection circuit and a first digital value; a second multiplication circuit that multiplies two digital values;
and a display device comprising: an adder circuit that adds the output signals of the second multiplier circuit; and a display device that performs display based on the output signal of the adder circuit.