JPH057669Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to a detection circuit that detects when a person intrudes into an intrusion monitoring area and outputs an intrusion detection signal.

[Prior art] It is determined whether an object that has entered an intrusion monitoring area is a human or a non-human object, such as an insect, and when an object other than a human has entered, an intrusion detection signal is not output. A known circuit is one that outputs an intrusion detection signal only when an exit signal is detected within a certain period of time after an intrusion signal is obtained at the time of an intrusion.

A conventional detection circuit of this type is shown in FIG. Third
The figure is a block diagram of a conventional detection circuit.
2 is an intrusion detection circuit that detects when an object enters the intrusion monitoring area; 2 is an exit detection circuit that detects the exit when an object leaves the intrusion monitoring area; 3 is when the intrusion detection circuit detects an intrusion. An intrusion pulse generator that generates pulses, 4 a pulse signal holding circuit that holds the pulses generated from the intrusion pulse generator 3 for a certain period of time, and 5 a pulse signal holding circuit 4
6 is an exit pulse generator that outputs an exit pulse when the exit detector 2 detects exit, and 7 is a pulse signal holding circuit. 4 is an AND circuit which outputs an intrusion detection signal when an exit pulse is output from the exit pulse generator 6 within the time period in which the pulse is held.

Next, the operation of the conventional detection circuit configured as described above will be explained with reference to the waveform diagram of each part shown in FIG.

First, when the intrusion detector 1 detects an intrusion, the intrusion pulse generator 3 outputs an intrusion pulse _P1 as shown in FIG. 4a.

This intrusion pulse _P1 is held as a holding pulse _P2 in the pulse signal holding circuit 4 for a certain period of time measured by the timer circuit 5 as shown in FIG. 4B. At this time, it is assumed that the exit detector 2 detects two pulses as the exit pulse _P3 as shown in FIG. 4c. Here, the AND circuit 7 is the pulse signal holding circuit 4
When an exit pulse is output within the time period in which the hold pulse is held, that is, only in the case of the first exit pulse as shown in _FIG . Output.

In this way, if an intrusion signal and an exit signal are detected, and an intrusion detection signal is output only when an exit signal is detected within a certain period of time after the intrusion signal is detected, it is possible to detect when an insect other than a person enters the intrusion monitoring area. It is possible to considerably reduce false alarms of intrusion detection signals output when

[Problems to be solved by the invention] However, in conventional detection circuits, a timer circuit consisting of a pulse generation circuit, a counting circuit for counting pulses, etc. is used as a pulse holding circuit, and IC components are used. Even when used, the power consumption was large and the cost was high.

This invention was made to solve the above problems, and aims to provide a detection circuit that consumes less power and can be obtained at low cost.

[Means for solving the problem] Therefore, the detection circuit according to this invention detects an intrusion signal when an intrusion monitoring area is entered and an exit signal when exiting from an intrusion monitoring area,
In a detection circuit that holds the intrusion signal for a certain period of time after detecting the intrusion signal and outputs an intrusion detection signal when the exit signal is detected within this holding time, the detection circuit is set to a predetermined value with respect to a reference voltage. The present invention is characterized in that it consists of a gate circuit that outputs a signal at a constant level when a voltage of 1 is input, and a reactance circuit having a reactance component connected to the output terminal of the gate circuit.

Further, the reactance circuit may be configured as a parallel circuit consisting of a resistor and a capacitor.

[Operation] The gate circuit according to this invention outputs a shaped square pulse when a predetermined voltage is inputted with respect to the reference voltage.

Further, the reactance circuit smoothes the rise and fall of the rectangular pulse using the reactance component, and makes the time for holding a constant voltage longer than the time of the pulse width.

If the pulse that has passed through the reactance circuit is again input to the gate circuit, a pulse with a sufficiently large pulse width will be obtained.

[Embodiment] An embodiment of the present invention will be described below based on the drawings.

FIG. 1 is a block diagram showing an embodiment of a holding circuit used in the detection circuit of the present invention.
1 is a gate circuit that outputs a pulse when a constant voltage is input with respect to a reference voltage; 10 is a reactance circuit consisting of a parallel circuit of a resistor and a capacitor having a reactance component connected in parallel with the gate circuit; 11 is a resistor; 12 is a capacitor.

Next, the operation of the detection circuit of the present invention constructed as described above will be explained with reference to the waveform diagram of each part shown in FIG.

First, when the intrusion signal S ₁ having a predetermined voltage with respect to the reference voltage V ₀ , that is, a voltage higher than the reference voltage V ₀ in this case, is input to the gate circuit 8, the gate circuit 8 generates a rectangular shape obtained by shaping the intrusion signal S ₁ . Output pulse _S2 .

When this rectangular pulse S ₂ is input to the reactance circuit 10 consisting of a parallel circuit consisting of a resistor 11 and a capacitor 12, the reactance circuit 1
A signal _S3 with smooth rises and falls is obtained due to the zero reactance component.

When this signal S ₃ is further input to the gate circuit 9, a high level signal is output for the voltage portion higher than the reference voltage V ₁ , so that the pulse S ₄ is output from the gate circuit 9.

Here, the pulse width of pulse _S4 is a sufficiently large value compared to the pulse width of pulse _S1 , and is used as a holding circuit to hold the intrusion signal for a certain period of time after detecting the intrusion signal _S1 . The gate circuit 9 and reactance circuit 10 play the role of. In this case, the pulse width of pulse _S4 can be arbitrarily set by changing the reactance component.

It is preferable that the gate circuits 8 and 9 are constituted by hysteresis gates in which the reference voltage at the rising edge of the pulse is different from the reference voltage at the falling edge of the pulse.

[Effects of the Invention] As described above, in this invention, since the holding circuit is made up of a gate circuit and a reactance circuit, an inexpensive detection circuit with low power consumption can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a configuration diagram of a holding circuit used in a detection circuit showing an embodiment of the present invention, FIG. 2 is a waveform diagram showing waveforms of each part of the holding circuit, and FIG. 3 is a configuration diagram of a conventional detection circuit. FIG. 4 is a waveform diagram for explaining the operation of the detection circuit. 8, 9...Gate circuit, 10...Reactance circuit, 11...Resistor, 12 is a capacitor.

Claims (1)

[Scope of Claim for Utility Model Registration] (1) An intrusion signal when entering the intrusion monitoring area and an exit signal when leaving the intrusion monitoring area are respectively detected, and the above intrusion is detected for a certain period of time from the time when the intrusion signal is detected. In a detection circuit that holds a signal and outputs an intrusion detection signal when the exit signal is detected within this holding time, the detection circuit outputs a signal at a constant level when a predetermined voltage is input with respect to a reference voltage. A detection circuit comprising: a gate circuit for output; and a reactance circuit having a reactance component connected to the output end of the gate circuit. (2) The detection circuit according to claim 1, wherein the reactance circuit is constituted by a parallel circuit consisting of a resistor and a capacitor.