JPH057776Y2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] This invention relates to an FM receiver equipped with an automatic tuning means that automatically tunes the channel while sweeping the frequency.

[Prior art] FM receivers that have an automatic tuning function that performs automatic tuning while sweeping the frequency usually use the detection output of the FM detector as a control signal for automatic tuning. .

This control signal is configured so that an output is obtained when the sweep frequency comes within a frequency band of ±Δ _p with respect to the center frequency _p , so it is not guaranteed that the frequency sweep will stop when the center frequency is _p . do not have. Therefore, the accuracy of channel selection control is not very high.

In order to improve the accuracy of channel selection control, a configuration as shown in FIG. 5 has been considered.

In FIG. 5, 1 is a high frequency amplifier circuit, 2 is a mixer, and in the case of a synthesizer type FM tuner, the local oscillation circuit is configured as a PLL 3.

4 is an intermediate frequency amplifier circuit, 5 is an FM detector, 6 is a low frequency amplifier, and 7 is a speaker.

Broadcasting station selection is performed based on command signals from the microcomputer 8.

In this configuration, an automatic tuning control circuit 20 is provided to perform automatic tuning while sweeping the frequency.

The automatic tuning control circuit 20 performs control operations using the output (IF output) of the intermediate frequency amplifier circuit 4 and the FM detection output, and the output is taken into the microcomputer 8.

Therefore, first, the FM detection output is supplied to the driver 21, and the drive signal as shown in FIG. 6A and B is generated.
S1 is formed and supplied to the AND circuit 26 and also to the tuning display element 22, where it is used as a drive signal for tuning display.

As the tuning display element 22, an LED or the like is used.

Further, the intermediate frequency output obtained from between the stages of the intermediate frequency amplification circuit 4 is supplied to the narrow band band pass filter 24 via the IF amplifier 23, and is supplied to the narrow band bandpass filter 24, which has a narrower band than the drive signal S1, as shown in FIG. 6C. The filter output can be obtained within.

It is assumed that the filter output is detected by the wave detector 25, and a signal as shown in the figure is obtained when it is within the range of ± _Δp with respect to the center frequency _p . The frequency detection range of detection output S2 is
It shall be narrower than the frequency detection range of S1.

The drive signal S1 is the detection output S2 and the AND circuit 26
The signal is supplied to the microcomputer 8 as an automatic channel selection control signal (frequency sweep control signal). When this AND output is obtained, a predetermined sweep control signal is sent from the microcomputer 8 so that the frequency sweep of the PLL 3 is stopped.

[Problems to be solved by the invention] By the way, when the automatic tuning control circuit 20 is configured in this way, it is true that the tuning frequency is stopped at a frequency close to the center frequency _p , which is the tuning frequency. This greatly improves the accuracy of channel selection.

However, for this purpose, a circuit system for obtaining the detection output S2 must be added to the automatic tuning control circuit 20, which has the drawback of complicating the circuit scale.

In addition to this, a narrowband bandpass filter 2
4 must be used, which increases costs. In particular, in order to perform just tuning, the passband width of the bandpass filter 24 is
If the design is narrower, the cost will increase accordingly.

Therefore, this invention proposes an FM receiver that solves these conventional problems and can improve automatic tuning accuracy without increasing costs.

[Technical means for solving the problem] In order to solve the above problem, this invention uses a synthesizer-type FM tuner and an FM tuner.
It has a detector and a window comparator to which a pair of FM detection outputs with different polarities obtained from the FM detector are supplied. When the received signal is swept within the frequency range, a predetermined comparison output is obtained.
This is characterized in that the frequency sweep state of the FM tuner is controlled.

[Function] In this configuration, the window type comparator is configured to obtain a predetermined comparison output when the received signal is swept within a frequency region that is separated above and below the center frequency _p by a predetermined frequency. .

By changing the constant of the comparator, the frequency range to be detected changes. Therefore, if you want to perform just tuning, you only need to narrow the frequency range to be detected, so you only need to change the constant of the comparator.

[Example] Next, an example of the FM receiver according to the invention will be described in detail with reference to FIG. 1 and the following figures. Components corresponding to those in FIG. 5 are designated by the same reference numerals, and their explanation will be omitted.

In FIG. 1, the IF output of the intermediate frequency amplification circuit 4 is supplied to the FM detector 5 and subjected to FM detection.
FM detector 5 outputs a pair of detection outputs with different polarities.
The first detection output (Q output), which is a non-inverted output, is amplified by the low frequency amplifier 6.

The first detection output Sa and the second detection output (output), which is an inverted output, are output from the automatic tuning control circuit 2.
0.

Here, when the first detection output Sa has an S-shaped characteristic in which the detection output increases as the frequency increases, as shown in Figure 3A, the second detection output has an opposite characteristic. (Figure B).

The detected output used for automatic channel selection control is in a frequency range that has linear characteristics.
Therefore, in the following explanation, the detection output will be treated as changing linearly as shown in FIG.

The first detection output Sa is supplied to the driver 21 and also to the window type comparator 30. The second detection output is also supplied to the comparator 30, and the frequency domain is detected based on the level change of both.

Then, the drive signal obtained from the driver 21
S1 and the comparison output So are taken into the microcomputer 8 via the AND circuit 26 as its control signal.

FIG. 2 shows a specific example of the window type comparator 30. The window type comparator 30 has a pair of comparison circuits 31 and 32 for level comparison. The first detection output Sa is supplied to the terminal 33. The DC level (first DC level) of the first detection output Sa is assumed to be V1.

The first detection output Sa is input to the non-inverting terminal of the first comparator circuit 31, and is connected to the resistors R1 and R2.
The voltage is divided by , and the divided voltage output is supplied to the inverting terminal of the second comparator circuit 32 . Let the DC level resulting from voltage division be V1'.

Similarly, the second detection output is input to the non-inverting terminal of the second comparator circuit 32, and the resistor R
3, the voltage is divided by R4 and the first comparison circuit 31
is supplied to the non-inverting terminal of

Let the DC level of the second detection output (second DC level) be V2, and its divided voltage level be V2'.

Each comparison output C1, C2 is wire-ANDed and then supplied to the base of the control transistor Q.

Note that 35 and 36 are resistors, and 37 is an output terminal for the final comparison output So.

The above-mentioned drive signal S1 is supplied to the emitter side terminal 38 of the control transistor Q in a phase-inverted state.

Now, the comparison operation of the comparator 20 configured as described above will be explained with reference to FIG.

The explanation will start from the first comparison circuit 31. 2nd DC
Since the level V2 is divided by a pair of resistors R3 and R4, any DC level is supplied with a DC shift of ΔV2. As a result, the first
The relationship with the DC level V1 is as shown in Figure 4B, and the first detection output is such that the first DC level V1 is equal to or higher than the divided voltage level V2' of the second DC level V2.
When Sa is input, the first comparison output C1 becomes high level (C in the figure).

On the other hand, as shown in figure D, the first detection output Sa whose level has been shifted by ΔV1 is supplied to the inverting terminal of the second comparison circuit 32. The second comparison output C2 remains at a high level until the detection output becomes equal to or less than the divided voltage level V1' of the DC level V1 of the first detection output Sa.

Therefore, only when the drive signal S1 is at a low level and the wired output supplied to the base of the control transistor Q is at a high level, the control transistor Q is turned on, and at this time, the fourth Comparison output as shown in Figure F
So is obtained.

The comparison output So is centered around the center frequency _p , ±
It is obtained when the receiving frequency is swept within the range of Δ _p ′.

This comparison output So is supplied to the microcomputer 8 as an automatic tuning control signal, and by obtaining this control signal, the frequency sweep of the PLL 3 is stopped and the broadcast signal is received.

Here, the second
By reducing the DC shift amount ΔV2 of the detection output, the first comparison output C1 can be obtained from a frequency closer to the center frequency _p . On the other hand, if the DC shift amount ΔV1 of the first detection output Sa supplied to the second comparison circuit 32 is reduced, the second comparison output C2 will be generated at a frequency closer to the center frequency _p .
is reversed.

Therefore, the narrower the width of the comparative output So,
It becomes a just tuning state.

The DC shift amount ΔV1, ΔV2 is the voltage dividing resistor R1
It varies depending on the value of ~R4, and by adjusting this, the stop frequency of the automatic tuning sweep frequency can be arbitrarily set.

[Effects of the invention] As explained above, in this invention, a window type comparator is used, and the comparison output thereof is used as one of the automatic channel selection control signals.

According to this, since the width of the comparison output can be easily modified by simply changing the value of the resistor, the value at which the sweep frequency is stopped can be arbitrarily set. As a result, it has the feature that it is possible to freely set how far off from the center frequency the sweep should be stopped.

Further, since the sweep stop frequency can be set simply by changing the resistor voltage division value, the circuit configuration is also extremely simple.

Furthermore, in this invention, the signals input to the first and second comparison circuits are all generated based on the first detection output, so even if there is a fluctuation such as a voltage drop, the set sweep frequency will be maintained. It has the effect of being retained as is.

Therefore, according to this invention, it has an automatic tuning function that uses a synthesizer method that allows just tuning without increasing costs.
FM receiver can be provided.

[Brief explanation of the drawing]

Fig. 1 is a system diagram showing an example of an FM receiver according to this invention, Fig. 2 is a system diagram showing an example of a window type comparator, Figs. 3 and 4 are waveform diagrams for explaining its operation, and Figs. FIG. 5 is a system diagram showing an example of a conventional FM receiver, and FIG. 6 is a waveform diagram for explaining its operation. 10...FM receiver, 2...Mixer, 3...PLL for local oscillation, 4...Intermediate frequency amplification circuit, 5
...FM detector, 8...Microcomputer,
20... automatic tuning control circuit, 22... tuning display element, 30... window type comparator, 31, 32...
Comparison circuit.

Claims (1)

[Claim for Utility Model Registration] It has a synthesizer type FM tuner, an FM detector, and a window type comparator to which the FM detection output from the detector is supplied. On the other hand, when the received frequency is swept within a frequency range that is vertically separated by a predetermined frequency, a predetermined comparison output is obtained, and the frequency sweep state of the FM tuner is controlled by this comparison output. In the FM receiver, a first comparison circuit and a second comparison circuit constituting the window type comparator, and a pair of first detection output and second detection output with different polarities obtained from the FM detector. The first comparison circuit is supplied with a divided voltage output of the first detection output and the second detection output, and the second comparison circuit is supplied with the divided voltage output of the first detection output and the second detection output. An FM receiver characterized in that an output and a divided voltage output of the first detection output are supplied.