JPH0591490A - Image reader error protection system for image transmitter - Google Patents

Abstract

PURPOSE:To prevent the influence of an error generated at a frame header part. CONSTITUTION:An image signal 1 is encoded in an encoding circuit 20, buffered in a transmission buffer 21 and inputted to a multiplexing circuit 22. A synchronization separation circuit 23 separates the frame synchronization signal from the image signal 1 and a counter 24 counts the frame synchronization signal and outputs a frame number. The multiplexing circuit 22 multiplexes the image signal from the buffer, two frame headers, frame number and header number. A frame header detection circuit 25 detects a frame header from the received image signal and when at least one frame header could be detected, outputs a signal 8 indicating the period of the image signal multiplexed based on the detection result and a frame synchronization signal 9. A separation circuit 26 separates the image signal based on the signal 8 and a decoding circuit 28 decodes the encoded image signal based on the synchronization signal 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a protection system for a transmission line error which occurs when transmitting an image signal.

[0002]

2. Description of the Related Art When an image signal is transmitted by an image transmission device, various errors occur in the image signal in the process of transmitting through a transmission path. Therefore, conventionally, as error protection, measures have been taken such that error correction coding is performed on an image signal by a BCH coding method or the like.

[0003]

However, in such error protection, when a plurality of bits collectively form an error, the error correction capability is exceeded and error correction cannot be performed in many cases. It was In particular, when an error occurs in the image frame synchronization signal portion of the image signal, the effect extends to the entire one frame of the image signal, and therefore the effect of the error becomes extremely large.

An object of the present invention is to solve the above problems and provide an image header error protection system for an image transmission apparatus which is less susceptible to an error even if an error occurs in a portion related to frame synchronization of an image signal. Especially.

[0005]

The present invention provides an image signal and
In an image header error protection system of an image transmission device for temporally multiplexing and transmitting with a frame header indicating the timing of the frame, a plurality of the frame headers are multiplexed for each frame on the transmission side of the image transmission device. And a second multiplexing means for multiplexing the frame number in the frame header, and the same frame number is multiplexed from the received signal to the receiving side of the image transmission device. A synchronizing signal generating means is provided for detecting at least one of the plurality of generated frame headers and generating a frame synchronizing signal indicating the timing of the multiplexed image signal.

[0006]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 shows an example of an image transmission device based on the image header error protection system of the present invention. First, the configuration of the transmitter 100 will be described. The encoding circuit 20 receives the image signal 1 input from the input terminal A, encodes it, and outputs the image encoded signal 2. The transmission buffer 21 receives the image coded signal 2 from the encoding circuit 20, temporarily holds it, and then outputs it as a transmission image signal 3 at a predetermined timing. The sync separation circuit 23 separates the frame sync signal from the image signal 1 from the input terminal A and outputs the transmission image frame sync signal 4. The counter 24 counts the frame synchronization signal 4 and outputs the counting result as an image frame signal f. The multiplexing circuit 22 multiplexes an image header including a frame header indicating a frame timing on the image signal 3 and outputs a transmission multiplexed signal 6 as a transmission line output terminal B.
Output to. That is, the multiplexing circuit 22 multiplexes the first and second frame headers for one frame, and further, the image frame number f of the frame and the first frame header are added to these two frame headers, respectively. Alternatively, a frame header number of 0 or 1 indicating the second frame header is multiplexed.

Next, the structure of the receiving section 200 will be described. The frame header detection circuit 25 has a transmission line input terminal C.
It receives the reception multiplexed signal 7 from and outputs the reception frame header signal 8 and the reception image frame synchronization signal 9. The received frame header signal has a high level during the image header period and has a low level during the image signal period. The received image frame synchronization signal 9 is a pulse synchronized with the trailing edge of the frame header signal 8 and indicates the start timing of the multiplexed image signal. Detection circuit 25
Detects the first or second frame header, and according to the frame number and the header number multiplexed in each frame header, which frame the detected frame header belongs to, and the first frame header or the second frame header. Identify whether it is a frame header. When at least one frame header can be detected for each frame, the detection circuit 25 outputs the reception frame header signal 8 and the reception image frame synchronization signal 9 based on the detection result.
The separation circuit 26 receives the reception multiplexed signal 7 from the input terminal C,
On the other hand, the reception frame header signal 8 is received from the detection circuit 25. Then, the multiplexed signal 7 during the period when the reception frame header signal 8 is at the low level is separated, and the separated image signal 1
Output as 0. The reception buffer 27 uses this image signal 1
Receive 0, hold once, then hold 1
It is expanded and output for the entire frame period. Decoding circuit 28
Receives the reception image signal 11 from the reception buffer, decodes it at the timing of the frame synchronization signal 9 from the detection circuit 25, and outputs the decoded image signal 12 as an image signal output terminal D.
Output to.

Next, the operation will be described with reference to the timing chart of FIG. Image signal 1 input to input terminal A
Is the image coded signal 2 coded by the coding circuit 20.
Is output as. The transmission buffer 21 holds this signal once, and then outputs the held signal as the transmission image signal 3 in the period from the end of the image header to the next frame for multiplexing. On the other hand, the sync separation circuit 23 separates the transmission image frame synchronization signal 4 shown in FIG. 2 from the image signal 1 input to the input terminal A and outputs it. Then, the counter 24 counts the synchronization signal 4 and outputs the result as the frame number f.
Is output as shown in FIG.

The multiplexing circuit 22 multiplexes the image signal 3 from the buffer 21 with an image header including a frame header indicating frame timing. That is, the multiplexing circuit 22 multiplexes the first and second frame headers for one frame, and further, the image frame number f of the frame is respectively added to these two frame headers.
And a frame header number g of 0 or 1 indicating that the frame header is the first frame header or the second frame header. The result of the multiplexing is output to the transmission path E as the transmission multiplexed signal 6 through the transmission path output terminal B.

In the receiving section 200, the received multiplexed signal 7 input to the terminal C through the transmission path E is supplied to the frame header detecting circuit 25, and the detecting circuit 25 detects the frame header from the multiplexed signal 7. Then, no error occurs due to transmission like the image header of the first frame shown in FIG.
When the two frame headers and the frame number f and the frame header number g are correctly transmitted, the detection circuit 25 can detect the two frame headers, and the two frame headers are detected as the same frame by the frame number f. Since it can be judged that the received image is a high-quality image, it outputs a reception frame header signal 8 which is at a high level during the period of the image header and is at a low level during the period of the image signal of the subsequent first frame, and the reception image which is synchronized with its falling edge. The frame synchronization signal 9 is output. The separation circuit 26 separates the image signal of the first frame from the multiplexed signal 7 from the terminal C based on the frame header signal 8 and outputs it as the image signal 10. The reception buffer 27 receives the image signal 10, temporarily holds it, and then expands the held signal for the entire period of one frame and outputs it as the received image signal 11.
The decoding circuit 28 receives the reception image signal 11 from the reception buffer and receives it from the frame synchronization signal 9 from the detection circuit 25.
The decoded image signal 12 is output at the image signal output terminal D as the decoded image signal 12.

On the other hand, when an error has occurred in the second frame header portion like the second frame of the reception multiplexed signal 7, the detection circuit 25 can detect only one frame header but the frame header number. It is determined that the frame header detected by g is the first frame header, and the same frame header signal 8 and frame synchronization signal 9 as those described above are output. As a result, the separation circuit 26
And the decoding circuit 28 operates correctly, and the decoded image signal 12 of the second frame is output from the terminal D.

Further, even when an error occurs in the first frame header portion like the fourth frame of the reception multiplexed signal 7, the detection circuit 25 can detect only one frame header, but the frame header number It is determined that the frame header detected by g is the second frame header, and the normal frame header signal 8 and the frame synchronization signal 9 are output. As a result, the separation circuit 26 and the decoding circuit 28 operate correctly, and the decoded image signal 12 of the fourth frame is normally output from the terminal D.

In this embodiment, the multiplexing circuit 22 has 2
Although it has been stated that one frame header is multiplexed, this is an example, and it is of course possible to multiplex a larger number of frame headers. Then, the greater the number of frame headers to be multiplexed, the stronger the tolerance against errors.

[0014]

As described above, in the image transmission apparatus based on the image header error protection system of the present invention, a plurality of frame headers are multiplexed for one image signal on the transmitting side, and a plurality of frame headers are multiplexed on the receiving side. When at least one of the frame headers can be detected, a timing signal is generated accordingly. Therefore, as long as no error occurs in all of the multiple frame headers during transmission, synchronization can be achieved on the receiving side, and one frame worth of data is lost due to the partial error that has occurred in the frame sync signal part as in the past. It becomes unlikely that the correct decoding of the entire image signal will be impossible.

[Brief description of drawings]

FIG. 1 is a block diagram showing an example of an image transmission device based on an image header error protection system of the present invention.

FIG. 2 is a timing chart for explaining the operation of the image transmission device in FIG.

[Description of Codes] 20 Encoding Circuit 21 Transmission Buffer 22 Multiplexing Circuit 23 Sync Separation Circuit 24 Counter 25 Frame Header Detection Circuit 26 Separation Circuit 27 Reception Buffer 28 Decoding Circuit 100 Transmission Unit 200 Reception Unit A Image Signal Input Terminal B Transmission Line Output terminal C Transmission path input terminal D Image signal output terminal E Transmission path

Claims (3)

[Claims] 1. An image header error protection system for an image transmission apparatus, which temporally multiplexes and transmits an image signal and a frame header indicating the timing of the frame, wherein each frame is transmitted to the transmission side of the image transmission apparatus. Is provided with a first multiplexing means for multiplexing a plurality of the frame headers, and a second multiplexing means for multiplexing a frame number in the frame header. A synchronization signal generating means for detecting at least one of the plurality of frame headers in which the same frame number is multiplexed and generating a frame synchronization signal indicating the timing of the multiplexed image signal. An image header error protection method for an image transmission device characterized by the above. 2. The second multiplexing means comprises a sync separation means for separating a frame sync signal from the image signal, and a counter means for counting the frame sync signal separated by the sync separation means, An image header error protection system for an image transmission apparatus according to claim 1, wherein the output of the counter means is the frame number. 3. The image header error protection system for an image transmission apparatus according to claim 1, wherein the first multiplexing means multiplexes two frame headers for each frame.