JPH0594985A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPH0594985A JPH0594985A JP25402791A JP25402791A JPH0594985A JP H0594985 A JPH0594985 A JP H0594985A JP 25402791 A JP25402791 A JP 25402791A JP 25402791 A JP25402791 A JP 25402791A JP H0594985 A JPH0594985 A JP H0594985A
- Authority
- JP
- Japan
- Prior art keywords
- film
- metal film
- wiring
- gold
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 16
- 238000004519 manufacturing process Methods 0.000 title description 6
- 229910052751 metal Inorganic materials 0.000 claims abstract description 63
- 239000002184 metal Substances 0.000 claims abstract description 63
- 238000000034 method Methods 0.000 claims abstract description 17
- 238000007747 plating Methods 0.000 claims abstract description 16
- 238000005530 etching Methods 0.000 claims abstract description 15
- 239000000758 substrate Substances 0.000 claims abstract description 8
- 230000004888 barrier function Effects 0.000 claims abstract description 7
- 239000000853 adhesive Substances 0.000 claims abstract description 6
- 230000001070 adhesive effect Effects 0.000 claims abstract description 6
- 238000009713 electroplating Methods 0.000 claims abstract description 6
- 230000015572 biosynthetic process Effects 0.000 claims description 5
- 238000001312 dry etching Methods 0.000 claims description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 33
- 239000010931 gold Substances 0.000 abstract description 31
- 229910052737 gold Inorganic materials 0.000 abstract description 31
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 abstract description 24
- 239000010936 titanium Substances 0.000 abstract description 21
- 229910052719 titanium Inorganic materials 0.000 abstract description 21
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 9
- 238000009792 diffusion process Methods 0.000 abstract description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 abstract description 3
- 229910052710 silicon Inorganic materials 0.000 abstract description 3
- 239000010703 silicon Substances 0.000 abstract description 3
- 238000004544 sputter deposition Methods 0.000 abstract description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 abstract 3
- 229910052721 tungsten Inorganic materials 0.000 abstract 3
- 239000010937 tungsten Substances 0.000 abstract 3
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 13
- 238000000992 sputter etching Methods 0.000 description 9
- 238000001020 plasma etching Methods 0.000 description 8
- XKRFYHLGVUSROY-UHFFFAOYSA-N argon Substances [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 3
- 239000007789 gas Substances 0.000 description 3
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 description 2
- 229910052786 argon Inorganic materials 0.000 description 2
- 239000000460 chlorine Substances 0.000 description 2
- 229910052801 chlorine Inorganic materials 0.000 description 2
- 238000007796 conventional method Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 description 1
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- MHAJPDPJQMAIIY-UHFFFAOYSA-N Hydrogen peroxide Chemical compound OO MHAJPDPJQMAIIY-UHFFFAOYSA-N 0.000 description 1
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 description 1
- 239000002313 adhesive film Substances 0.000 description 1
- -1 argon ions Chemical class 0.000 description 1
- 239000007795 chemical reaction product Substances 0.000 description 1
- 229910052804 chromium Inorganic materials 0.000 description 1
- 239000011651 chromium Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 229910052750 molybdenum Inorganic materials 0.000 description 1
- 239000011733 molybdenum Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 239000000376 reactant Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Landscapes
- Electrodes Of Semiconductors (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体装置の製造方法
に関し、特に金属配線の形成方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for forming metal wiring.
【０００２】[0002]
【従来の技術】従来の金属配線技術、特に高信頼性を目
的とする金配線の形成方法を図４を用いて説明する。2. Description of the Related Art A conventional metal wiring technique, in particular, a method of forming gold wiring for the purpose of high reliability will be described with reference to FIG.
【０００３】先ず、図４（Ａ）に示すように、拡散層等
が形成された半導体基板１１の一主面に、酸化膜１２を
被着し、開孔を設ける。この表面上に拡散バリア及び接
着金属としてのチタンタングステン（ＴｉＷ）膜１３及
び被メッキ金属として金膜１４を被着した後、ホトレジ
ジスト膜１６をパターン形成し、このホトレジスト膜１
６をマスクとして配線形成領域に金メッキ膜１７を選択
的に形成する。次に図４（Ｂ）に示すように、ホトレジ
スト膜を除去したのち金メッキ膜１７で被覆された領域
を除く金膜１４を、アルゴンイオン等を用いたスパッタ
エッチングにより除去し、続いてチタンタングステン膜
１３を反応性イオンエッチングにより除去し、金を主材
料とする金属配線を形成する。First, as shown in FIG. 4 (A), an oxide film 12 is deposited on one main surface of a semiconductor substrate 11 on which a diffusion layer and the like are formed to form an opening. After depositing a titanium tungsten (TiW) film 13 as a diffusion barrier and an adhesive metal and a gold film 14 as a metal to be plated on this surface, a photoresist film 16 is patterned to form the photoresist film 1.
Using 6 as a mask, a gold plating film 17 is selectively formed in the wiring formation region. Next, as shown in FIG. 4B, after removing the photoresist film, the gold film 14 excluding the region covered with the gold plating film 17 is removed by sputter etching using argon ions or the like, and then the titanium tungsten film is formed. 13 is removed by reactive ion etching to form a metal wiring containing gold as a main material.
【０００４】[0004]
【発明が解決しようとする課題】この従来の金属配線の
形成方法では、金を主とする金属配線の側面に、スパッ
タエッチングした金が再付着し、再付着膜１８Ａが形成
される。これは、揮発性反応物を生成することによりエ
ッチング除去する反応性イオンエッチングやプラズマエ
ッチングと異り、スパッタエッチングは、物理的なスパ
ッタリング現象によりエッチング除去する方法であり、
被除去物質が近傍にある壁に再び付着することに起因し
ている。金は本質的に接着力が弱いことに加え、汚れ等
の影響もありこの再付着膜１８Ａの金属配線への付着力
は弱く、金属配線形成後のアロイ等の熱処理や洗浄処理
により、その一部が剥離し、隣接する配線に接触して配
線同志を短絡させ歩留りを低下させるという問題があっ
た。In this conventional method for forming a metal wiring, the sputter-etched gold is redeposited on the side surface of the metal wiring mainly composed of gold to form a redeposition film 18A. This is different from reactive ion etching or plasma etching in which a volatile reaction product is removed by etching, and sputter etching is a method of etching and removing by a physical sputtering phenomenon.
This is due to the substance to be removed reattaching to the nearby wall. Gold has an inherently weak adhesive force and is also affected by dirt and the like, so that the reattachment film 18A has a weak adhesive force to the metal wiring. There is a problem in that the parts are peeled off and the adjacent wires are brought into contact with each other to short-circuit the wires and reduce the yield.
【０００５】[0005]
【課題を解決するための手段】第１の発明の半導体装置
の製造方法は、半導体基板上に絶縁膜を介してバリア及
び接着用の第１の金属膜と被メッキ用の第２の金属膜と
接着性の高い第３の金属膜を順次形成する工程と、前記
第３の金属膜をエッチングし配線形成領域の前記第２の
金属膜を露出させる工程と、エッチングした前記第３の
金属膜上にマスクを形成したのち電解メッキ法により露
出した前記第２の金属膜上に配線用金属膜を形成する工
程と、このマスクを除去したのち前記配線用金属膜をマ
スクとし前記第３の金属膜と第２の金属膜及び第１の金
属膜をドライエッチング法によりエッチングする工程と
を含むものである。According to a first aspect of the present invention, there is provided a method of manufacturing a semiconductor device, wherein a first metal film for barrier and adhesion and a second metal film for plating are provided on a semiconductor substrate via an insulating film. And a step of sequentially forming a third metal film having high adhesiveness, a step of etching the third metal film to expose the second metal film in a wiring formation region, and the etched third metal film Forming a mask on the second metal film and then forming a wiring metal film on the exposed second metal film by electroplating; and removing the mask and using the wiring metal film as a mask And a step of etching the film, the second metal film, and the first metal film by a dry etching method.
【０００６】第２の発明の半導体装置の製造方法は、半
導体基板上に絶縁膜を介してバリア及び接着用の第１の
金属膜と被メッキ用の第２の金属膜を形成する工程と、
この第２の金属膜上の配線形成領域に電解メッキ法によ
り配線用金属膜を形成する工程と、この配線用金属膜表
面及び非配線領域の前記第２の金属膜表面に接着性の高
い第３の金属膜を形成する工程と、この第３の金属膜と
非配線領域の前記第２の金属膜及び前記第１の金属膜を
ドライエッチング法によりエッチングする工程とを含む
ものである。A method of manufacturing a semiconductor device according to a second aspect of the present invention comprises a step of forming a first metal film for adhesion and a barrier and a second metal film for plating on a semiconductor substrate via an insulating film.
A step of forming a wiring metal film in the wiring formation region on the second metal film by an electrolytic plating method, and a step of forming a highly adhesive film on the surface of the wiring metal film and the surface of the second metal film in the non-wiring region. And a step of etching the third metal film and the second metal film and the first metal film in the non-wiring region by a dry etching method.
【０００７】[0007]
【実施例】次に本発明について図面を参照して説明す
る。図１（Ａ）〜（Ｃ）は本発明の第１の実施例の主要
工程における半導体チップの断面図である。The present invention will be described below with reference to the drawings. 1A to 1C are sectional views of a semiconductor chip in the main steps of the first embodiment of the present invention.
【０００８】先ず図１（Ａ）に示すように、所要のＰＮ
接合（図示せず）を拡散，酸化等を用いて形成したシリ
コン基板１１の上に酸化膜１２を形成し、この酸化膜１
２に選択的に開孔を設ける。次に、拡散バリア及び接着
用の第１の金属膜としてチタンタングステン膜１３，被
メッキ用の第２の金属膜として金膜１４及び接着用の第
３の金属膜としてチタン膜１５を被着する。これらの膜
厚としては、チタンタングステン膜１３は３０〜２００
ｎｍ，金膜１４は１０〜１００ｎｍ，チタン膜１５は１
０〜１００ｎｍが実用上好適である。続いてホトレジス
ト膜１６を形成したのち配線形成領域をエッチングした
のち、チタン膜１５を過酸化水素水を用いたウエットエ
ッチング或は塩素系ガスを用いた反応性イオンエッチン
グで選択的に除去する。First, as shown in FIG. 1 (A), the required PN
An oxide film 12 is formed on a silicon substrate 11 on which a junction (not shown) is formed by diffusion, oxidation or the like.
2 are selectively provided with openings. Next, a titanium tungsten film 13 is deposited as a diffusion barrier and a first metal film for adhesion, a gold film 14 is deposited as a second metal film for plating, and a titanium film 15 is deposited as a third metal film for adhesion. . The titanium tungsten film 13 has a film thickness of 30 to 200.
nm, the gold film 14 is 10 to 100 nm, and the titanium film 15 is 1 nm.
Practically suitable is 0 to 100 nm. Then, after forming a photoresist film 16 and etching the wiring formation region, the titanium film 15 is selectively removed by wet etching using hydrogen peroxide solution or reactive ion etching using chlorine-based gas.
【０００９】次に図１（Ｂ）に示すように、電解メッキ
処理を施し、金膜１４上に配線用の金メッキ膜１７を被
着する。この金メッキ膜１７の膜厚は、配線用として必
要な膜厚あれば良く、通常０．５〜３μｍ程度である。Next, as shown in FIG. 1B, electrolytic plating treatment is performed to deposit a gold plating film 17 for wiring on the gold film 14. The film thickness of the gold plating film 17 may be any film thickness required for wiring, and is usually about 0.5 to 3 μm.
【００１０】次に図１（Ｃ）に示すように、ホトレジス
ト膜１６を除去した後、スパッタエッチングを主とする
エッチング処理を施してチタン膜１５，金膜１４及びチ
タンタングステン膜１３を除去する。この時同時に再付
着膜１８が形成される。この再付着膜１８は図２に示す
ように、最上層表面にあるチタン膜１５がスパッタエッ
チングされ配線用金メッキ膜１７の側面に再付着したチ
タン膜１９と、金膜１４及びチタンタングステン膜１３
が再付着した金膜２０及びチタンタングステン膜２１か
らなっている。Next, as shown in FIG. 1C, after the photoresist film 16 is removed, an etching process mainly consisting of sputter etching is performed to remove the titanium film 15, the gold film 14 and the titanium tungsten film 13. At this time, the redeposited film 18 is simultaneously formed. As shown in FIG. 2, the redeposited film 18 has a titanium film 15 on the surface of the uppermost layer sputter-etched and redeposited on the side surface of the gold plating film 17 for wiring, a gold film 14 and a titanium tungsten film 13.
Are redeposited gold film 20 and titanium tungsten film 21.
【００１１】このように本実施例によれば、接着性に劣
る配線用の金メッキ膜１７と再付着した金膜２０の間
に、接着性に優れるチタン膜１９を入れることによっ
て、スパッタエッチングのように弱いエネルギーで付着
した膜１８でも接着性が改善され、後工程に於ても、再
付着膜１８が剥れることはない。As described above, according to the present embodiment, by inserting the titanium film 19 having excellent adhesiveness between the gold plating film 17 for wiring having poor adhesiveness and the redeposited gold film 20, it is possible to perform sputter etching. Adhesion is improved even with the film 18 attached with a very weak energy, and the redeposited film 18 does not peel off even in the subsequent process.
【００１２】この例では、チタンタングステン膜１３も
スパッタエッチングで処理したが、必ずしもこの方法に
依らずとも良く、通常の反応性イオンエッチングを用い
ても良い。又、チタン膜１５の代りに、チタンタングス
テン，モリブデン，クロム等接着性に優れた材料を用い
ることができる。In this example, the titanium-tungsten film 13 was also processed by sputter etching, but this method is not always necessary and ordinary reactive ion etching may be used. Further, instead of the titanium film 15, a material having excellent adhesiveness such as titanium tungsten, molybdenum, or chromium can be used.
【００１３】図３（Ａ），（ｂ）は本発明の第２実施例
を説明するための半導体チップの断面図である。3A and 3B are sectional views of a semiconductor chip for explaining the second embodiment of the present invention.
【００１４】本第２の実施例では、配線用の金属膜をメ
ッキにより形成する工程までは、図４（Ａ）に示した従
来の製造方法と同じである。これに続いて、図３（Ａ）
に示すように、ホトレジスト膜１６を除去したのち、チ
タン膜２２を被着する。チタン膜２２の膜厚は１０〜１
００ｎｍが好適である。次に図３（Ｂ）に示すように、
アルゴンガスを主体とするスパッタエッチングでチタン
膜２２及び金膜１４をエッチング除去し、続いてチタン
タングステンを塩素系ガスで反応性イオンエッチする。
この場合、配線用の金メッキ膜１７の側面には、被着し
たチタン膜２２及び金メッキ膜１７の表面に被着したチ
タン膜２２がスパッタエッチングにより再付着したチタ
ン膜２３及び金膜１４の再付着金膜２４が付着してい
る。In the second embodiment, the steps up to the step of forming a metal film for wiring by plating are the same as those in the conventional manufacturing method shown in FIG. Following this, FIG. 3 (A)
After the photoresist film 16 is removed, a titanium film 22 is deposited as shown in FIG. The thickness of the titanium film 22 is 10 to 1
00 nm is preferred. Next, as shown in FIG.
The titanium film 22 and the gold film 14 are removed by sputter etching mainly using argon gas, and then titanium-tungsten is subjected to reactive ion etching with chlorine-based gas.
In this case, the titanium film 22 deposited on the side surface of the gold-plated film 17 for wiring and the titanium film 22 deposited on the surface of the gold-plated film 17 are reattached by sputter etching, and the titanium film 23 and the gold film 14 are attached again. The gold film 24 is attached.
【００１５】この例では、チタンタングステン膜１３
は、反応性イオンエッチングにより揮発性反応物として
エッチング除去したので、再付着しないが再付着させて
もよい。この第２の実施例でも、再付着膜は、配線の側
面に、チタン膜で強固に接着しており、剥離することは
ない。In this example, the titanium tungsten film 13 is used.
Was removed as a volatile reactant by reactive ion etching, so it does not re-attach, but it may be re-attached. Also in this second embodiment, the redeposited film is firmly adhered to the side surface of the wiring by the titanium film and is not peeled off.
【００１６】尚、上記実施例においては、メッキ金属と
して金を用いた場合について説明したが、銅を用いても
よい。またチタン膜のエッチングにスパッタエッチング
法を用いたが、ＣＦ4 にＡｒを数１０％混合しスパッタ
成分を強くした反応性イオンエッチング法を用いてもよ
い。In the above embodiment, the case where gold is used as the plating metal has been described, but copper may be used. Further, although the sputter etching method was used for etching the titanium film, a reactive ion etching method in which Ar is mixed with CF 4 by several 10% to strengthen the sputter component may be used.
【００１７】[0017]
【発明の効果】以上説明したように本発明は、配線用の
金属膜の側面とスパッタエッチングでその側面に再付着
する金属膜との間に、接着性に優れた金属膜を設ける構
造としたので、再付着膜の接着強度が向上する。従っ
て、この再付着膜の一部が剥離し隣接配線同志が短絡す
るという問題を解決できるため、歩留の向上した半導体
装置が得られるという効果を有する。As described above, the present invention has a structure in which the metal film having excellent adhesiveness is provided between the side surface of the wiring metal film and the metal film redeposited on the side surface by sputter etching. Therefore, the adhesive strength of the redeposited film is improved. Therefore, the problem that a part of the redeposited film is peeled off and the adjacent wirings are short-circuited can be solved, so that there is an effect that a semiconductor device with improved yield can be obtained.
【図１】本発明の第１の実施例を説明するための半導体
チップの断面図。FIG. 1 is a cross-sectional view of a semiconductor chip for explaining a first embodiment of the present invention.
【図２】本発明の第２の実施例を説明するための半導体
チップの断面図。FIG. 2 is a sectional view of a semiconductor chip for explaining a second embodiment of the present invention.
【図３】従来の半導体装置の製造方法を説明するための
半導体チップの断面図。FIG. 3 is a cross-sectional view of a semiconductor chip for explaining a conventional method of manufacturing a semiconductor device.
１１ シリコン基板 １２ 酸化膜 １３ チタンタングステン膜 １４ 金膜 １５，２２ チタン膜 １６ ホトレジスト膜 １７ 金メッキ膜 １８，１８Ａ 再付着膜 １９，２３ チタン膜 ２０，２４ 金膜 ２１ チタンタングステン膜 11 Silicon Substrate 12 Oxide Film 13 Titanium Tungsten Film 14 Gold Film 15,22 Titanium Film 16 Photoresist Film 17 Gold Plated Film 18,18A Redeposition Film 19,23 Titanium Film 20,24 Gold Film 21 Titanium Tungsten Film
Claims (2)
び接着用の第１の金属膜と被メッキ用の第２の金属膜と
接着性の高い第３の金属膜を順次形成する工程と、前記
第３の金属膜をエッチングし配線形成領域の前記第２の
金属膜を露出させる工程と、エッチングした前記第３の
金属膜上にマスクを形成したのち電解メッキ法により露
出した前記第２の金属膜上に配線用金属膜を形成する工
程と、このマスクを除去したのち前記配線用金属膜をマ
スクとし前記第３の金属膜と第２の金属膜及び第１の金
属膜をドライエッチング法によりエッチングする工程と
を含むことを特徴とする半導体装置の製造方法。1. A step of sequentially forming a first metal film for barrier and adhesion, a second metal film for plating, and a third metal film having high adhesiveness on a semiconductor substrate via an insulating film. A step of etching the third metal film to expose the second metal film in a wiring formation region, and a step of forming a mask on the etched third metal film and then exposing the second metal film by electrolytic plating. A step of forming a wiring metal film on the metal film, and after the mask is removed, the third metal film, the second metal film, and the first metal film are dry-etched using the wiring metal film as a mask. And a step of etching by a method.
び接着用の第１の金属膜と被メッキ用の第２の金属膜を
形成する工程と、この第２の金属膜上の配線形成領域に
電解メッキ法により配線用金属膜を形成する工程と、こ
の配線用金属膜表面及び非配線領域の前記第２の金属膜
表面に接着性の高い第３の金属膜を形成する工程と、こ
の第３の金属膜と非配線領域の前記第２の金属膜及び前
記第１の金属膜をドライエッチング法によりエッチング
する工程とを含むことを特徴とする半導体装置の製造方
法。2. A step of forming a first metal film for adhesion and a barrier and a second metal film for plating on a semiconductor substrate via an insulating film, and forming a wiring on the second metal film. A step of forming a wiring metal film in the region by an electrolytic plating method, and a step of forming a highly adhesive third metal film on the surface of the wiring metal film and the surface of the second metal film in the non-wiring region, And a step of etching the third metal film and the second metal film and the first metal film in the non-wiring region by a dry etching method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25402791A JPH0594985A (en) | 1991-10-02 | 1991-10-02 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25402791A JPH0594985A (en) | 1991-10-02 | 1991-10-02 | Manufacture of semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0594985A true JPH0594985A (en) | 1993-04-16 |
Family
ID=17259223
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25402791A Pending JPH0594985A (en) | 1991-10-02 | 1991-10-02 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0594985A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0636446A3 (en) * | 1993-07-30 | 1996-03-20 | Finmeccanica Spa | A method of welding a tube into a heat exchanger element. |
-
1991
- 1991-10-02 JP JP25402791A patent/JPH0594985A/en active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0636446A3 (en) * | 1993-07-30 | 1996-03-20 | Finmeccanica Spa | A method of welding a tube into a heat exchanger element. |
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