JPH0595529A - Image display method - Google Patents

Abstract

(57) [Summary] [Purpose] To reproduce images without blur. [Structure] An odd field and an even field are selected from a memory in which a video signal of each field is sequentially written at a predetermined address, data is repeatedly read, and interlaced display is performed. When sequentially reproducing the odd field and the even field, the blurring of the screen can be prevented by erasing and not displaying the data of the last line of the odd field and the head line of the even field.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image display method for AD-converting a television video signal to record it in a memory, reading it out and DA-converting it to reproduce and display a still image on a monitor.

[0002]

2. Description of the Related Art An image processing apparatus for temporarily recording a television video signal in an IC memory, reading the recorded content to display a still image, and processing the video signal is used in various fields. .. In order to record in the memory, the analog video signal is once digitized by the AD converter, and the signal read from the memory is converted into the analog video signal by the DA converter for interlaced display.

FIG. 4 is a block diagram of such an image processing apparatus. The input video signal is converted into a digital signal by the AD converter 12 in synchronization with the output clock of the sample clock generator 11. This digital signal is controlled by the signal of the address generator 13 and recorded at a predetermined address in the frame memory 15.

With respect to the signal recorded in the frame memory 15, a predetermined address is designated by the control of the address generator 13 and its content is read. The read signal is converted into an analog video signal by the DA converter 18 in synchronization with the output clock of the display clock generator 17 and output.

The video signal thus DA converted is displayed on the screen. At the time of display, for example, in the case of the NTSC system, one frame has 525 scanning lines of 2 lines.
It is divided into fields and the odd and even fields of 262.5 lines are interlaced and displayed.

[0006]

In the field interlaced display as described above, when a moving television signal is recorded and reproduced and displayed as a still picture, when a fast moving picture is reproduced by frame reproduction, the inter-field is displayed. In some cases, the difference between the images becomes large and the image is blurred, making it difficult to see.

The present invention provides a video display method capable of preventing such image blurring. Further, the image display method can be arbitrarily switched to display an appropriate image.

[0008]

SUMMARY OF THE INVENTION The present invention solves the above problems by allowing frame reproduction, odd field reproduction, and even field reproduction to be arbitrarily selected.

That is, in a video display method in which a TV video signal is AD-converted and recorded in a memory, and a signal read from the memory is DA-converted to display a video, a video signal of each field is AD-converted and a predetermined value of the memory is determined. The address of the playback start address generator, in which the start address data for frame playback, odd field playback, and even field playback is written, is selected by the field selection signal, and that data is preset in the pixel counter. , Is characterized in that it controls the read address of the memory.

Therefore, in the odd field reproduction and the even field reproduction, the recorded address of the signal of any field is repeatedly selected by the field selection signal and interlaced display is performed.

[0011]

[Function] By alternately selecting the odd field reproduction and the even field reproduction, repeatedly reading out the respective data (signals) and displaying the interlaced display, even when a fast-moving image is displayed as a still image, the distance between adjacent lines is increased. The difference between the two becomes smaller, and it is possible to prevent the occurrence of screen blurring.

When the odd field reproduction and the even field reproduction are sequentially performed, the last line data (signal) of the odd field and the first line data (signal) of the even field are not read out and are not displayed on the screen. By doing so, it is possible to prevent the screen blurring at that portion.

[0013]

EXAMPLES Examples of the present invention will be described below.

FIG. 1 is for use in practicing the present invention.
It is a block diagram of a circuit for selecting frame reproduction, odd field reproduction, and even field reproduction. When the video data is written in the video memory 5, the input video signal is AD-converted and directly recorded at a predetermined address in time series.

When reading the recorded data (signal), frame reproduction, odd field reproduction,
Start address generator 6 in which data for generating start address for even field reproduction is written in ROM
The data is selected by the output of the field address register 7.

The output of the head address generator 6 presets the address data in the pixel counter 8. The signals recorded at the addresses set in the pixel counter 8 are sequentially read and output in synchronization with the sampling clock.
The operation of this circuit is not limited to the sampling clock
Timing is set so as to synchronize with the horizontal synchronizing signal and the vertical synchronizing signal.

When the odd field is selected, as shown in FIG. 2 (1), the read data (video signal) is only the data in the odd field portion (A). , 1 line of data is repeatedly read and displayed on 264 lines. That is, a 1'line having the same signal as that of one line is formed between one line and two lines.

Similarly, when the even field is selected, the interlaced display as shown in FIG. 2 (2) is performed and a similar image is obtained.

As a result, as shown in FIG. 3, the data (signal) of each field is sequentially recorded at the time of recording in the memory, but at the time of reading, the data of the first field is repeated. It will be read and interlaced.

When a moving image is displayed by performing field reproduction as described above, image blurring tends to occur when switching from an odd field to an even field. Therefore, the last line of the odd field data, that is, the data of line 263 'in FIG. 2 (1) is erased. Similarly, in the even field, the leading line of the even field data, that is, the data of the line 264 'in FIG. 2 (2) is erased so that this portion is not displayed.

[0021]

According to the present invention, it is possible to prevent the blurring of an image when a video signal is reproduced. Moreover, frame reproduction, odd field reproduction, and even field reproduction can be arbitrarily selected, and not only still images but also moving images can be displayed.

[Brief description of drawings]

FIG. 1 is a block diagram of an address selection circuit used in the present invention.

[Fig. 2] Illustration of interlaced display

FIG. 3 is an explanatory diagram of write / read data.

FIG. 4 is a block diagram of an image display device.

[Explanation of symbols]

 5: Video memory 6: Start address generator 7: Field address register 8: Pixel counter

Claims (3)

[Claims] 1. A video display method for AD-converting a television video signal to record it in a memory, DA-converting a signal read from the memory to display a video, and AD-converting a video signal of each field to a predetermined value of the memory. The address of the playback start address generator, in which the start address data for frame playback, odd field playback, and even field playback is written, is selected by the field selection signal, and that data is preset in the pixel counter. ,
An image display method characterized by controlling the read address of a memory. 2. The image display method according to claim 1, wherein in the odd field reproduction and the even field reproduction, an address in which a signal of any field is recorded is repeatedly selected by a field selection signal and interlaced display is performed. 3. The image display method according to claim 1, wherein when the reproduction of the odd number field and the reproduction of the even number field are sequentially performed, the data of the last line of the repetition of the odd number field and the head line of the even number field are not read out and not displayed. ..