JPH06120784A - Window comparator - Google Patents

Abstract

PURPOSE:To equalize hysteresis characteristics of the dead zone width of a window comparator in the upper end and the lower end of a dead zone by constituting a voltage setting circuit of an operational amplifier, a reference voltage source, a power source, etc. CONSTITUTION:A voltage setting circuit 3 consists of resistors R3 to R6 connected to a dead zone width control circuit consisting of a switching transistor TR Q1, a buffer 2, etc., an operational amplifier 4, and a reference voltage source VR, etc. The set voltage by this circuit 3 is supplied to window comparison parts 5 and 6, and a comparator output VO corresponding to window upper and lower ends is outputted from an AND circuit 7, and the TR Q1 is controlled by feedback. By this constitution where an asymmetrical current mirror circuit or the like is not used and the reference voltage is given through the operational amplifier, currents flowing to resistors R4 and R5 are equalized because the current flowing to the inverted input of the operational amplifier 4 can be ignored, and hysteresis characteristics in the upper end and the lower end of the dead zone are accurately equalized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a window comparator, and more particularly to a window comparator having a hysteresis characteristic and capable of setting a dead band width.

[0002]

2. Description of the Related Art Conventionally, such a window comparator is composed of a plurality of current mirror circuits, a dead band width control circuit, a voltage setting circuit and a comparison section.

FIG. 2 is a circuit diagram of a window comparator showing a conventional example. As shown in FIG. 2, the conventional window comparator includes a dead band width control circuit 1
A voltage setting circuit 3a, first and second current mirror circuits 8 and 9, and comparators 5 and 6 for comparing the output and input voltage VI of the voltage setting circuit 3a, respectively.
It has an AND circuit 7 which becomes a comparator output by taking the logical product of the outputs of these comparators 5 and 6, and outputs the output of the AND circuit 7 to the dead band width control circuit 1. In such a window comparator, the dead band width control circuit 1 uses the dead band width control power supply VZ.
And resistors R1 and R2 and a switch transistor Q1
And buffer 2. The first current mirror circuit 8 includes PNP transistors Q3 and Q4 and resistors R8 and R4.
And the second current mirror circuit 9 has NPN transistors Q5 to Q7 and resistors R12 to R14. Further, the voltage setting circuit 3a includes resistors R7, R10, R1.
1, a reference power supply V _R , a power supply V _CC, and a PNP transistor Q2, and output at connection points P3 and P4.
The two outputs at the connection points P3 and P4 are the comparison units 5 and 6.
Is connected to one of the input terminals of each and is compared with the input voltage VI. The outputs of the comparison units 5 and 6 are supplied to the AND circuit 7, and the output VO thereof is fed back to the base of the switch transistor Q1.

First, when the input voltage VI is outside the dead zone, the output VO is low. Therefore, the switch transistor Q1 is turned off, and the dead band width control power supply V2 is applied to the base of the transistor Q2 forming the voltage setting circuit 3a. At this time, the voltage V _{P3 at} the connection point P3 is expressed by the following equation (1).

[0005]

However, V _CC is the power supply voltage, and V _BE2 is the base-emitter voltage of the transistor Q2. Similarly, the voltage V _P4 at the connection point P4 is expressed by the following equation (2).

[0007]

Further, if the dead band width V _D is obtained with the resistance R10 = R11, the following equation (3) is obtained.

[0009]

[0010] Therefore, the window comparator at this time is centered on the reference voltage V _R (2R10 / R
7) with a dead zone of _{× (V CC -V BE2 -V Z} ).

Next, when the input voltage VI changes to the inside of the dead zone, the output VO is High. Therefore, the switch transistor Q1 is turned on, and the transistor Q2
The base, the voltage of _{(V Z -V sat) × {} R2 / (R1 + R2)} + V sat ≒ V Z × {R2 / (R 1 + R2)} is applied. However, V _sat is the transistor Q1
Is the saturation voltage of and is ignored as it is sufficiently small.

Therefore, when the dead band width V _D at this time is calculated in the same manner as the above-mentioned equation (3), the following equation (4) is obtained.

[0013]

[0014] Comparing this with the dead band width of equation (3), as shown in equation (5) below,

[0015]

Only spread. This spread ΔV represents the hysteresis characteristic.

In short, the conventional window comparator has a hysteresis characteristic.

[0018]

The conventional window comparator described above has a resistor R10 due to the asymmetry of the first current mirror circuit and the second current mirror circuit.
And the magnitude of the current flowing through R11 is different. For this reason, the upper end (voltage of P3) and the lower end (voltage of P4) of the dead zone do not have equal hysteresis.

For example, when the currents flowing through the resistors R10 and R11 are calculated as k ₂ times and k ₃ times the current flowing through the resistor R7 and the current I ₁ , respectively, the hysteresis amount ΔV of the voltage at the connection point P3 is calculated.
_P3 is represented by the following equation (6).

[0020]

Similarly, the hysteresis component ΔV _P4 of the voltage at the connection point _P4 is expressed by the following equation (7).

[0022]

As described above, the conventional window comparator has a drawback that the upper and lower ends of the dead zone have different hysteresis components.

An object of the present invention is to provide a window comparator capable of equalizing the hysteresis components at the upper and lower ends of such dead zone.

[0025]

A window comparator of the present invention comprises a dead band width control circuit having a switch transistor, first and second resistors and a dead band width control voltage source, and one end thereof connected to the dead band width control circuit. And a fourth resistor connected to the other end of the third resistor and the other end of the third resistor, and an operational amplifier connected to the other end of the fourth resistor to the inverting input and supplied with a reference voltage to the non-inverting input. A voltage setting circuit including fifth and sixth resistors connected between the inverting input and the output of the operational amplifier and having resistance values equal to the fourth resistor and the third resistor, respectively; The connection point of the resistor 4 and the fifth
And an AND circuit that uses the potential of the connection point of the sixth resistor as a reference and compares it with the input voltage, and an AND circuit that outputs the output of the second comparison unit as two inputs. The output of the AND circuit controls the switch transistor of the dead band width control circuit, and the switch transistor of the dead band width control circuit is controlled.

[0026]

Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a circuit diagram of a window comparator showing an embodiment of the present invention. As shown in FIG. 1, in this embodiment, the dead band width control circuit 1, the comparison units 5 and 6, and the AND circuit 7 are the same as those in the conventional example of FIG. , 9 are omitted and the voltage setting circuit 1 is improved. The voltage setting circuit 3 connects a resistor R3 connected to the output of the buffer 2 of the dead zone control circuit 1, a resistor R4 connected to the other end of the resistor R3, and the other end of the resistor R4 to the inverting input and Operational amplifier 4 whose reference voltage V _R is supplied to its inverting input
And resistors R5 and R6 connected between the inverting input and the output and having resistance values equal to those of the resistors R4 and R3, respectively.

The reference voltage V _R is connected to the non-inverting input of the operational amplifier 4, and the resistors R1 and R2, the switch transistor Q1, the dead band width control voltage V _Z are connected to the inverting input.
The output of the dead band width control circuit 1 including the buffer 2 and the buffer 2 is connected via resistors R3 and R4. On the other hand, the inverting input of the operational amplifier 4 is further connected to resistors R5 and R6.
The output terminal of the operational amplifier 4 is connected via. As described above, these resistors R3 to R6 are R4, R5, and R.
The resistance values of 3 and R6 are set to be equal to each other.

In this way, the connection points P1 and P for resistance division are
Each of the two voltages V _P1 and V _P2 is transmitted to one of the input terminals of the comparators 5 and 6 and compared with the common input signal VI supplied to the other input terminal. The outputs of the comparison units 5 and 6 are input to the AND circuit 7, and the output VO thereof becomes the output of the comparator and the dead band width control circuit 1
Is fed back to the base of the switch transistor Q1.

In this window comparator,
First, when the input VI is outside the dead zone, the output VO is Lo
w. Therefore, Q1 of the switch transistor is turned off, and the dead band width control voltage V2 is supplied to the buffer 2. At this time, the voltage V _{P1 at} the connection point P1 is expressed by the following equation (8).

[0030]

The voltage V _{P2 at} the connection point P2 is expressed by the following equation (9). However, R3 = R6, R4 = R5
I am trying.

[0032]

When the dead band width V _D is obtained from these voltages, the following equation (10) is obtained.

[0034]

Therefore, the window comparator at this time is {2R4 / (R3 + R4}) centered on the reference voltage V _R.
It will have a dead zone of (V _R -V _Z).

Next, when the input VI changes to the inside of the dead zone, the output VO is High and the switch transistor Q1 is turned on. Therefore, (V _Z −V _sat ) × {R2 / (R1 + R2)} + V _sat ≈ {R2 / (R1 + R 2)} × V _Z is applied to the buffer 2. Therefore, when the dead band width V _D at this time is calculated, the following equation (11) is calculated.

[0037]

[0038] Comparing the dead band width represented by the equation (11) with the dead band width of the equation (10), the following (1
The voltage ΔV expressed by the formula 2)

[0039]

Only spreads. That is, it has a hysteresis characteristic.

The hysteresis components at the upper end (voltage of P1) and the lower end (voltage of P2) of the dead zone are both expressed by the following equation (13).

[0042]

Are equal to each other.

[0044]

As described above, in the window comparator of the present invention, the current flowing into the inverting input of the operational amplifier can be ignored by supplying the reference voltage via the operational amplifier, and therefore the current flows through the resistors R4 and R5. There is an effect that the current values can be made equal and the hysteresis components at the upper and lower ends of the dead zone can be made exactly equal.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a window comparator showing an embodiment of the present invention.

FIG. 2 is a circuit diagram of a window comparator showing a conventional example.

[Explanation of symbols]

1 dead zone width control circuit 2 buffer 3 voltage setting circuit 4 op 5,6 comparison unit 7 the AND circuit R1~R6 resistor Q1 switching transistor V _Z dead zone width control voltage V _R the reference power source VI Input voltage VO Output voltage

Claims (2)

[Claims] 1. A dead band width control circuit comprising a switch transistor, first and second resistors and a dead band width control voltage source, and a third resistor and a third resistor whose one end is connected to the dead band width control circuit. Connected to the other end of the fourth resistor and the other end of the fourth resistor to the inverting input and connected to the inverting input and the output of the operational amplifier and the operational amplifier whose reference voltage is supplied to the non-inverting input. And a voltage setting circuit including fifth and sixth resistors having a resistance value equal to that of the fourth resistor and the third resistor, respectively, and a connection point of the third and fourth resistors and the fifth and sixth resistors. It has two comparing sections for comparing the input voltage with the potential of the connection point of the sixth resistor as a reference, and an AND circuit having two inputs for the output of the second comparing section. A window comparator, wherein the switch transistor of the dead band width control circuit is controlled by the output of the AND circuit and the output of the AND circuit. 2. The window comparator according to claim 1, wherein the voltage setting circuit uses one reference voltage source.