JPH06151902A - Solid-state imaging device - Google Patents

Solid-state imaging device

Info

Publication number
JPH06151902A
JPH06151902A JP4294980A JP29498092A JPH06151902A JP H06151902 A JPH06151902 A JP H06151902A JP 4294980 A JP4294980 A JP 4294980A JP 29498092 A JP29498092 A JP 29498092A JP H06151902 A JPH06151902 A JP H06151902A
Authority
JP
Japan
Prior art keywords
semiconductor chip
adhesive
solid
substrate surface
ceramic package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4294980A
Other languages
Japanese (ja)
Inventor
Hideyo Nozaki
英世 野崎
Masanori Omae
昌軌 大前
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP4294980A priority Critical patent/JPH06151902A/en
Publication of JPH06151902A publication Critical patent/JPH06151902A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Solid State Image Pick-Up Elements (AREA)

Abstract

(57)【要約】 【目的】 接着剤が半導体チップに及ぼす膨張応力を抑
制し、画像歪みの発生を防止する。 【構成】 半導体チップ3をダイボンドするセラミック
パッケージ1の基板面2に半導体チップ3の外形寸法よ
り小さい丸型の凹み8を設け、その上に接着剤4により
半導体チップ3をダイボンドしている。そして、半導体
チップ3とボンディングリード7を金属ワイヤ5によっ
て接続し、接着剤付き封止ガラス6でセラミックパッケ
ージ1に蓋をしている。
(57) [Abstract] [Purpose] The expansion stress exerted on the semiconductor chip by the adhesive is suppressed to prevent image distortion. [Structure] A circular recess 8 smaller than the outer dimensions of the semiconductor chip 3 is provided on a substrate surface 2 of a ceramic package 1 to which the semiconductor chip 3 is die-bonded, and the semiconductor chip 3 is die-bonded with an adhesive 4 thereon. Then, the semiconductor chip 3 and the bonding lead 7 are connected by the metal wire 5, and the ceramic package 1 is covered with the sealing glass 6 with the adhesive.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、固体撮像装置に関す
るものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device.

【0002】[0002]

【従来の技術】固体撮像装置はパッケージの基準面に対
するチップの傾斜による焦点ズレを防止し、接着性を向
上するために基板面の平坦性を要求されている。以下に
従来の固体撮像装置について説明する。図3は従来の固
体撮像装置の総組立断面図を示すものである。図3にお
いて、1はセラミックパッケージ、2は半導体チップ3
をダイボンドする基板面、4は接着剤、5は金属ワイ
ヤ、6は接着剤付き封止ガラス、7はボンディングリー
ドである。
2. Description of the Related Art A solid-state image pickup device is required to have a flat substrate surface in order to prevent defocus due to the inclination of a chip with respect to a reference plane of a package and to improve adhesiveness. The conventional solid-state imaging device will be described below. FIG. 3 is a general assembly sectional view of a conventional solid-state imaging device. In FIG. 3, 1 is a ceramic package and 2 is a semiconductor chip 3.
A substrate surface for die-bonding 4 is an adhesive, 5 is a metal wire, 6 is sealing glass with an adhesive, and 7 is a bonding lead.

【0003】この従来の固体撮像装置の組立方法は、ま
ず半導体チップ3を、セラミックパッケージ1の基板面
2に滴下した接着剤4によって接着する。ここで使用す
る接着剤4は、熱硬化性のものが一般的である。次に、
金属ワイヤ5で半導体チップ3とボンディングリード7
を接続する。これにより、電気的にセラミックパッケー
ジ1と半導体チップ3が接続される。その後、接着剤付
き封止ガラス6によりセラミックパッケージ1を封止す
る。ここで使用する接着剤付き封止ガラス6の接着剤も
同様に熱硬化性の接着剤である。
In this conventional method of assembling a solid-state image pickup device, first, a semiconductor chip 3 is bonded to a substrate surface 2 of a ceramic package 1 with an adhesive 4 dropped on the substrate surface 2. The adhesive 4 used here is generally thermosetting. next,
Semiconductor chip 3 and bonding lead 7 with metal wire 5
Connect. As a result, the ceramic package 1 and the semiconductor chip 3 are electrically connected. Then, the ceramic package 1 is sealed with the sealing glass 6 with an adhesive. The adhesive of the sealing glass 6 with an adhesive used here is also a thermosetting adhesive.

【0004】[0004]

【発明が解決しようとする課題】上記従来の構成では、
セラミックパッケージ1の基板面2が平坦な構造である
ために、組立時に、半導体チップ3の接着後の熱硬化を
含むそれ以降の熱処理によって、接着剤4から半導体チ
ップ3へ押し上げ方向の応力が作用する。すなわち、ま
ず、半導体チップ3をセラミックパッケージ1に接着剤
4で接着するが、その後の接着剤硬化の際に接着剤4の
熱膨張により、半導体チップ3に押し上げ方向の応力が
作用する。次にワイヤボンディングの際にも、加熱方式
の方法で行えば同様に応力が接着剤4から半導体チップ
3に作用する。最後に接着剤付き封止ガラス6を熱硬化
する際にも同様の応力が半導体チップ3に接着剤4から
作用する。そのほか半導体チップ3をセラミックパッケ
ージ1に接着剤4で接着した以降での熱処理は、すべて
接着剤4から応力が半導体チップ3に作用する。この接
着剤4の熱膨張による半導体チップ3へ働く押し上げ方
向の応力により、半導体チップ3の表面に歪みを発生さ
せて、半導体チップ3の結晶的欠陥および固体撮像装置
特有の画像歪み現象を発生させるという問題があった。
SUMMARY OF THE INVENTION In the above conventional configuration,
Since the substrate surface 2 of the ceramic package 1 has a flat structure, the stress in the pushing-up direction acts from the adhesive 4 to the semiconductor chip 3 during the assembly by the subsequent heat treatment including heat curing after the semiconductor chip 3 is bonded. To do. That is, first, the semiconductor chip 3 is adhered to the ceramic package 1 with the adhesive 4. However, when the adhesive is hardened thereafter, thermal expansion of the adhesive 4 causes a stress in the pushing direction to act on the semiconductor chip 3. Next, also in the wire bonding, the stress acts on the semiconductor chip 3 from the adhesive 4 if the heating method is used. Finally, also when the sealing glass 6 with adhesive is thermally cured, the same stress acts on the semiconductor chip 3 from the adhesive 4. In addition, in the heat treatment after the semiconductor chip 3 is bonded to the ceramic package 1 with the adhesive 4, the stress acts on the semiconductor chip 3 from the adhesive 4. The stress in the push-up direction that acts on the semiconductor chip 3 due to the thermal expansion of the adhesive 4 causes distortion on the surface of the semiconductor chip 3, causing crystal defects of the semiconductor chip 3 and an image distortion phenomenon peculiar to the solid-state imaging device. There was a problem.

【0005】この発明の目的は、上記従来の問題を解決
するもので、接着剤が半導体チップに及ぼす膨張応力を
抑制し、画像歪みの発生しない固体撮像装置を提供する
ことである。
An object of the present invention is to solve the above-mentioned conventional problems, and to provide a solid-state image pickup device which suppresses the expansion stress exerted on the semiconductor chip by the adhesive and does not cause image distortion.

【0006】[0006]

【課題を解決するための手段】この目的を達成するため
にこの発明の固体撮像装置は、半導体チップをダイボン
ドするパッケージの基板面に半導体チップの外形寸法よ
り小さい凹みを設け、その上に接着剤により半導体チッ
プをダイボンドしている。
In order to achieve this object, a solid-state image pickup device according to the present invention is provided with a recess smaller than the outer dimension of the semiconductor chip on a substrate surface of a package for die-bonding the semiconductor chip, and an adhesive on the recess. The semiconductor chip is die-bonded by.

【0007】[0007]

【作用】この発明の構成によれば、パッケージの基板面
に凹みを設け、その上に接着剤により半導体チップをダ
イボンドしたことにより、接着剤の熱硬化時等における
接着剤の膨張により発生する応力は凹みの中に吸収され
るため、接着剤が半導体チップに及ぼす膨張応力を抑制
でき、半導体チップの表面に歪みを生じるのを防止する
ことができる。
According to the structure of the present invention, a stress is generated by the expansion of the adhesive when the adhesive is heat-cured, etc. Since it is absorbed in the dents, it is possible to suppress the expansion stress exerted on the semiconductor chip by the adhesive and prevent the surface of the semiconductor chip from being distorted.

【0008】[0008]

【実施例】以下この発明の一実施例について、図面を参
照しながら説明する。図1はこの発明の一実施例の固体
撮像装置の総組立断面図である。図1において、1はセ
ラミックパッケージ、2は半導体チップ3をダイボンド
する基板面、4は半導体チップ3とセラミックパッケー
ジ1を接着する接着剤、5は金属ワイヤ、6は接着剤付
き封止ガラス、7はボンディングリード、8は基板面2
につくられた丸型の凹みである。なお、図2はセラミッ
クパッケージ1の斜視図である。
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 is a general assembly sectional view of a solid-state imaging device according to an embodiment of the present invention. In FIG. 1, 1 is a ceramic package, 2 is a substrate surface on which a semiconductor chip 3 is die-bonded, 4 is an adhesive agent for adhering the semiconductor chip 3 and the ceramic package 1, 5 is a metal wire, 6 is a sealing glass with an adhesive agent, 7 Is a bonding lead, 8 is a substrate surface 2
It is a round recess made in. Note that FIG. 2 is a perspective view of the ceramic package 1.

【0009】この固体撮像装置は、半導体チップ3をダ
イボンドするセラミックパッケージ1の基板面2に半導
体チップ3の外形寸法より小さい丸型の凹み8を設け、
その上に接着剤4により半導体チップ3をダイボンドし
ている。そして、半導体チップ3とボンディングリード
7を金属ワイヤ5によって接続し、接着剤付き封止ガラ
ス6でセラミックパッケージ1に蓋をしている。
In this solid-state image pickup device, a circular recess 8 smaller than the outer dimensions of the semiconductor chip 3 is provided on the substrate surface 2 of the ceramic package 1 for die-bonding the semiconductor chip 3.
The semiconductor chip 3 is die-bonded thereon with the adhesive 4. Then, the semiconductor chip 3 and the bonding lead 7 are connected by the metal wire 5, and the ceramic package 1 is covered with the sealing glass 6 with the adhesive.

【0010】以上のように構成される固体撮像装置の組
立時の作用について説明する。まず、セラミックパッケ
ージ1の基板面2に設けられた凹み8に接着剤4を充填
する。そこへ半導体チップ3をのせる。その際、接着剤
4は基板面2に設けられた丸型の凹み8からはみ出す
が、半導体チップ3は基板面2に設けられた凹み8と基
板面2のエッジ部で位置規制されることになり、半導体
チップ3の傾斜による焦点ズレについても従来レベルに
できる。
The operation at the time of assembling the solid-state image pickup device configured as described above will be described. First, the adhesive 4 is filled in the recess 8 provided in the substrate surface 2 of the ceramic package 1. The semiconductor chip 3 is placed there. At that time, the adhesive 4 protrudes from the round recess 8 provided on the substrate surface 2, but the semiconductor chip 3 is positionally regulated by the recess 8 provided on the substrate surface 2 and the edge portion of the substrate surface 2. Therefore, the focus shift due to the inclination of the semiconductor chip 3 can be made to the conventional level.

【0011】次に、熱処理により接着剤4を硬化させ
る。その際に、接着剤4の熱膨張による半導体チップ3
へ働く押し上げ方向の応力は、基板面2に設けられた丸
型の凹み8の中で吸収され、半導体チップ3には直接応
力が作用しない。以降の組立においても同様に接着剤4
の熱膨張から半導体チップ3へ働く押し上げ方向の応力
は基板面2に設けられた丸型の凹み8の中で吸収される
ことになり、半導体チップ3には直接応力が作用しな
い。
Next, the adhesive 4 is cured by heat treatment. At that time, the semiconductor chip 3 due to the thermal expansion of the adhesive 4
The stress acting in the upward direction acting on the semiconductor chip 3 is absorbed in the round recess 8 provided in the substrate surface 2, and the stress does not directly act on the semiconductor chip 3. Similarly, in the subsequent assembly, the adhesive 4
The stress in the pushing-up direction exerted on the semiconductor chip 3 due to the thermal expansion is absorbed in the round recess 8 provided on the substrate surface 2, and the stress does not directly act on the semiconductor chip 3.

【0012】以上のようにこの実施例によれば、セラミ
ックパッケージ1の基板面2に半導体チップ3の外形寸
法より小さい凹み8を設け、その上に接着剤4により半
導体チップ3をダイボンドしたことにより、接着剤4の
熱硬化時等における接着剤4の膨張により発生する応力
は凹み8の中に吸収されるため、接着剤4が半導体チッ
プ3に及ぼす膨張応力を抑制し、半導体チップ3の表面
に歪みが生じるのを防止することができ、画像歪みの発
生しない優れた固体撮像装置を実現できる。なお、凹み
8の深さは、従来の平坦な基板面で構成した場合のチッ
プ表面の歪み量を求め、それを解消できる深さを設定す
る。
As described above, according to this embodiment, the recess 8 smaller than the outer dimension of the semiconductor chip 3 is provided on the substrate surface 2 of the ceramic package 1, and the semiconductor chip 3 is die-bonded thereon with the adhesive 4. Since the stress generated by the expansion of the adhesive 4 at the time of heat curing of the adhesive 4 is absorbed in the recess 8, the expansion stress exerted on the semiconductor chip 3 by the adhesive 4 is suppressed, and the surface of the semiconductor chip 3 is suppressed. It is possible to prevent the occurrence of distortion, and it is possible to realize an excellent solid-state imaging device in which image distortion does not occur. The depth of the recess 8 is determined by obtaining the amount of strain on the chip surface in the case of a conventional flat substrate surface and setting the depth at which it can be eliminated.

【0013】なお、この実施例では基板面2に設けられ
た凹み8を丸型としたが、丸型の代わりに角型としても
よい。ただし角型の場合も半導体チップ3の外形寸法よ
り小さく設定する。
In this embodiment, the recess 8 provided on the substrate surface 2 is round, but it may be square instead of round. However, in the case of a square type as well, it is set smaller than the external dimensions of the semiconductor chip 3.

【0014】[0014]

【発明の効果】以上のようにこの発明は、パッケージの
基板面に半導体チップの外形寸法より小さい凹みを設
け、その上に接着剤により半導体チップをダイボンドし
たことにより、接着剤の熱硬化時等における接着剤の膨
張により発生する応力は凹みの中に吸収されるため、接
着剤が半導体チップに及ぼす膨張応力を抑制し、半導体
チップの表面に歪みが生じるのを防止することができ、
画像歪みの発生しない優れた固体撮像装置を実現できる
ものである。
As described above, according to the present invention, the recesses smaller than the outer dimensions of the semiconductor chip are provided on the substrate surface of the package, and the semiconductor chip is die-bonded thereon with the adhesive, so that the adhesive is thermally cured. Since the stress generated by the expansion of the adhesive in is absorbed in the recess, it is possible to suppress the expansion stress exerted on the semiconductor chip by the adhesive, it is possible to prevent the surface of the semiconductor chip from being distorted,
It is possible to realize an excellent solid-state imaging device in which image distortion does not occur.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の一実施例の固体撮像装置の総組立断
面図である。
FIG. 1 is a general assembly sectional view of a solid-state imaging device according to an embodiment of the present invention.

【図2】この発明の一実施例の固体撮像装置のセラミッ
クパッケージの斜視図である。
FIG. 2 is a perspective view of a ceramic package of a solid-state image pickup device according to an embodiment of the present invention.

【図3】従来の固体撮像装置の総組立断面図である。FIG. 3 is a general assembly sectional view of a conventional solid-state imaging device.

【符号の説明】[Explanation of symbols]

1 セラミックパッケージ 2 基板面 3 半導体チップ 4 接着剤 8 凹み 1 Ceramic Package 2 Board Surface 3 Semiconductor Chip 4 Adhesive 8 Recess

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 パッケージの基板面に接着剤により半導
体チップをダイボンドした固体撮像装置であって、 前記半導体チップをダイボンドするパッケージの基板面
に前記半導体チップの外形寸法より小さい凹みを設けた
ことを特徴とする固体撮像装置。
1. A solid-state imaging device in which a semiconductor chip is die-bonded to a substrate surface of a package with an adhesive, wherein a recess smaller than an outer dimension of the semiconductor chip is provided on a substrate surface of the package to which the semiconductor chip is die-bonded. A characteristic solid-state imaging device.
JP4294980A 1992-11-04 1992-11-04 Solid-state imaging device Pending JPH06151902A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4294980A JPH06151902A (en) 1992-11-04 1992-11-04 Solid-state imaging device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4294980A JPH06151902A (en) 1992-11-04 1992-11-04 Solid-state imaging device

Publications (1)

Publication Number Publication Date
JPH06151902A true JPH06151902A (en) 1994-05-31

Family

ID=17814799

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4294980A Pending JPH06151902A (en) 1992-11-04 1992-11-04 Solid-state imaging device

Country Status (1)

Country Link
JP (1) JPH06151902A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007227673A (en) * 2006-02-23 2007-09-06 Olympus Imaging Corp Imaging device
CN113611753A (en) * 2021-07-20 2021-11-05 东莞先导先进科技有限公司 Infrared detector packaging structure and packaging method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007227673A (en) * 2006-02-23 2007-09-06 Olympus Imaging Corp Imaging device
CN113611753A (en) * 2021-07-20 2021-11-05 东莞先导先进科技有限公司 Infrared detector packaging structure and packaging method
CN113611753B (en) * 2021-07-20 2024-05-28 东莞先导先进科技有限公司 Infrared detector packaging structure and packaging method

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