JPH0615310U - High frequency circuit board - Google Patents
High frequency circuit boardInfo
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- JPH0615310U JPH0615310U JP5266092U JP5266092U JPH0615310U JP H0615310 U JPH0615310 U JP H0615310U JP 5266092 U JP5266092 U JP 5266092U JP 5266092 U JP5266092 U JP 5266092U JP H0615310 U JPH0615310 U JP H0615310U
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- circuit board
- line conductor
- frequency circuit
- frequency
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Abstract
(57)【要約】
【目的】 電気的な不連続が少なくなるなど、性能面の
向上が図れ、また、増幅器の設計に必要なＦＥＴのイン
ピ−ダンス評価や半導体装置の等価回路化が容易に行え
るなど実用面での効果も大きいキャリア整合構造の高周
波高出力半導体装置が実現できる高周波回路基板を提供
すること。
【構成】 絶縁基板１１の表面に線路導体１２が、また
裏面に接地導体１３が形成された高周波回路基板におい
て、前記絶縁基板１１に対し、厚さの薄い部分から厚い
部分へと変化させ、前記絶縁基板１１の厚さの厚い方を
薄い方より前記線路導体１２の幅を広くする。
(57) [Abstract] [Purpose] It is possible to improve performance such as reducing electrical discontinuity, and it is easy to evaluate the impedance of FET necessary for amplifier design and to make an equivalent circuit of a semiconductor device. To provide a high-frequency circuit board capable of realizing a high-frequency, high-power semiconductor device having a carrier matching structure, which has great practical effects. In a high-frequency circuit board in which a line conductor 12 is formed on a front surface of an insulating substrate 11 and a ground conductor 13 is formed on a rear surface, the insulating substrate 11 is changed from a thin portion to a thick portion, and The width of the line conductor 12 is made wider when the insulating substrate 11 is thicker than when it is thin.
Description
【０００１】[0001]
本考案は、キャリア整合の高周波高出力半導体装置などに使用されるもので、 例えばキャリアプレ−ト上に配置される半導体素子の入出力インピ−ダンス整合 回路を構成する高周波回路基板に関する。 The present invention relates to a high-frequency circuit board used for a carrier-matched high-frequency and high-power semiconductor device, for example, which constitutes an input / output impedance matching circuit of a semiconductor element arranged on a carrier plate.
【０００２】[0002]
従来、高周波回路基板はマイクロ波通信機器を構成するデバイスとして、キャ リア整合の高周波高出力半導体装置などに使用されている。 Conventionally, a high frequency circuit board has been used as a device constituting a microwave communication device in a carrier matching high frequency and high power semiconductor device.
【０００３】 例えば、高周波回路基板の一つとして、図３に示されるようなマイクロストリ ップ線路構造のものが知られている。For example, as one of high-frequency circuit boards, one having a microstrip line structure as shown in FIG. 3 is known.
【０００４】 図３は、高周波回路基板の斜視図で、２０は、厚さがＨの絶縁基板である。絶 縁基板２０の表面には、幅Ｗの金属線路導体２１がＡｕ（金）等で形成され、ま た、裏面にはそのほぼ全面に金属接地導体２２が同様にＡｕ等の蒸着で形成され る。FIG. 3 is a perspective view of the high-frequency circuit board, and 20 is an insulating board having a thickness H. A metal line conductor 21 having a width W is formed of Au (gold) or the like on the front surface of the insulating substrate 20, and a metal ground conductor 22 is similarly formed on the back surface thereof almost entirely by vapor deposition of Au or the like. It
【０００５】 上記した構成の高周波回路基板２０において、線路導体２１や接地導体２２で 構成されるマイクロストリップ線路の特性インピ−ダンスは、絶縁基板２０の比 誘電率εｒや、線路導体２１の幅Ｗ，絶縁基板の厚さＨで決まる。In the high-frequency circuit board 20 having the above-described configuration, the characteristic impedance of the microstrip line constituted by the line conductor 21 and the ground conductor 22 is the relative permittivity εr of the insulating substrate 20 and the width W of the line conductor 21. , H is determined by the thickness H of the insulating substrate.
【０００６】 しかし、上記構成の高周波回路基板２０を、キャリア整合の高周波高出力半導 体装置に使用し、その高周波回路基板が所望の特性インピ−ダンスとなるように 設計する際、次のような問題がある。However, when the high frequency circuit board 20 having the above structure is used for a carrier matching high frequency high power semiconductor device and the high frequency circuit board is designed to have a desired characteristic impedance, the following is performed. There is a problem.
【０００７】 以下、図４を参照して、その問題点を説明する。Hereinafter, the problem will be described with reference to FIG.
【０００８】 図４は、マイクロストリップ線路が構成された高周波回路基板や、チップ寸法 の大きい高出力電界効果トランジスタ（以下ＦＥＴと言う。）を用いて、高周波 高出力半導体装置を構成した例を示す平面図である。FIG. 4 shows an example in which a high-frequency high-power semiconductor device is configured by using a high-frequency circuit board having a microstrip line and a high-output field effect transistor (hereinafter referred to as FET) having a large chip size. It is a top view.
【０００９】 なお、図４（ａ）（ｂ）（ｃ）の高周波高出力半導体装置においては、それぞ れ形状の異なったマイクロストリップ線路を持つ高周波回路基板が使用されてお り、（ｄ）は、図４（ａ）（ｂ）（ｃ）のＡ−Ａ断面図である。In the high-frequency and high-power semiconductor devices of FIGS. 4A, 4B, and 4C, high-frequency circuit boards having microstrip lines having different shapes are used, and FIG. FIG. 4A is a sectional view taken along line AA of FIGS. 4A, 4B, and 4C.
【００１０】 図４の各図面においては、対応する部品には同一の符号を付し重複する説明は 省略する。In each of the drawings of FIG. 4, corresponding parts are designated by the same reference numerals, and redundant description will be omitted.
【００１１】 １は、ＦＥＴチップで、ＦＥＴチップ１を挟んでその両側に、例えば図３で説 明したような高周波回路基板２が配置される。Reference numeral 1 denotes an FET chip, and a high frequency circuit board 2 as described in FIG. 3 is arranged on both sides of the FET chip 1 with the FET chip 1 interposed therebetween.
【００１２】 高周波回路基板２の表面には、金属の線路導体２ａが形成され、裏面には、金 属の接地導体２ｂ（図４ｄ）が形成される。A metal line conductor 2 a is formed on the front surface of the high-frequency circuit board 2, and a metal ground conductor 2 b (FIG. 4 d) is formed on the back surface.
【００１３】 ＦＥＴチップ１や高周波回路基板２は、熱伝導率の良い金属プレ−ト（以後キ ャリアプレ−トと言う。）３に半田付けされ、また、ＦＥＴチップ１と線路導体 ２ａは複数のＡｕボンディングワイヤ４で接続される。The FET chip 1 and the high-frequency circuit board 2 are soldered to a metal plate (hereinafter referred to as a carrier plate) 3 having a good thermal conductivity, and the FET chip 1 and the line conductor 2a are plural. Connected by Au bonding wire 4.
【００１４】[0014]
図４（ａ）では、高周波回路基板２の線路導体２ａの幅を、ＦＥＴチップ１の 幅に合わせて広く形成し、ＦＥＴチップ１と線路導体２ａ間を結ぶ全てのボンデ ィングワイヤ４を平行に配線している。 In FIG. 4 (a), the width of the line conductor 2a of the high-frequency circuit board 2 is widened to match the width of the FET chip 1, and all the bonding wires 4 connecting the FET chip 1 and the line conductor 2a are wired in parallel. is doing.
【００１５】 ところで、高周波回路基板２の線路導体２ａに接続される外部回路の線路導体 （図示せず。）は、高周波領域での伝幡ロスを抑えるために、線路導体２ａに比 べて狭く形成される。By the way, the line conductor (not shown) of the external circuit connected to the line conductor 2a of the high-frequency circuit board 2 is narrower than the line conductor 2a in order to suppress transmission loss in the high-frequency region. It is formed.
【００１６】 したがって、キャリア整合形高周波高出力半導体装置と外部回路とを接続する 場合、高周波回路基板２の線路導体２ａと外部回路との接続部で、線路導体の幅 が変化し、そこに電気的な不連続が生じる。この結果、ＶＳＷＲが悪化したり、 また、ＦＥＴが異常発振したりするなどの問題がある。Therefore, when the carrier-matched high-frequency high-power semiconductor device and the external circuit are connected, the width of the line conductor changes at the connection portion between the line conductor 2a of the high-frequency circuit board 2 and the external circuit, and the Discontinuity occurs. As a result, there are problems such as deterioration of VSWR and abnormal oscillation of the FET.
【００１７】 図４（ｂ）では、高周波回路基板２の線路導体２ａの幅を、外部回路の金属線 路導体（図示せず。）の幅と等しくなるように細くしている。この場合、高周波 回路基板２の線路導体２ａと外部回路との接続部に電気的な不連続はなくなる。 しかし、ＦＥＴチップ１の幅が線路導体２ａの幅より大きくなり、ＦＥＴチッ プ１と線路導体２ａとを接続する全てのボンディングワイヤ４を平行に配線する ことができなくなる。In FIG. 4B, the width of the line conductor 2 a of the high-frequency circuit board 2 is made thin so as to be equal to the width of the metal line conductor (not shown) of the external circuit. In this case, there is no electrical discontinuity at the connection between the line conductor 2a of the high frequency circuit board 2 and the external circuit. However, the width of the FET chip 1 becomes larger than the width of the line conductor 2a, and it becomes impossible to arrange all the bonding wires 4 connecting the FET chip 1 and the line conductor 2a in parallel.
【００１８】 このためボンディングワイヤの長さが不均一になり、高出力ＦＥＴを構成する 各単位ＦＥＴの電磁波に位相差が生じ、動作条件が異なったものになり、高出力 ＦＥＴの性能に悪い影響を与える。Therefore, the length of the bonding wire becomes non-uniform, the phase difference occurs between the electromagnetic waves of the unit FETs forming the high-power FET, and the operating conditions become different, which adversely affects the performance of the high-power FET. give.
【００１９】 また、ＦＥＴチップ１と線路導体２ａとの位置がわずかでもずれると、ボンデ ィングワイヤ４の状態が変化し、インピ−ダンスが変ってしまう。Further, even if the positions of the FET chip 1 and the line conductor 2a are slightly deviated from each other, the state of the bonding wire 4 is changed and the impedance is changed.
【００２０】 そのため、高周波高出力半導体装置の均一性が悪くなる。Therefore, the uniformity of the high frequency and high output semiconductor device is deteriorated.
【００２１】 また、図４（ｃ）は、高周波回路基板２の線路導体２ａの幅を、ＦＥＴチップ との接続部２ｃで広くし、外部回路の金属線路導体（図示せず。）との接続部２ ｄで狭くしている。Further, in FIG. 4C, the width of the line conductor 2a of the high-frequency circuit board 2 is widened at the connection portion 2c with the FET chip, and the line conductor 2a is connected with the metal line conductor (not shown) of the external circuit. It is narrowed at part 2d.
【００２２】 上記の構成によれば、ＦＥＴチップ１との接続部で線路導体２ｃが広くなって いるので、全てのボンディングワイヤ４を平行に配線できる。According to the above configuration, since the line conductor 2c is wide at the connection portion with the FET chip 1, all the bonding wires 4 can be wired in parallel.
【００２３】 しかし、高周波回路基板２の線路導体２ａの幅が途中で変化しているので、こ の部分で電気的な不連続が生じ、電磁界が乱れ、増幅器の設計に必要なＦＥＴチ ップのインピ−ダンス評価、および等価回路導出の精度が悪くなる。However, since the width of the line conductor 2a of the high-frequency circuit board 2 changes midway, an electrical discontinuity occurs at this portion, the electromagnetic field is disturbed, and the FET chip necessary for the amplifier design is disturbed. The accuracy of the impedance evaluation and the derivation of the equivalent circuit deteriorates.
【００２４】 ところで、現在ＦＥＴの高出力化が進んでおり、これに伴いＦＥＴチップの寸 法もますます大きくなる傾向がある。By the way, the output of FETs is currently increasing, and along with this, the size of FET chips tends to increase.
【００２５】 したがって、キャリア整合形高周波高出力半導体装置の構成に当たって、上記 したような欠点がより顕在化することが考えられる。Therefore, it is conceivable that the above-mentioned drawbacks will be more prominent in the structure of the carrier matching type high frequency and high power semiconductor device.
【００２６】 本考案は、キャリア整合構造の高周波高出力半導体装置などを構成する場合に 、特性の悪化を防ぎ、かつ回路の設計性のよい高周波回路基板を提供することを 目的とする。An object of the present invention is to provide a high-frequency circuit board which prevents deterioration of characteristics and has good circuit designability when a high-frequency and high-power semiconductor device having a carrier matching structure is constructed.
【００２７】[0027]
本考案は、絶縁基板の表面に線路導体が、また裏面に接地導体が形成された高 周波回路基板において、前記線路導体の延長方向に沿って、前記絶縁基板の厚さ を相違させ、前記絶縁基板の厚さが厚い部分に形成される前記線路導体の幅を、 厚さが薄い部分より広く構成する。 According to the present invention, in a high-frequency circuit board in which a line conductor is formed on the surface of an insulating substrate and a ground conductor is formed on the back surface, the thickness of the insulating substrate is made different along the extension direction of the line conductor, The width of the line conductor formed in the thick portion of the substrate is made wider than that in the thin portion.
【００２８】[0028]
上記構成の高周波回路基板によれば、絶縁基板の厚さを線路導体の延長方向に 沿って相違させ、それに合わせて線路導体の幅を変えている。 According to the high-frequency circuit board having the above structure, the thickness of the insulating board is made different along the extension direction of the line conductor, and the width of the line conductor is changed accordingly.
【００２９】 したがって、高周波回路基板の線路導体の幅を、外部回路に接続される側では 、外部回路の線路導体の幅と一致させることができ、また、ＦＥＴチップに接続 される側では、ＦＥＴチップの大きさに合わせて大きくできる。そのとき、外部 回路に接続される部分から、ＦＥＴチップに接続される部分まで、高周波回路基 板部分の線路導体に電気的な不連続もなく電磁界の乱れも小さくできる。Therefore, the width of the line conductor of the high-frequency circuit board can be matched with the width of the line conductor of the external circuit on the side connected to the external circuit, and the width of the line conductor of the FET chip can be changed on the side connected to the FET chip. It can be enlarged according to the size of the tip. At that time, from the portion connected to the external circuit to the portion connected to the FET chip, there is no electrical discontinuity in the line conductor of the high-frequency circuit board portion and the disturbance of the electromagnetic field can be reduced.
【００３０】[0030]
以下、本考案の一実施例について、キャリア整合構造の高周波高出力半導体装 置に用いた場合を例に取って説明する。 Hereinafter, one embodiment of the present invention will be described by taking as an example the case of using it in a high frequency high power semiconductor device having a carrier matching structure.
【００３１】 図１は、本考案による高周波回路基板の一実施例を示す斜視図で、また図２は 、図１に示した高周波回路基板を、キャリア整合構造の高周波高出力半導体装置 に組込んだ状態を示す図である。なお、図２（ａ）は平面図、（ｂ）は（ａ）の Ａ−Ａで断面した図である。FIG. 1 is a perspective view showing an embodiment of a high frequency circuit board according to the present invention, and FIG. 2 is a schematic diagram showing a high frequency circuit board shown in FIG. FIG. 2A is a plan view and FIG. 2B is a sectional view taken along line AA of FIG.
【００３２】 図１は、本考案の高周波回路基板１０を示す斜視図で、１１は絶縁基板で、図 の左端１１ａは厚さが均一で、一番薄く構成されている。また、中間１１ｂは、 図の右方向へ順に厚くなるように傾斜し、また、右端１１ｃは均一で、一番厚く 構成されている。FIG. 1 is a perspective view showing a high frequency circuit board 10 of the present invention. Reference numeral 11 denotes an insulating board, and a left end 11a of the drawing has a uniform thickness and is the thinnest. Further, the middle portion 11b is inclined so as to be thicker in the right direction in the drawing, and the right end 11c is uniform and is thickest.
【００３３】 絶縁基板１１の表面に形成される金属線路導体１２は、高周波回路基板１０の 全体に亘って特性インピ−ダンスが一定となるような幅に形成される。The metal line conductor 12 formed on the surface of the insulating substrate 11 is formed in a width such that the characteristic impedance is constant over the entire high frequency circuit substrate 10.
【００３４】 例えば、絶縁基板１１の厚さが薄い図の左端１１ａでは、線路導体１２の幅は 狭く一定で、厚さが傾斜する中間部分１１ｂでは、厚さが厚くなるにしたがって 徐々に幅が広くなっている。そして、厚さの厚い右端１１ｃでは、線路の幅が広 く一定になっている。For example, at the left end 11a of the figure where the insulating substrate 11 is thin, the width of the line conductor 12 is narrow and constant, and at the middle portion 11b where the thickness is inclined, the width gradually increases as the thickness increases. It is getting wider. At the thick right end 11c, the width of the line is wide and constant.
【００３５】 例えば絶縁基板を構成する材質が、比誘電率εｒ＝１０．５のアルミナ（Ａｌ２ Ｏ３）のとき、マイクロストリップ線路の特性インピ−ダンスを５０Ωとする ためには、絶縁基板の厚さＨと、線路導体の幅Ｗは、Ｗ＝０．９Ｈとなるように 構成される。For example, when the material forming the insulating substrate is alumina (Al 2 O 3 ) having a relative permittivity εr = 10.5, in order to set the characteristic impedance of the microstrip line to 50Ω, The thickness H and the width W of the line conductor are configured so that W = 0.9H.
【００３６】 なお、絶縁基板１１の裏面には、ほぼ全面に接地導体１３が形成される。Note that the ground conductor 13 is formed on almost the entire back surface of the insulating substrate 11.
【００３７】 上記した構成の高周波回路基板１０を用いて、キャリア整合構造の高周波高出 力半導体装置を構成する場合、図２に示すように高周波回路基板１０の線路導体 １２の幅が広くなっている部分がＦＥＴチップ２１と隣り合うように、ＦＥＴチ ップ２１の両側に配置する。When a high-frequency, high-output semiconductor device having a carrier matching structure is formed by using the high-frequency circuit board 10 having the above-described structure, the width of the line conductor 12 of the high-frequency circuit board 10 becomes wide as shown in FIG. The FET chip 21 is arranged on both sides so that the existing portion is adjacent to the FET chip 21.
【００３８】 なお、図２で図１と同一部分には同一符号を付し、重複する説明は省略する。 また、ＦＥＴチップ２１や高周波回路基板１０は、熱伝導率の良いキャリアプ レ−ト２２に半田付けされ、また、ＦＥＴチップ２１と高周波回路基板１０の線 路導体１２は複数のＡｕボンディングワイヤ２３で接続される。In FIG. 2, the same parts as those in FIG. 1 are designated by the same reference numerals, and the duplicated description will be omitted. Further, the FET chip 21 and the high-frequency circuit board 10 are soldered to the carrier plate 22 having good thermal conductivity, and the wire conductors 12 of the FET chip 21 and the high-frequency circuit board 10 are plural Au bonding wires 23. Connected by.
【００３９】 なお、高周波回路基板１０の左右の両端部分が平坦になっているので、ボンデ ィングワイヤ２３によるＦＥＴチップ２１との接続作業や、外部回路（図示せず 。）との接続作業が容易に行える。Since the left and right ends of the high-frequency circuit board 10 are flat, connection work with the FET chip 21 by the bonding wire 23 and connection work with an external circuit (not shown) are facilitated. You can do it.
【００４０】 上記した本考案によれば、従来の高周波回路基板が持つ欠点は、以下の通り解 消される。According to the present invention described above, the drawbacks of the conventional high-frequency circuit board are solved as follows.
【００４１】 （ａ）外部回路に接続される側の高周波回路基板１０の線路導体１２の幅を細 くし、外部回路の線路導体の幅と一致させることができる。したがって、キャリ ア整合形高周波高出力半導体装置と外部回路との接続部の電気的な不連続を少な くでき、良好な性能の高周波高出力半導体装置が得られる。(A) The width of the line conductor 12 of the high-frequency circuit board 10 on the side connected to the external circuit can be reduced to match the width of the line conductor of the external circuit. Therefore, the electrical discontinuity of the connection between the carrier matching type high frequency and high output semiconductor device and the external circuit can be reduced, and the high frequency and high output semiconductor device with good performance can be obtained.
【００４２】 （ｂ）ＦＥＴチップに接続される側の高周波回路基板の線路導体の幅を、ＦＥ Ｔチップの大きさに合わせて太くできる。したがって、ＦＥＴチップと線路導体 を接続する複数のボンディングワイヤを平行に配線できる。このため、高出力Ｆ ＥＴを構成する各単位ＦＥＴが均一に動作し、また、完成した高周波高出力半導 体装置間のインピ−ダンスのばらつきも小さくなる。(B) The width of the line conductor of the high-frequency circuit board on the side connected to the FET chip can be increased according to the size of the FET chip. Therefore, a plurality of bonding wires connecting the FET chip and the line conductor can be wired in parallel. For this reason, the unit FETs constituting the high-power FET operate uniformly, and the variation in impedance between the completed high-frequency and high-power semiconductor devices is reduced.
【００４３】 （ｃ）線路導体の幅を狭い部分から、広い部分へと変化させ、その際、同時に 絶縁基板の厚さも変えている。したがって、高周波回路基板の全体に亘ってマイ クロストリップ線路の特性インピ−ダンスを、所望の一定の値に設定できる。こ れにより、高周波回路基板部分の線路導体に電気的な不連続がなく電磁界の乱れ が小さい。(C) The width of the line conductor is changed from a narrow portion to a wide portion, and at the same time, the thickness of the insulating substrate is changed. Therefore, the characteristic impedance of the my-cross trip line can be set to a desired constant value over the entire high-frequency circuit board. As a result, there is no electrical discontinuity in the line conductor of the high frequency circuit board, and the disturbance of the electromagnetic field is small.
【００４４】 なお、上記した実施例では、高周波回路基板を構成する絶縁基板の厚さを、連 続的に変化させているが、厚さの薄い部分から厚い部分へと階段状に変化させて 構成することもできる。この場合、誘電体基板の厚さが厚い部分の線路導体の幅 を、厚さが薄い部分より広くすることになる。Although the thickness of the insulating substrate that constitutes the high-frequency circuit board is continuously changed in the above-described embodiment, it is changed stepwise from a thin portion to a thick portion. It can also be configured. In this case, the width of the line conductor in the thick portion of the dielectric substrate is made wider than that in the thin portion.
【００４５】 上記したように本考案によれば、ＦＥＴチップのインピ−ダンス評価や等価回 路化が容易になり、また精度もよくなり、増幅器の設計に有効である。As described above, according to the present invention, the impedance evaluation and the equivalent circuit of the FET chip are facilitated, and the accuracy is improved, which is effective in the design of the amplifier.
【００４６】 また、誘電体基板の厚さや傾斜、線路導体の幅の調節で、マイクロストリップ 線路の特性インピ−ダンスを所望のインピ−ダンスに設定できる。Further, the characteristic impedance of the microstrip line can be set to a desired impedance by adjusting the thickness and inclination of the dielectric substrate and the width of the line conductor.
【００４７】[0047]
本考案によれば、電気的な不連続が少なくなるなど、性能面の向上が図れ、ま た、増幅器の設計に必要なＦＥＴのインピ−ダンス評価や半導体装置の等価回路 化が容易に行えるなど実用面での効果も大きいキャリア整合構造の高周波高出力 半導体装置を実現できる。 According to the present invention, it is possible to improve the performance such as a decrease in electrical discontinuity, and it is possible to easily evaluate the impedance of the FET required for the design of the amplifier and to easily form an equivalent circuit of the semiconductor device. It is possible to realize a high-frequency, high-power semiconductor device with a carrier matching structure that is highly effective in practical use.
【図１】本考案の一実施例を示す斜視図である。FIG. 1 is a perspective view showing an embodiment of the present invention.
【図２】本考案を、キャリア整合構造の高周波高出力半
導体装置に組込んだ状態を示す平面図である。FIG. 2 is a plan view showing a state in which the present invention is incorporated into a high-frequency high-power semiconductor device having a carrier matching structure.
【図３】従来の例を示す平面図である。FIG. 3 is a plan view showing a conventional example.
【図４】従来の例を、キャリア整合構造の高周波高出力
半導体装置に組込んだ状態を示す平面図である。FIG. 4 is a plan view showing a state in which a conventional example is incorporated in a high-frequency high-power semiconductor device having a carrier matching structure.
１０…高周波回路基板 １１…誘電体基板 １２…線路導体 １３…接地導体 10 ... High-frequency circuit board 11 ... Dielectric board 12 ... Line conductor 13 ... Ground conductor
───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.5 識別記号 庁内整理番号 ＦＩ 技術表示箇所 Ｈ０５Ｋ 1/02 Ｐ 7047−4Ｅ ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 5 Identification code Internal reference number FI technical display location H05K 1/02 P 7047-4E
Claims (1)
に接地導体が形成された高周波回路基板において、前記
線路導体の延長方向に沿って、前記絶縁基板の厚さを相
違させ、前記絶縁基板の厚さが厚い部分に形成される前
記線路導体の幅を、厚さが薄い部分より広くしたことを
特徴とする高周波回路基板。1. A high-frequency circuit board in which a line conductor is formed on the front surface of an insulating substrate and a ground conductor is formed on the back surface, and the thickness of the insulating substrate is made different along the extension direction of the line conductor. A high frequency circuit board, wherein the width of the line conductor formed in a thick portion of the substrate is made wider than that of a thin portion.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5266092U JPH0615310U (en) | 1992-07-28 | 1992-07-28 | High frequency circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5266092U JPH0615310U (en) | 1992-07-28 | 1992-07-28 | High frequency circuit board |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0615310U true JPH0615310U (en) | 1994-02-25 |
Family
ID=12921023
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5266092U Pending JPH0615310U (en) | 1992-07-28 | 1992-07-28 | High frequency circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0615310U (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004095679A (en) * | 2002-08-29 | 2004-03-25 | Fujitsu Ltd | Component mounting method and electronic circuit using the method |
| JP2009505570A (en) * | 2005-08-15 | 2009-02-05 | ノースロップ グルムマン コーポレイション | Board lunch with taper thickness |
| JP2010021505A (en) * | 2008-06-13 | 2010-01-28 | Sony Corp | Connection method, and substrate |
| JP2011101327A (en) * | 2009-11-09 | 2011-05-19 | Canon Inc | Signal transmission line |
| JP2014204164A (en) * | 2013-04-01 | 2014-10-27 | 住友電気工業株式会社 | Transmission line, amplifier circuit device, and transmission line manufacturing method |
| JPWO2016031691A1 (en) * | 2014-08-29 | 2017-04-27 | 株式会社村田製作所 | Multilayer circuit board manufacturing method and multilayer circuit board |
-
1992
- 1992-07-28 JP JP5266092U patent/JPH0615310U/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004095679A (en) * | 2002-08-29 | 2004-03-25 | Fujitsu Ltd | Component mounting method and electronic circuit using the method |
| JP2009505570A (en) * | 2005-08-15 | 2009-02-05 | ノースロップ グルムマン コーポレイション | Board lunch with taper thickness |
| JP2010021505A (en) * | 2008-06-13 | 2010-01-28 | Sony Corp | Connection method, and substrate |
| JP2011101327A (en) * | 2009-11-09 | 2011-05-19 | Canon Inc | Signal transmission line |
| JP2014204164A (en) * | 2013-04-01 | 2014-10-27 | 住友電気工業株式会社 | Transmission line, amplifier circuit device, and transmission line manufacturing method |
| JPWO2016031691A1 (en) * | 2014-08-29 | 2017-04-27 | 株式会社村田製作所 | Multilayer circuit board manufacturing method and multilayer circuit board |
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