JPH0616323B2 - Tape running reversing device for magnetic recording / reproducing apparatus - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a tape running / reversing device of a magnetic recording / reproducing apparatus, and more particularly to continuously recording an audio signal at the time of tape running / reversing.
The present invention relates to a tape running / reversing device of a magnetic recording / reproducing device suitable for reproduction.

[Conventional technology]

Multitrack as a new feature of 8mm video
There is a PCM voice recording / playback method. In this system, recording and reproduction can be performed for a long time of, for example, 24 hours by running and scanning a multi-track formed in multiple stages in the tape width direction. In this system, there are two methods, one in which multiple stages of tracks are in the same tape running direction and the other is in both forward and reverse directions. Although having the same tape running direction has the advantage that the circuit and mechanism can be simply configured, when the end of the tape is reached, the tape must be run backwards and returned to the beginning of the tape, which may take a few minutes, for example. Since it takes time, it is inferior in operability. On the other hand, the method capable of recording / reproducing in both the forward and reverse directions does not require the time as described above and is therefore excellent in operability. As a device related to the system capable of recording and reproducing in both the forward and reverse directions, there is, for example, JP-A-58-155510.

[Problems to be solved by the invention]

However, in the above-described device capable of recording / reproducing in both the forward and reverse directions, no consideration is given to continuously recording / reproducing the audio signal in both the forward rotation direction and the reverse rotation direction. There is a problem in that the audio signal is lost during the period from when the recording or reproduction is set up.

It is an object of the present invention to provide a tape running reversing device for a magnetic recording / reproducing apparatus in which audio signals are not lost when the tape running is reversed.

[Means for solving problems]

To achieve the above object, in the present invention, memory means for storing a recording or reproducing signal, speeds of the rotary magnetic head means and tape driving means in accordance with the storage amount of the memory means, and reading from the memory means or A means for controlling the writing speed is provided so that the speed is increased according to the increase in the storage amount of the memory means at the time of recording, and the speed is decreased according to the increase of the storage amount of the memory means at the time of reproduction. Configured to.

[Action]

When the tape end is detected, the reading from the memory means is temporarily stopped and the recording signal is stored in the memory means. Further, the traveling direction of the tape drive means is reversed in response to the detection of the tape end. The speed of the rotary magnetic head means and the tape drive means and the read speed from the memory means are increased as compared with the steady state in accordance with the increase in the amount of recording signals stored in the memory means. After the scheduled time has elapsed, the signal is read from the memory means at an increased speed and recorded on the magnetic tape. afterwards,
When there is no increase in the recording signal of the memory means, the speeds of the rotary magnetic head means and tape drive means and the read speed from the memory means return to the steady state. An index signal is added to the signal read from the memory means at a high speed and recorded on the magnetic tape.

At the time of reproduction, when the index signal is detected from the next track which is audio-continuous with the predetermined reproduction track, the reproduction signal having the index signal is stored in the memory means. After that, in response to the detection of the tape end, the stored reproduction signal is read from the memory means, and when a signal having no index signal is reproduced from a predetermined track on which a signal having the index signal is recorded, the reproduction signal is reproduced. The signal is temporarily stored in another memory means. When all the reproduction signals having the index signal are released, the reading of the reproduction signal having no index signal is started from another memory means. At this time, the writing speeds of the rotary magnetic head means, the tape driving means, and the other memory means are slower than those in the steady state in accordance with the increase in the amount of signals stored in the memory means. That is, the read speed of the other memory means is higher than the write speed. For this reason, the signal storage amount of another memory means decreases. When a certain period of time elapses and the signal increment of another memory means disappears, the speed of the rotary magnetic head means and the tape drive means and the writing speed of the other memory means return to the steady state.

As described above, according to the present invention, the audio signal can be continuously recorded / reproduced.

〔Example〕

 An embodiment of the present invention will be described in detail with reference to FIGS.

FIG. 2 is a plan view showing a winding state of a magnetic tape around a rotary magnetic head device, and FIG. 3 is a view showing a tape pattern of the magnetic tape. In these figures, 1 is a rotary magnetic head device in which magnetic heads (not shown) facing 180 ° are mounted, 2 is a magnetic tape, and 3 and 4 are tape guides.

The magnetic tape 2 is spirally wound around the rotary magnetic head device 1 by tape guides 3 and 4 over a predetermined angle range. In the multi-track PCM audio recording / reproducing system (multi-track system), the winding range is divided into, for example, six as shown by symbols A to F in FIG. 2, and each track is shown in FIG. It is configured to be stacked in the tape width direction. Then, for example, A, C, and E tracks are formed corresponding to the tape running in the forward direction, and B,
The D and F tracks are formed corresponding to the tape running in the opposite direction.

FIG. 1 is a block diagram during recording according to an embodiment of the present invention.

In the figure, 5 is an A / D for A / D converting an input audio signal according to a reference clock signal fck (hereinafter referred to as a reference signal fck).
D converter, 6 is a memory, 7 is a reference clock signal fck '
A PCM processor 8 which converts the read signal of the memory 6 into a PCM recording signal according to (hereinafter referred to as a reference signal fck ′) and outputs the PCM recording signal according to the timing signal SW30 is a recording amplifier. A memory 9 supplies a reference signal fck to the A / D converter 5, supplies the fck as a write clock to the memory 6, and further supplies an address signal synchronized with the fck to the memory 6 and a subtraction circuit 10 described later. It is a write controller.

Reference numeral 10 designates an address signal supplied from the memory write controller 9 and a memory read controller 1 described later.
The voltage signal corresponding to the difference from the address signal supplied from 1 is output to the VCO 12 to be described later through the differential amplifier, and the index signal generator 37 stops the index generation when the difference reaches a predetermined constant value. It is a subtraction circuit that outputs a signal. The reference numeral 11 allows the reference signal fck 'supplied from the VCO 12 to be described later to pass through as it is and supplies it to the memory 6 as a read clock, supplies the fck' to the PCM processor 7, and further supplies the address signal synchronized with the fck '. A memory read controller that supplies the memory 6 and the subtraction circuit 10. 12 is a subtraction circuit 1 via a differential amplifier
A reference signal fck 'corresponding to the voltage signal supplied from 0 is generated, and the fck' is supplied to the memory read controller 11 and also to the main servo circuit 16 described later via the 1 / N frequency divider 15. It is a VCO.

13 is set according to the tape end detection signal output from the tape end detector 14, is reset by the capstan servo lock signal output from the main servo circuit 16 described later, and outputs an inhibit signal between the set and reset. In addition, the flip-flop circuit (hereinafter referred to as FF circuit) outputs an index generation signal to the index signal generator 37 at the time of resetting. Reference numeral 16 is a main servo circuit for driving and controlling a capstan motor 19 and a drum motor 20 for rotating the rotary magnetic head device 1 via a capstan drive 17 and a drum drive 18. This drive control is performed according to the reference signal fck ′ supplied from the VCO 12 via the 1 / N frequency divider 15, and according to the supply of the tape end detection signal from the tape end detector 14, the capstan The operation is performed so that the motor 19 is reversed. 21
Is a generator of the rotation frequency signal of the capstan motor 19 (hereinafter referred to as CFG), and 22 is a generator of the rotation frequency signal of the drum motor 20 (hereinafter referred to as DFG).

Here, the operation of FIG. 1 will be described with reference to the drawings. FIG. 5 is a timing chart for explaining the operation of FIG. The figure (a) shows the target rotation speed of the capstan motor 19 corresponding to the output of the 1 / N frequency divider 15 (capstan target speed) and the actual rotation speed of the capstan motor 19 corresponding to the output of the CFG21. (Capstan speed). Note that (+1) indicates a steady speed in the forward rotation direction and (-1) indicates a steady speed in the reverse rotation direction.
In the figure, (b) is a tape end detection signal, (c) is a capstan servo lock signal, (d) is an inhibit signal, (e) is the data occupancy of the memory 6, and (f) is output from the recording amplifier 8. The recording current, (g), represents the timing signal SW30.

In FIG. 1, the audio signal is converted into a digital signal by the A / D converter 5, and is controlled by the reference signal fck and the address signal from the memory write controller 9 to be stored in the memory 6
Written in. The reading from the memory 6 is controlled by the memory reading controller 11 which operates according to the reference signal fck ′ from the VCO 12. The signal read from the memory 6 is recorded on the tape via the PCM processor 7 and the recording amplifier 8 and the magnetic head.

When the data is stored in the memory 6, the difference between the address signal from the memory write controller 9 and the address signal from the memory read controller 11 increases, so that the output voltage signal level of the subtraction circuit 10 increases, and accordingly, the output voltage signal level increases. The reference signal fck 'becomes high (fck'> fck). Therefore, at this time, the main servo circuit 16 causes the drum motor 20 and the capstan motor 19 to rotate at high speed. It should be noted that as the fck 'becomes higher, the reading speed from the memory 6 also increases, so that the data occupation amount of the memory 6 decreases.

On the contrary, when the data occupancy in the memory 6 decreases, as is clear from the above, the reference signal fck 'becomes low, so that the drum motor 20 and the capstan motor 19 rotate at a low speed, and the data is read from the memory 6. Since the speed decreases, the data occupation amount in the memory 6 increases.

When the magnetic tape reaches the tape end, the tape end detector 14 generates a tape end detection signal shown in FIG. 5 (b). In response to this, the capstan motor 19 is set in the reverse rotation mode as shown in FIG. 5 (a). Also,
The FF circuit 13 outputs the fifth signal in response to the tape end detection signal.
An inhibit signal shown in FIG. 3D is generated and the signal is supplied to the recording amplifier 8 and the memory read controller 11. As a result, the recording amplifier 8 and the memory read controller 11 are stopped. Therefore, the data occupation amount in the memory 6 increases linearly as shown in FIG. 5 (e). Further, as described above, the clock frequency of the reference signal fck 'increases as the data occupancy increases, and accordingly, the capstan motor 19 and the drum motor 20 respond.
The target rotation speed of is increased. As shown in Fig. 5 (a),
When the rotation of the capstan motor 19 is locked with the increase in the target speed of the capstan and the capstan servo lock signal shown in FIG. 5 (c) is generated, the inhibit signal falls, and the data read from the memory 6 becomes impossible. To start. The two reference signals fck ′ and fck at this time are fck ′> fck
Therefore, the data occupation amount in the memory 6 is as shown in FIG.
It gradually decreases as shown in (e).

Then, the two reference signals fck ′ and fck are finally fc
Since k '= fck, the capstan motor 19 and the drum motor 20 have a steady rotation speed, and the magnetic tape reaches steady running. The amount of data occupied in the memory 6 at this time is constant.

In the present embodiment, the capstan motor 19 is in the reverse rotation mode, and as described above, the index signal is included in the signals read from the start of reading the data from the memory 6 to the steady running of the magnetic tape. Is added.
Specifically, from the time when the index signal generator 37 is supplied with the index generation signal from the FF circuit 13 in response to the fall of the inhibit signal until the time when the index generation stop signal is supplied from the subtraction circuit 10, the PCM is generated. By supplying the index signal to the processor 7,
An index signal is added.

FIG. 4 is a block diagram during reproduction according to an embodiment of the present invention. In the figure, the same reference numerals as those in FIG. 1 represent the same or equivalent parts.

Reference numeral 23 is a reproduction amplifier, 24 is a reproduction audio signal output from the reproduction amplifier 23, detects a reproduction audio signal of a predetermined track and a reproduction audio signal of a next track which is audio-continuous with the track, and A PCM processor that outputs a reproduced audio signal, detects an index signal added to the reproduced audio signal, and supplies the index signal to a switch 25 and a retriggerable mono-multi described later. Reference numeral 25 denotes a reproduction audio signal having no index signal, out of the outputs of the PCM processor 24, to the memory device 26, and a reproduction audio signal having an index signal,
It is a switch for supplying to the memory device 27 by switching according to the index signal.

Reference numeral 26 writes the reproduced audio signal supplied from the PCM processor 24 via the switch 25 under the control of the memory write controller 30 described later, and controls the memory read controller 31 described later with the written signal. It is a memory device for reading according to the above. 27 is a memory device 2
6, the PCM processor 24 via the switch 25
Is a memory device for writing or reading the reproduced audio signal supplied from the memory device according to the control of the memory write controller 30 and the memory read controller 31, which will be described later, and the memory device 27, when the data occupation amount becomes zero, The data zero detection signal is supplied to the reset terminal of a flip-flop (hereinafter referred to as FF) 36, which will be described later. The memory device 26 is supplied with a high level signal (set signal) from an F.F36 described later through an inverter. The memory device 27 is in a suspended state for a period, and is in an operating state only while the set signal is being supplied.

29 is a memory device 26 or 27 depending on the reference signal fck.
It is a D / A converter that D / A converts the audio data output from the. A reference numeral 30 allows a reference signal fck 'or fck supplied via a switch 38, which will be described later, to pass through as it is and supplies it as a write clock to the memory devices 26 and 27, and two kinds of addresses synchronized with the reference signal fck' or fck. A memory write controller that supplies one of the signals to the memory device 26 and the subtraction circuit 32 and supplies the other to the memory device 27. The memory writing controller 30 is in a stopped state during a set signal output period of F.F50 described later. The reference numeral 31 supplies the reference signal fck to the D / A converter 29 and the switch 38, and also supplies the fck as a write clock to the memory devices 26 and 27.
One of two types of address signals synchronized with
And a subtraction circuit 32 and the other to the memory device 27. The memory read controller 31 only controls the read of the memory device 27 during the set signal output period of F.F36.

A subtraction circuit 32 outputs a voltage signal corresponding to the difference between the address signal supplied from the memory write controller 30 and the address signal supplied from the memory read controller 31 to a VCO 33 described later via a differential amplifier. A reference numeral 33 generates a reference signal fck ′ according to the voltage signal supplied from the subtraction circuit 32 via a differential amplifier, and the reference signal fck ′ is generated.
Is a VCO supplied to a switch 38 described later. 34
Is a reference signal supplied via a switch 38 described later.
This is a 1 / N frequency divider that divides fck 'or fck by 1 / N and supplies the result to the main servo circuit 16. Reference numeral 36 is an FF which is set by the tape end detection signal output from the tape end detector 14 and is reset according to the data zero detection signal output from the memory device 27. The signal is supplied to the memory device 27, the memory read controller 31, and a switch 38 described later, and the set signal is supplied to the memory device 26 via an inverter.

38 is a reference signal fc output from the memory read controller 31 only during the period when the set signal of F.F36 is applied.
A switch for guiding k to the memory write controller 30 and the 1 / N frequency divider 34, and for guiding the reference signal fck ′ output from the VCO 33 to the memory write controller 30 and the 1 / N frequency divider 34 during the other periods. . 50 is set by the tape end detection signal of the tape end detector 14,
This is an FF that is reset when the index signal is no longer output from the PCM processor 24 through the retriggerable mono-multi, and supplies the set signal output during this set / reset to the memory write controller 30.

Here, the operation of FIG. 4 will be described with reference to the drawings.

FIG. 6 is a timing chart for explaining the operation of FIG. FIG. 3A shows the target rotation speed of the capstan motor 19 corresponding to the output of the 1 / N frequency divider 34 (capstan target speed) and the actual rotation speed of the capstan motor 19 corresponding to the output of the CFG 21. (Capstan speed)
Represents the relationship with. 9B shows the tape end detection signal, and FIG. 9C shows the relationship between the data occupation amount of the memory device 26 and the data occupation amount of the memory device 27.

A reproduction signal from the tape head system is guided to the PCM processor 24 via the reproduction amplifier 23 and stored in the memory device 26 or 27 in accordance with the switching operation of the switch 25. When the PCM processor 24 detects the reproduced audio signal without the index signal, the switch 25 stores the reproduced audio signal without the index signal in the memory device 26.
When the reproduced voice signal having the index signal is detected, the reproduced voice signal having the index signal is guided to the memory device 27. The memory devices 26 and 27 are write-controlled by the memory write controller 30. The audio data read from the memory device 26 or 27 is D / A
It is output as an audio signal through the converter 29. The read control of the memory devices 26 and 27 and the control of the D / A converter 29 are performed by the memory read controller 31.

When the magnetic tape reaches the tape end, the tape end detection signal from the tape end detector 14 sets the F.F36, and the F.F36 outputs a set signal. In response to this, reading from the memory device 26 is stopped,
Reading from the memory device 27 starts. Memory device 2
When all the audio data of 7 is read, the F.F 36 is reset by the data zero detection signal from the memory device 27, so the set signal of the F.F 36 falls. In response to this, the reading from the memory device 27 is stopped, and the reading from the memory device 26 is restarted.

When the data is stored in the memory device 26, the subtraction circuit 3
2 supplies a voltage signal corresponding to the accumulated amount (data occupying amount) to the VCO 33 via a differential amplifier, so that the reference signal fck 'which is the output of the VCO becomes low. As a result, the drum motor 20 and the capstan motor 19 rotate at low speed.
On the contrary, when the audio data in the memory device 26 decreases, the reference signal fck 'becomes high, so that the rotation numbers of the drum motor 20 and the capstan motor 19 increase.

For example, during normal reproduction for reproducing the middle portion in the magnetic tape running direction, the reproduction signal from the PCM processor 24 is temporarily stored in the memory device 26 via the switch 25, and then read out and stored in the D / A converter 29. Is output. When the magnetic tape approaches the tape end, the audio signal of another track including the index signal is also reproduced, and this reproduced signal is accumulated in the memory device 27 via the switch 25. As is clear from FIGS. 6 (b) and 6 (c), the amount of reproduction signals accumulated in the memory device 27 reaches the maximum amount when the tape end is detected.

When the tape end is detected, the audio data stored in the memory device 27 is read by the memory read controller 31 in the reverse order of writing. When the tape end is detected, the tape end detection signal is supplied to the main servo circuit 16, so that the capstan motor 19 is in the reverse running mode as shown in FIG. 6 (a). At this time, the switch 38 stops the reference signal fck ′ from the VCO 33 in response to the set signal from the F.F 36, and the reference signal fck from the memory read controller 31.
Select and output. As a result, the main servo circuit 16
Operates based on the reference signal fck. Also, during the transition to the reverse running, that is, the tape end detector 14
The period from when the tape end is detected to when the PCM processor 24 stops detecting the index signal is F.F5.
Since the set signal from 0 is supplied to the memory write controller 30, the controller 30 stops. Therefore, the writing of the reproduced audio signal by the memory writing controller 30 is stopped.

Next, before all the audio data in the memory device 27 is released, an audio signal without an index signal starts to be reproduced from a predetermined track corresponding to reverse running, and the PCM processor 24 detects the reproduced audio signal. By F.
The F50 set signal falls, and the write operation of the memory write controller 30 is restarted. As a result, Fig. 6 (c)
As shown in, the reproduced audio signal is stored in the memory device 26. After that, when all the audio data in the memory device 27 is released, the set signal of F.F36 falls and the memory read controller 31 starts reading the audio data from the memory device 26 at a constant speed. Also, F.F3
The switch 38 is switched in response to the fall of the set signal 6 and the memory write controller 30 and the main servo circuit 1 start the operation based on the reference signal fck ′. The reference signal fck 'at this time is lower than the reference signal fck in inverse proportion to the increase of the data occupation amount in the memory device 26. Therefore, the audio data in the memory device 26 is
It gradually decreases as shown in Fig. 6 (c). afterwards,
Since the two reference signals fck ′ and fck are fck ′ = fck,
The data occupation amount in the memory device 26 becomes a constant amount. Further, as is apparent, the capstan motor 19 and the drum motor 20 have a steady rotation speed, and the magnetic tape reaches steady running.

〔The invention's effect〕

As is clear from the above description, according to the present invention, since the audio signal is not lost when the tape running is reversed,
There is an effect that continuous audio signal recording and reproduction can be performed.

[Brief description of drawings]

FIG. 1 is a block diagram during recording of an embodiment of the present invention, and FIG.
FIG. 4 is a plan view showing a state in which a magnetic tape is wound around a rotary magnetic head device, FIG. 3 is a view showing a tape pattern of the magnetic tape, and FIG. 4 is a block diagram during reproduction of an embodiment of the present invention. FIG. 6 is a timing chart for explaining the operation of FIG. 1, and FIG. 6 is a timing chart for explaining the operation of FIG. 1 ... Rotary magnetic head device, 2 ... Magnetic tape, 6 ...
Memory, 7 ... PCM processor, 9 ... Memory write controller, 11 ... Memory read controller, 14
…… Tape end detector, 16 …… Main servo circuit,
19 ... Capstan motor, 20 ... Drum motor,
24 ... PCM processor, 26, 27 ... memory device,
30 ... Memory writing controller, 31 ... Reading controller, 37 ... Index signal generator

Claims (2)

[Claims] 1. A rotary magnetic head means for mounting a magnetic head, and a tape end detection means for detecting a tape end of a magnetic tape wound around the rotary magnetic head means and outputting a tape end detection signal, at least the above. A magnetic recording / reproducing apparatus which has tape driving means for reversing the running direction of the magnetic tape in response to a tape end detection signal, and performs recording / reproduction on a plurality of tracks formed in the width direction of the magnetic tape. A recording time memory means for temporarily storing the signal, a means for stopping the reading from the recording time memory means for a predetermined period in response to the tape end detection signal, and a signal storage amount of the recording time memory means by the reading stop. The speed of the rotary magnetic head unit and the tape drive unit according to the increase and the recording memory after the end of the scheduled period Means for increasing the read speed of the stage; index signal generating means for adding an index signal to the read signal of the recording memory means read at the increased read speed; A first reproduction memory means for temporarily storing a reproduction signal, and a second reproduction time for temporarily storing a reproduction signal to which the index signal is added among reproduction signals of tracks which are audio-continuous with the reproduction signal of the predetermined track. Memory means, and means for stopping writing and reading of the first reproduction time memory means for a predetermined period in response to the tape end detection signal and starting reading from the second reproduction time memory means. Means for resuming writing in the first reproducing memory means before all the accumulated signals in the second reproducing memory means are read out, A means for starting the reading of the first reproduction time memory means from the time when all the stored signals of the second reproduction time memory means are read out, and an increase in the signal storage amount of the first reproduction time memory means. And a means for decreasing the speed of the rotary magnetic head means and the tape drive means and the writing speed of the first reproducing memory means in accordance with the above. . 2. A scheduled period during which the reading from the recording memory means is stopped in response to the tape end detection signal,
The tape running reversal device of the magnetic recording / reproducing apparatus according to claim 1, characterized in that it is a period until the tape driving means locks at the target rotation speed.