JPH06177787A - Interference compensation circuit - Google Patents

Abstract

(57) [Summary] [Objective] To provide an interference compensation circuit capable of ensuring stable transmission quality under any propagation path condition. An error that outputs an error rate xe of in-phase and quadrature components xI and xQ supplied from a main signal system in an interference compensation circuit that extracts an interference component included in a received main signal and performs interference compensation of the main signal The error rate output from the error detectors 38a and 38b is compared with the detector 38a and the second error detector 38b that outputs the error rate of the in-phase and quadrature components yI and yQ output from the interference compensating unit 37. , The error comparator 39 that outputs this comparison result, and the error comparator 3
A switching circuit 40 is provided for selecting and outputting the output of the main signal system or the output of the interference compensating unit 37 having the smaller error rate in accordance with the output of 9.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interference compensation circuit suitable for use in wireless communication, for example.

[0002]

2. Description of the Related Art FIG. 2 is a block diagram showing a configuration of a conventional interference compensation circuit. In the figure, the main signal received by the main antenna 1 for receiving the main signal and the sub-antenna 4 passes through the band pass filters 2 and 5 as necessary,
The frequency is converted to an intermediate frequency by the frequency converters 3 and 6 using the local oscillator 7. The phase shifter 8 inserted between the local oscillator 7 and the frequency converter 3 makes the composite phase of the main signal received by the main antenna 1 and the sub-antenna 4 variable, and is generally used after reception. The power is controlled to be maximum.

Then, the main antenna 1 and the sub-antenna 4
The received signal by is combined by the combiner 9. The composite signal, the reception signal of the main antenna 1 and the reception signal of the sub antenna 4 obtained by this are respectively quadrature phase detector 1
The reference carrier waves 13 input to 0, 11, and 12 and regenerated from the main signal decompose into in-phase and quadrature components.

The in-phase and quadrature components thus obtained are
The signals are supplied to A / D (analog / digital) converters 14, 15 and 16 having sufficient quantization accuracy and digitized. The clock signal 17 reproduced from the main signal is commonly used as the sampling signal at this time.

Further, the output signals of the A / D converters 15 and 16 are both input to the interference extraction unit 27, and the main signal component thereof is suppressed to extract the interference signal. That is, A / D
The signal aI input from the converter 16 to the interference extraction unit 27
r, aQr and the signal aI output from the interference extraction unit 27,
Correlation detection is performed on the main signal with respect to aQ, and the variable couplers 18 to 21 are feedback-controlled so that the correlation amount is minimized.

As a result, the output signal of the A / D converter 16 is adjusted to have the same amplitude and opposite phase as the main signal component mixed in the output signal of the A / D converter 15, and the full adder 2
2 to 25 add the main signal component to erase the main signal component. In this way, in the interference extraction unit 27, the main signals in the reception signals of both antennas 1 and 4 cancel each other out, and the interference signals aI and aQ are extracted.

Then, the extracted interference signals aI, a
Q is input to the interference compensator 37, and the interference component mixed in the main signal is removed. That is, the interference compensating unit 37 performs correlation detection between the interference signals aI and aQ input from the interference extracting unit 27 to the interference compensating unit 37 and the error signals eI and eQ output from the interference compensating unit 37. The variable couplers 28 to 31 are feedback-controlled so that the correlation amount is minimized.

As a result, the interference signals aI and aQ extracted by the interference extraction unit 27 have the same amplitude and opposite phase to the interference component mixed in the output signal of the A / D converter 14 (that is, the main signal system). The interference components are adjusted and added to the interference components by the full adders 32 to 35 to remove the interference components.

In the delay adjustment line τ1, the respective signals passing through the quadrature phase detectors 11 and 12 are full adders 22.
In order to be added at the same time in ~ 25,
It is provided for time adjustment. Also, the delay adjustment line τ2
Is provided for time adjustment in the same manner as the delay adjustment line τ1 so that the signals passing through the quadrature phase detectors 10 and 11 are added in the full adders 32 to 35 at the same time. .

Details of the technique described above are disclosed in, for example, Japanese Patent Application Laid-Open No. 1-2221933.

[0011]

In the conventional interference compensation circuit described above, in order to suppress the main signal and extract only the interference signal in the interference extraction unit 27, the phase difference between the main signal and the interference component is It is a precondition that the amplitude ratios of the main antenna 1 and the sub-antenna 4 are uncorrelated with each other, and in a radio station receiving interference, both antennas 1 and 4 are required to satisfy this condition. The installation method is decided at an early stage.

However, when the fading occurs due to the variation of the attenuation condition of the radio wave, the phase and the amplitude vary, and the relationship between the main signal received by both antennas 1 and 4 and the interference component satisfies the above preconditions. If not, that is, if the phase difference and the amplitude ratio between the main signal and the interference component become equal to each other between the antennas 1 and 4, the interference extraction unit 27 suppresses the main signal, and the interference component is also canceled and the interference extraction is performed. It happens that the interference signal is not extracted from the output of the unit 27.

In this case, in the conventional interference compensating circuit, if the outputs aI and aQ of the interference extracting unit 27 are input to the interference compensating unit 37 without the interference signal being extracted and added to the main signal system as a compensation signal, There is a problem that the interference component of the signal system is not canceled and noise is added, which rather deteriorates the transmission quality of the main signal system.

The present invention has been made under such a background, and an object thereof is to provide an interference compensation circuit capable of ensuring stable transmission quality under any propagation path condition.

[0015]

In order to solve the above-mentioned problems, the present invention combines a main transmission line and a sub-transmission line for receiving a main signal with outputs of the main transmission line and the sub-transmission line. A first phase detector for detecting the output of the combiner by a reference carrier regenerated from the received main signal,
A second phase detector that detects the output of the main transmission line by the reference carrier wave, a third phase detector that detects the output of the sub transmission line by the reference carrier wave, and the first to third
The main signal receiving section having the first to third discriminators for sampling and quantizing the outputs of the phase detectors, and the output of the third discriminator connected to the sub transmission line. A first variable coupler as an input, a first adder for adding an output of the first variable coupler and an output of a second discriminator connected to the main transmission path, and the third variable coupler Correlation detection between the output of the discriminator and the output of the first adder to remove the main signal from the output of the first adder and extract only the interference signal. An interference extractor having a first variable coupler control circuit for controlling the variable coupler, a second variable coupler having an output of the interference extractor as an input, and a second variable coupler. A second adder for adding the output of the adder and the output of the first discriminator connected to the combiner, and the second adder. The second variable coupler to remove the interference signal contained in the main signal from the output of the second adder by performing correlation detection between the output of the adder and the output of the interference extractor. An interference compensation circuit including a second variable coupler control circuit for controlling, and an interference compensation section, which detects an error in the output of the first discriminator and outputs an error rate thereof. Error detector compares the error rate output from the first and second error detectors with the second error detector that detects the error in the output of the interference compensation unit and outputs the error rate. And an error comparator that outputs a comparison result indicating which of the error rates is small;
And a switching circuit which receives both the output of the discriminator and the output of the interference compensating unit, selects the input having the smaller error rate according to the comparison result by the error comparator, and outputs the selected input. I am trying.

[0016]

According to the present invention, the first error detector is the first
Error detector outputs the error rate and outputs the error rate, the second error detector detects the error of the interference compensator output and outputs the error rate, and the error comparator outputs the error rate. The error rates output from the first and second error detectors are compared to output a comparison result indicating which error rate is smaller, and the switching circuit outputs the output of the first discriminator and the output of the interference compensator. Both are input, and the input with the smaller error rate is selected according to the comparison result by the error comparator and is output. As a result, of the system that adds the output of the interference compensator to the main signal and the system that does not add it, the one with the smaller error rate is switched to the output, and if the interference extractor does not extract the interference signal due to fluctuations in the channel conditions. In addition, while it is possible to prevent the output of the interference compensator from adversely affecting the main signal system,
When the interference signal is extracted, interference compensation can be performed.

[0017]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the structure of an interference compensation circuit according to an embodiment of the present invention. In this figure, parts common to the parts shown in FIG. 2 are assigned the same reference numerals and explanations thereof are omitted.

In FIG. 1, in-phase and quadrature components xI and xQ (main signal system) output from the A / D converter 14 are
The system is branched into two systems, a system input to the interference compensation unit 37 and a system not input to the compensation unit 37. The system not input to the interference compensator 37 is input to the error detector 38a (described later) and the switching circuit 40 (described later).

On the other hand, the system input to the interference compensator 37 is
In the interference compensator 37, the compensation signals are added by the full adders 32 to 35, and then output from the compensator 37. Further, the in-phase and quadrature components yI and yQ output from the interference compensator 37 are input to the error detector 38b (described later) and also to the switching circuit 40.

The error detector 38a performs error detection on the in-phase and quadrature components xI and xQ output from the A / D converter 14, and outputs the error rate xe. On the other hand, the error detector 38b performs error detection on the in-phase and quadrature components yI and yQ output from the interference compensator 37, and outputs the error rate ye.

An error comparator 39 has an error rate xe supplied from the error detector 38a and an error detector 38b.
The error rate ye supplied from the above is compared with that of the error rate ye to output the selection signal S indicating the sequence having the smaller error rate. The switching circuit 40 uses the selection signal S supplied from the error comparator 39.
In accordance with the above, the in-phase and quadrature components xI and xQ directly input from the A / D converter 14 and the in-phase and quadrature components yI and yQ input from the interference compensator 37 are selected to have a smaller error rate. Switch to output.

According to such a configuration, the interference compensator 37
The error rate xe of the in-phase and quadrature components xI and xQ that do not go through is compared with the error rate ye of the in-phase and quadrature components yI and yQ that have undergone the interference compensation by the interference compensating unit 37, and the in-phase with the smaller error rate is compared. And the quadrature component are selected and output.

As a result, when the fading occurs due to the fluctuation of the attenuation condition of the radio wave and the phase and the amplitude fluctuate, and the interference extraction unit 37 does not extract the interference signal, the output of the interference compensation unit 37 is the main signal. It is possible to prevent the system from being adversely affected. Therefore, it becomes possible to secure stable transmission quality under any propagation path condition.

[0024]

As described above, according to the present invention, of the system that adds the output of the interference compensator to the main signal and the system that does not add the output of the interference compensating unit, the one with the smaller error rate is switched so that it is output. If an interference signal is not extracted by the interference extraction unit due to a change in conditions, it is possible to prevent the output of the interference compensation unit from adversely affecting the main signal system. Since compensation can be performed, there is an advantage that stable transmission quality can be secured under any propagation path condition.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an interference compensation circuit according to an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration example of a conventional interference compensation circuit.

[Explanation of symbols]

 1 Main Antenna 2,5 Band Pass Filter 3,6 Frequency Converter 4 Sub Antenna 7 Local Oscillator 8 Phase Shifter 9 Synthesizer 10-12 Quadrature Phase Detector 13 Reference Carrier 14-16 A / D Converter 17 Clock Signal 18 -21, 28-31 Variable combiner 22-25, 32-35 Full adder 26, 36 Variable combiner control circuit 38a, 38b Error detector 39 Error comparator 40 Switching circuit τ1, τ2 Delay adjustment line

Claims (1)

[Claims] 1. A main transmission line and a sub transmission line for receiving a main signal, a synthesizer for synthesizing outputs of the main transmission line and the sub transmission line, and a synthesizer of the synthesizer by a reference carrier regenerated from a received main signal. A first phase detector that detects the output, a second phase detector that detects the output of the main transmission line by the reference carrier, and a third phase detector that detects the output of the sub transmission line by the reference carrier. Connected to the sub-transmission line, and a main signal receiving section having a first to third discriminator for sampling and quantizing the outputs of the first to third phase detectors, respectively. A first variable coupler having the output of the third discriminator as an input, and an output of the first variable coupler and an output of the second discriminator connected to the main transmission line. 1 adder, the output of the third discriminator and the output of the first adder A first variable coupler control circuit for controlling the first variable coupler so as to remove the main signal from the output of the first adder and extract only the interference signal by performing correlation detection between An interference extractor having: a second variable coupler having an output of the interference extractor as an input; and an output of the second variable coupler and a first discriminator connected to the combiner. A second adder for adding the output of
Correlation detection is performed between the output of the second adder and the output of the interference extractor to remove the interference signal contained in the main signal from the output of the second adder. And an interference compensating section having a second variable coupler control circuit for controlling the variable coupler of (1), an error detection is performed on the output of the first discriminator, and an error rate thereof is detected. Output from the first and second error detectors, and a second error detector that performs error detection on the output of the interference compensation unit and outputs the error rate. Error comparator that outputs a comparison result indicating which error rate is smaller, and both the output of the first discriminator and the output of the interference compensator, and the error comparison Select the input with the smaller error rate according to the comparison result An interference compensating circuit comprising: a switching circuit for outputting this.