JPH06188636A - Waveform generator - Google Patents

Abstract

(57) [Abstract] [Purpose] To simultaneously output a low-frequency waveform and a high-frequency waveform, increase the amount of high-frequency waveform data to smooth the waveform. A clock generator 4 for generating a sampling clock having a predetermined frequency, a plurality of waveform memories 1 in which digital data of arbitrary waveforms are stored, and D for converting digital data read from the waveform memory 1 into analog data
A / A converter 3 is used to read digital data from each waveform memory 1 with a sampling clock and
When simultaneously outputting low-frequency waveforms and high-frequency waveforms via the converter 3, digital data of arbitrary waveforms are stored in each waveform memory 1 with the same number of data, and
The sampling frequency for the high frequency waveform is set higher than the sampling frequency for the low frequency waveform to access the waveform memory 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a waveform generator,
More specifically, the present invention relates to a waveform generator having a plurality of output channels and capable of simultaneously outputting different arbitrary waveforms.

[0002]

2. Description of the Related Art FIG. 6 shows, for example, two output channels C.
A conventional example of a waveform generator having H1 and CH2 is shown. Each of the channels CH1 and CH2 has the same configuration, and waveform memories 1a and 1b for storing digital data of arbitrary waveforms and address generators 2a and 2b for giving the read address to the waveform memories 1a and 1b, respectively.
And D / A converters 3a, 3 for converting digital data read from the waveform memories 1a, 1b into analog signals
and b.

In this case, the same sampling clock is supplied from the clock pulse generator 4 to each of the address generators 2a and 2b, the respective waveform memories 1a and 1b are accessed based on this, and the digital data is D
The output waveform is reproduced by being converted into an analog signal by the / A converters 3a and 3b. In some cases, one address generator may be used and shared by each channel.

[0004]

According to this, although the output waveform is reproduced in a staircase waveform, when the low frequency waveform and the high frequency waveform are simultaneously output, the low frequency waveform is common because the sampling clock is common. Has a smooth waveform because it has a large number of data (per cycle), but a high-frequency waveform has a small number of data (also per cycle) and the waveform becomes rough.

Explaining this with reference to FIG. 7, the frequency of the channel CH1 is f ₁ , the frequency of the channel CH2 is f ₂ (> f ₁ ), and the number of each data is N ₁ , N.
_If the frequency is _2, and the frequency of the sampling clock is f _c , then f ₁ = f _c / N ₁ f ₂ = f _c / N ₂ . Here, since f ₁ <f ₂ , f _c / N ₁ <f _c / N _{2, and} thus N ₁ > N ₂ , and the high frequency waveform becomes rough.

Further, there are the following problems in storing data in the waveform memories 1a and 1b. That is, although the same number of data is stored in each of the waveform memories 1a and 1b, for example, data of one cycle of the fundamental wave is stored in the waveform memory 1a side and its harmonic data is stored in the waveform memory 1b side. When storing, the data for 3 cycles, 5 cycles, etc. must be created according to the order.

[0007]

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned conventional circumstances, and its structural features are that a clock generator for generating a sampling clock of a predetermined frequency and digital data of an arbitrary waveform are stored. A plurality of waveform memories, and a D / A converter for converting digital data read from the same waveform memory into analog data. The digital data is read from each of the waveform memories by the sampling clock, and the D / A converter is provided. In a waveform generator capable of simultaneously outputting a low-frequency waveform and a high-frequency waveform via, digital data of arbitrary waveforms are stored in each waveform memory with the same number of data, and the sampling frequency for the high-frequency waveform is The sampling frequency is set to be higher than the sampling frequency for the low-frequency waveform.

In this case, the frequency of the above high frequency waveform is F
a, the sampling frequency for the same high-frequency waveform is Fca, the frequency for the low-frequency waveform is Fb, and the sampling frequency Fc for the same low-frequency waveform, the sampling frequency Fca for the high-frequency waveform is Fca = Fcb × Fa / Fb Is preferably set to.

[0009]

As described above, by setting the sampling frequency for the high frequency waveform higher than the sampling frequency for the low frequency waveform, the high frequency is output as a smoother waveform.

For example, a sine wave output of 10 kHz is obtained from channel CH1 at a sampling frequency of 1 MHz,
At the same time, when an output of a sine wave of 100 kHz is obtained from the channel CH2, a sampling frequency of the same channel CH2 is calculated from the above equation and set to 10 MHz, so that a waveform having 100 points of data is obtained in each case.

Also, when trying to obtain harmonics of the fundamental wave, it is sufficient to store the same waveform data in each waveform memory, and data is created according to the order as in the conventional case. Need not be stored.

[0012]

FIG. 1 shows an embodiment of the present invention having two output channels. Each channel CH1, CH
Both of the waveform memories 1 and 2 are similar to the conventional example described above.
a, 1b, address generators 2a, 2b and D / A converters 3a, 3b are provided, but in the case of this embodiment, clock generators 4a, 4a,
4b are prepared, and the waveform memories 1a and 1b are accessed by the sampling clocks having different frequencies.

Further, the digital data of the waveform to be obtained is stored in each of the waveform memories 1a and 1b with the same number of data. For example, a case will be described in which the sine fundamental wave is output from the channel CH1 and the third harmonic thereof is output from the channel CH2.

First, the waveform memory 1 on the channel CH1 side
Assuming that 360 times of data for each cycle of the sine waveform is stored in a, the waveform memory 1b on the channel CH2 side is the target of the three cycles in the conventional case. From the above, 360 pieces of data are uniformly picked up and stored, but in the present invention, the waveform memory 1b is included in the waveform memory 1b.
The same waveform data as a is stored. Then, from the clock generator 4b on the channel CH2 side, the channel CH1
The sampling clock is output at a frequency that is three times as high as the clock frequency on the side.

In this manner, different sampling clocks output a low-frequency waveform from one channel CH1 and a high-frequency waveform from the other channel CH2 with smoother waveforms.
To make the number of data for the cycle the same, the following may be done.

The number of data is N, the frequency of the high frequency waveform is Fa, the sampling frequency for the high frequency waveform is Fca,
If the frequency of the low-frequency waveform is Fb and the sampling frequency Fcb for the low-frequency waveform, then Fa = Fca / N Fb = Fcb / N N are equal, so Fca / Fa = Fcb / Fb Therefore, sampling for the high-frequency waveform Frequency Fca
Is determined by Fca = Fcb × Fa / Fb. On the contrary, it is of course possible to obtain the sampling frequency of the low-frequency waveform from the frequency of the high-frequency waveform and its sampling frequency, but in any case, by increasing the sampling clock of the high-frequency waveform, the fundamental wave It is possible to increase the signal purity of both the harmonics and the harmonics to approximate an ideal waveform (see FIG. 2).

Further, in this embodiment, the output of the channel CH1 and the output of the channel CH2 can be superposed, but in this case, by making the number of data for one cycle of both equal or close to each other, The reliability of the composite waveform is further enhanced.

In the above embodiment, each channel CH1, CH
Although clock generators 4a and 4b are prepared for each 2
3 and 5 show examples in which sampling clocks of different frequencies are obtained from one clock generator 4.

First, in the example of FIG. 3, the sampling clock (FIG. 4a) from the clock generator 4 is directly applied to the address generator 2a on the side of the channel CH1, but the address generator 2b on the side of the channel CH2 is exclusive. A sampling clock having a frequency twice that of the OR circuit 5 is supplied.

That is, the exclusive OR circuit 5 is the same.
The sampling clock from the clock generator 4 shown in FIG. 4a is directly input to one of the input terminals, while the other input terminal receives the phase shifter 6 as shown in FIG. A sampling clock whose phase is shifted by 90 degrees is input at, and as a result, the exclusive OR circuit 5 outputs a sampling clock having a frequency doubled as shown in FIG. Therefore, the clock generator 4
Assuming that the maximum clock frequency of 10 MHz is 10 MHz, a sampling clock of maximum 20 MHz can be obtained. An inclusive AND circuit may be used instead of the exclusive OR circuit.

In the example of FIG. 5, each channel CH1, CH2
Are provided with frequency dividers 7a and 7b, respectively, whereby the sampling pulse output from the clock generator 4 is divided by different division ratios and given to the address generators 2a and 2b. The frequency divider may be provided only on one channel side.

[0022]

As described above, according to the present invention, the sampling frequency for the high frequency waveform is set to be higher than the sampling frequency for the low frequency waveform, so that the waveform can be determined based on more data. It can be smoothly reproduced, and can be approximated to an ideal waveform especially when superimposing its harmonic on the fundamental wave.

Further, even if the waveform data is stored in the waveform memory of each channel, it is not necessary to create the waveform data according to the frequency to be obtained as in the conventional case, and the waveform data is shared by each channel. It can be used for.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a waveform diagram illustrating a waveform obtained in the same example.

FIG. 3 is a block diagram showing another embodiment of the sampling clock generator.

FIG. 4 is a waveform timing chart for explaining the embodiment of FIG.

FIG. 5 is a block diagram showing another embodiment of the sampling clock generator.

FIG. 6 is a block diagram showing a conventional example.

FIG. 7 is a waveform diagram illustrating a waveform obtained by a conventional example.

[Explanation of symbols]

 1a, 1b Waveform memory 2a, 2b Address generator 3a, 3b D / A converter 4, 4a, 4b Clock generator 5 Exclusive OR circuit 6 Phase shifter 7a, 7b Frequency divider

Claims (2)

[Claims] 1. A clock generator for generating a sampling clock of a predetermined frequency, a plurality of waveform memories in which digital data of arbitrary waveforms are stored, and a D / which converts digital data read from the waveform memory into analog data.
A waveform generator comprising an A converter for reading digital data from each of the waveform memories according to the sampling clock and simultaneously outputting a low frequency waveform and a high frequency waveform via the D / A converter. A waveform generator in which digital data of an arbitrary waveform is stored in each waveform memory with the same number of data, and the sampling frequency for the high frequency waveform is set higher than the sampling frequency for the low frequency waveform. 2. Sampling for the high frequency waveform, where Fa is the frequency of the high frequency waveform, Fca is the sampling frequency for the high frequency waveform, Fb is the frequency of the low frequency waveform, and Fb is the sampling frequency Fcb for the low frequency waveform. The waveform generator according to claim 1, wherein the frequency Fca is set to Fca = Fcb × Fa / Fb.