JPH0618932A - Liquid crystal display - Google Patents

Abstract

PURPOSE:To provide the liquid crystal display device of an active matrix system which attains a high contrast, multiple gradations, and high image quality without crosstalks, etc. CONSTITUTION:The influence that the amplitude of a signal voltage exerts via a counter electrode on the voltage to be impressed to a liquid crystal is decreased by determining the product tau (mus) of the resistance 112 between a counter voltage source 111 and the counter electrode 105 and the capacities 106 to 110 between scanning line groups and signal groups as well as the counter electrode and an accumulated capacity/liquid crystal capacity Cst/Clc within the range satisfying 5(1/(1.2+Cst/Clc))(0.18+0.12/(1+1.2(Cst/Clc)))(l/(1+exp(16.7/tau)))<0. 1.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an active matrix type liquid crystal display device, and more particularly to a large-sized liquid crystal display device for OA which is required to have high image quality such as high contrast and multi-gradation.

[0002]

2. Description of the Related Art Liquid crystal display devices are widely used in handheld computers, personal word processors, portable televisions, etc. due to their characteristics such as low power consumption, low voltage operation, light weight, and thin shape. Tend to do. Among them, the active matrix type liquid crystal device is provided with a switching element corresponding to each of a plurality of picture elements arranged in a matrix, and the picture element electrodes are driven independently. It has excellent characteristics such as good contrast as compared with a certain simple matrix system, and is a technology indispensable for a liquid crystal display device that requires high image quality.

In recent years, various demands have been made on the liquid crystal display device with the expansion of the range of use, and one of them is to increase the size of the active matrix type liquid crystal display device. However, with the increase in size of liquid crystal display devices, the in-plane resistance of the counter electrode and the power supply resistance to the counter electrode have increased, and various adverse effects on image quality have come to be seen. That is, since the signal line and the counter electrode are capacitively coupled via the liquid crystal layer, the counter electrode potential, which should originally be kept at a constant potential, oscillates corresponding to the voltage amplitude of the signal line. As a result, the voltage applied to the liquid crystal is displaced, which causes a serious problem in image quality. In particular,
Due to a decrease in contrast due to a decrease in the liquid crystal applied voltage, difficulty in multi-gradation display due to the inability to realize a minute brightness difference display due to the fact that the liquid crystal applied voltage cannot be strictly controlled, and a change in brightness depending on the display image pattern There is a phenomenon such as so-called lateral crosstalk in which a region which originally has to have the same brightness is divided into regions having different brightness with a boundary line parallel to the scanning line.

In order to solve these problems, it has been proposed to suppress the counter electrode voltage amplitude by reducing the in-plane resistance or the feed resistance of the common electrode (for example, 1990, No. 7). Color Engineering Conference P8
9-P92) It is extremely difficult to realize a low resistance of the counter electrode for further panel enlargement, and this method alone is not sufficient.

[0005]

As described above, even if the in-plane resistance or the power supply resistance of the counter electrode is reduced, the image quality such as a decrease in contrast, difficulty in multi-gradation display, and horizontal crosstalk is seen. A very serious problem still exists. Therefore, an object of the present invention is to provide a liquid crystal display device that reduces or eliminates the above problems and realizes high image quality such as high contrast and multiple gradations.

[0006]

In order to achieve the above object, the present invention provides a liquid crystal display device in which the supply resistance between a counter voltage source and a counter common electrode is Rsp, and between the scanning line group and the counter common electrode. The capacitance is Cg, and the capacitance between the signal line group and the counter common electrode is
When Cs, storage capacity is Cst and liquid crystal capacity is Clc, τ (μ
s) (= Rsp (Cs + Cg)), and Cst / Clc as 5 (1 / (1.2 + Cst / Clc)) (0.18 + 0.12 / (1 + 1.2 (Cst / Clc))) (1 / ( 1 + exp (16.7 / τ))) <0.1.

[0007]

By reducing τ, it is possible to reduce the voltage amplitude of the counter electrode. Further, by increasing Cst / Clc, the rate of change of the counter electrode voltage amplitude on the liquid crystal voltage can be reduced.

According to the present invention, τ and Cst / C are selected from the viewpoint of performing an optimized design corresponding to the panel size and the number of wirings.
The ratio of the change of the liquid crystal voltage with respect to the signal voltage amplitude is reduced by defining lc in the optimum range and appropriately adjusting the above two effects.

[0009]

[Example] In order to derive the optimum range of τ and Cst / Clc,
A specific study was conducted using a liquid crystal display device using a TFT as a switching element. An equivalent circuit of the picture element region of the liquid crystal display device 1 is shown in FIG. 1a is a current stage gate bus line which is one of the bus lines for transmitting a scanning signal,
1b is also one of the bus lines for transmitting the scanning signal, but is different from the gate bus line 1a of the present stage in the preceding stage gate bus line, 2 is the source bus line which is one of the bus lines for transmitting the display signal, and 3 is A TFT, which is a field effect transistor used as a switching element, has its gate electrode connected to the current stage gate bus line 1a and its source electrode connected to the source bus line 2. A pixel electrode 4 is connected to the drain electrode of the TFT 3. Reference numeral 5 is a counter common electrode, 6 is a liquid crystal capacitance (Clc) formed between the picture element electrode 4 and the counter common electrode 5 via the liquid crystal layer, and 7 is a pixel for compensating for the shortage of charge holding ability of the liquid crystal layer. Elementary electrode 4 and pre-stage gate bus wiring 1b
A storage capacitance (Cst) formed between the gate electrode and the drain electrode of the TFT 3; gate = drain capacitance (Cgd) 8 which is a parasitic capacitance generated between the gate electrode and the drain electrode of the TFT 3; Source formed at = common capacitance (C
sce) and 10 are gates formed between the gate bus lines 1 (1a, 1b) and the counter electrode 5 = common capacitance (Cgce)
Is.

Next, the circuit configuration of the entire panel as one RC circuit will be described with reference to FIG. 101 is all gate bus wiring representing all scanning lines,
102 denotes all source bus wirings representing all signal lines; 104
Is an all-pixel electrode that represents the entire pixel electrode, 105 is an opposing common electrode, 106 is an all-pixel electrode 104 and an opposing common electrode 105.
The total liquid crystal capacitance (Calc) 107 formed between
Total storage capacitance (Cast) 108 formed between all gate bus lines 101 and all pixel electrodes 104 is the total sum of parasitic capacitances between the gate electrode and drain electrode of the TFT used as the switching circuit. = Drain capacitance (C
agd) and 109 are all sources = common capacitance (Casc) formed between all source bus lines 102 and the counter electrode 105.
e) and 110 are all gate bus wirings 101 and counter electrodes 1
All gates formed between 05 = common capacitance (Cagce),
111 is a counter voltage source that supplies a voltage to the counter common electrode 105, and 112 is a counter common electrode 105 and the counter voltage source 11
It is a counter supply resistance (Rsp) which is a resistance between 1.

How the counter potential and the liquid crystal effective voltage are affected by the fluctuation of the signal potential when the above liquid crystal display device is driven will be described in detail below.

First, the fluctuation of the potential of the common electrode 105, which is induced by the fluctuation of the potentials of all the source bus lines 102, will be described with reference to FIG. Vas is a signal voltage averaged over all signal lines on the panel. The higher potential with respect to the center of the signal voltage amplitude is + source voltage Vas (+) during writing, and the lower potential is −source voltage Vas (−) during writing. Vc is the potential of the opposing common electrode. V
A vibration component is induced in Vc by the vibration of as, but since it is connected to the counter voltage source through a resistor, it is attenuated to the potential Vcc of the counter voltage source with a constant time constant. Vas =
Let Vc (+) be Vc when Vas (+), Vc when Vas = Vas (-) be Vc (-), and write time per scanning line be t0. Since Vc (-) is symmetrical with respect to Vcc, Vc (+) and Vc (-) can be expressed as follows.

Vc (+) = Vcc + Vcgap × exp (-t / τ) / (1 + exp (-t0 / τ)) Vc (-) = Vcc-Vcgap × exp (-t / τ) / (1 + exp (-t0 / τ)) where Vcgap = Cs / (Cs + Cg) × (Vas (+) − Vas (−)) τ = Rsp (Cs + Cg) Cs = Casce Cg = Cagce + 1 / (1 / Calc + 1 / (Cast + Cag
d)) In addition, t is the time after Vc jumps.

Next, the influence of the voltage change of the counter common electrode 105 thus calculated on the liquid crystal applied voltage will be described with reference to FIG. Vg is the gate bus wiring 1a at this stage
The potentials of Vg (H) and Vg (L) correspond to the ON voltage and the OFF voltage of the TFT 3, respectively. Vs is the potential of the source bus line 2, Vs (+) is the potential for + writing, and Vs (-) is the potential for −writing. Vc is the common electrode 5 (=
It is the potential of the counter common electrode 105) and is set as Vcc = Vsc-kg (Vg (H) -Vg (L)). Vp is the potential of the pixel electrode 4, and Vlc
Is a liquid crystal applied voltage.

The effect of counter electrode potential oscillation is Vs (+)-
It is smaller than Vs (-). At this time, the liquid crystal effective voltage (Vef
f) may be approximately equal to the liquid crystal average voltage (Vlc (av)). After considerable calculation, Vlc (av) = 1/2 * (Vs (+)-Vs (-))-kcVcgap * exp (-t0 / [tau]) / (1 + exp (-t0 / [tau])) is obtained. Here, kc = Clc / Ctot Ctot = Clc + Cst + Cgd In this equation, the first term is the voltage that should be originally applied to the liquid crystal, but the second term is the effect due to the potential fluctuation of the common electrode 5 and is dependent on the signal voltage amplitude. Since the voltage changes, the voltage applied to the liquid crystal layer also changes accordingly.

Here, if τ and Cst / Clc are defined within the region shown in (FIG. 1) and further t0 = 16.7 μs Vs (+)-Vs (-) = 5.0 V, the liquid crystal applied voltage is set. The variation amount of Vlc (av) is less than or equal to 0.1V. Therefore, the difference in luminance between the picture elements is reduced or eliminated, and a liquid crystal display device that achieves high image quality can be obtained.

In fact, when τ and Cst / Clc are within the hatched range of (FIG. 1), and more specifically, the values shown in the plot of (FIG. 2), the liquid crystal display device is driven. When an image quality test was conducted by visual observation, the above-mentioned problems were improved to a situation where they were not observed or were reduced to a negligible level. The parameters of these examples were as follows.

[0018]

[Table 1]

[0019]

As described above, according to the present invention, τ and Cst
/ Clc satisfies 5 (1 / (1.2 + Cst / Clc)) (0.18 + 0.12 / (1 + 1.2 (Cst / Clc))) (1 / (1 + exp (16.7 / τ))) <0.1 By defining the range, the change in the voltage applied to the liquid crystal layer through the change in the opposite voltage amplitude accompanying the change in the signal voltage amplitude, which is different for each picture element, is suppressed to prevent the deterioration of the contrast and realize the multi-gradation display. It is possible to eliminate lateral crosstalk and the like, and is effective in improving the image quality of a liquid crystal display element that requires high image quality such as high contrast and multiple gradations.

[Brief description of drawings]

FIG. 1 shows τ and Cst / Clc defined in the present invention.
Range map

FIG. 2 shows τ and Cst / Clc according to the embodiment of the present invention.
Plotted above

FIG. 3 is an equivalent circuit diagram of a liquid crystal display element 1 picture element.

FIG. 4 is an equivalent circuit diagram when the entire panel is viewed as one RC circuit.

FIG. 5 is a potential relationship diagram for explaining the counter electrode voltage amplitude induced by the signal voltage amplitude for the entire panel.

FIG. 6 is a potential relationship diagram for explaining the influence of the counter electrode voltage amplitude on the liquid crystal voltage.

[Explanation of symbols]

 1a Current stage gate bus wiring 1b Previous stage gate bus wiring 2 Source bus wiring 3 TFT 4 Picture element electrode 5 Counter common electrode 6 Liquid crystal capacity (Clc) 7 Storage capacity (Cst) 8 Gate = Drain capacity (Cgd) 9 Source = Common capacity (Csce) 10 Gate = Common capacitance (Cgce) 101 All gate bus wiring 102 All source bus wiring 104 All pixel electrodes 105 Opposing common electrode 106 Total liquid crystal capacitance (Calc) 107 Total storage capacitance (Cast) 108 All gate = Drain capacitance (Cagd) 109 All sources = Common capacitance (Casce) 110 All gates = Common capacitance (Cagce) 111 Opposing voltage source 112 Opposing supply resistance (Rsp)

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Hiroshi Minamino 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electric Industrial Co., Ltd.

Claims (1)

[Claims] 1. A first bus wiring group for transmitting a scanning signal and a second bus wiring group for transmitting a display signal are formed in a matrix, and the first bus wiring group and the second bus wiring are formed. In a liquid crystal display device of an active matrix array system in which a pixel electrode and a switching element are formed corresponding to an intersection with a group, and a storage capacitor connected to the pixel electrode is provided, a liquid crystal display device between a counter voltage source and a counter common electrode is provided. The product (τ (μs)) of the supply resistance and the capacitance between the first bus wiring group and the second bus wiring group and the counter common electrode, and
Storage capacity / liquid crystal capacity (Cst / Clc) is 5 (1 / (1.2 + Cst / Clc)) (0.18 + 0.12 / (1 + 1.2 (Cst / Clc))) (1 / (1 + exp (16.7 A liquid crystal display device characterized by being in a range satisfying /τ)))<0.1.