JPH06196577A - Package for electronic element - Google Patents

Package for electronic element

Info

Publication number
JPH06196577A
JPH06196577A JP4344417A JP34441792A JPH06196577A JP H06196577 A JPH06196577 A JP H06196577A JP 4344417 A JP4344417 A JP 4344417A JP 34441792 A JP34441792 A JP 34441792A JP H06196577 A JPH06196577 A JP H06196577A
Authority
JP
Japan
Prior art keywords
metallization layer
electronic element
insulating
insulating frame
notch
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP4344417A
Other languages
Japanese (ja)
Other versions
JP2948998B2 (en
Inventor
Harumi Takeoka
治巳 竹岡
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Family has litigation
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Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP4344417A priority Critical patent/JP2948998B2/en
Publication of JPH06196577A publication Critical patent/JPH06196577A/en
Application granted granted Critical
Publication of JP2948998B2 publication Critical patent/JP2948998B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10HINORGANIC LIGHT-EMITTING SEMICONDUCTOR DEVICES HAVING POTENTIAL BARRIERS
    • H10H20/00Individual inorganic light-emitting semiconductor devices having potential barriers, e.g. light-emitting diodes [LED]
    • H10H20/80Constructional details
    • H10H20/85Packages
    • H10H20/8506Containers

Landscapes

  • Casings For Electric Apparatus (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)

Abstract

(57)【要約】 【目的】内部に収容する電子素子の気密封止を完全と
し、電子素子を外部電気回路に確実、強固に接続するこ
とができる小型の電子素子収納用パッケージを提供する
ことにある。 【構成】側面に切欠部1bを有し、上面から前記切欠部
1bを介し下面にかけて導出する配線用メタライズ層4
を有する絶縁基体1と、前記絶縁基体1の上面外周部に
接合され、側面に切欠部2bを有し、上面に封止用メタ
ライズ層6を有する絶縁枠体2とから成る電子素子収納
用パッケージであって、前記絶縁枠体2側面に設けた切
欠部2bの切欠断面積を絶縁基体1側面に設けた切欠部
1bの切欠断面積より小さくするとともに絶縁枠体2側
面に設けた切欠部2bに封止用メタライズ層6と配線用
メタライズ層4とを電気的に接続させる接続用メタライ
ズ層7を被着させた。
(57) [Abstract] [Purpose] To provide a small package for housing an electronic element, in which the electronic element housed inside is completely hermetically sealed and the electronic element can be securely and firmly connected to an external electric circuit. It is in. A wiring metallization layer 4 having a cutout portion 1b on a side surface and led out from an upper surface to the lower surface through the cutout portion 1b.
A package for storing an electronic element comprising an insulating base body 1 having the above, and an insulating frame body 2 joined to the outer peripheral portion of the upper surface of the insulating base body 1, having a cutout portion 2b on the side surface, and having a metallizing layer 6 for sealing on the upper surface. In addition, the cutout cross-sectional area of the cutout portion 2b provided on the side surface of the insulating frame body 2 is made smaller than the cutout cross-sectional area of the cutout portion 1b provided on the side surface of the insulating base body 1, and the cutout portion 2b provided on the side surface of the insulating frame body 2. Then, a connection metallization layer 7 for electrically connecting the sealing metallization layer 6 and the wiring metallization layer 4 was applied.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、SAWフィルターや発
光素子等の小型電子素子を収容するための電子素子収納
用パッケージに関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic element housing package for housing small electronic elements such as SAW filters and light emitting elements.

【0002】[0002]

【従来の技術】従来、SAWフィルターや発光素子等の
小型電子素子を収容するための電子素子収納用パッケー
ジは、図3、図4に示すようにアルミナセラミックス等
の電気絶縁材料から成り、上面中央部に電子素子を搭載
するための搭載部11a及び該搭載部11a周辺から下
面にかけて導出するタングステン、モリブデン等の高融
点金属粉末から成る配線用メタライズ層13を有する絶
縁基体11と、同じくアルミナセラミックス等の電気絶
縁材料から成り、前記絶縁基体11の上面外周部に接合
され、上面に金属製蓋体が接合される封止用メタライズ
層14を有する絶縁枠体12とから構成されており、絶
縁基体11の搭載部11aに電子素子15を半田、樹
脂、ガラス等の接着剤を介して接着固定するとともに電
子素子15の各電極(接地電極を含む)をボンディング
ワイヤー16を介して配線用メタライズ層13に電気的
に接続し、しかる後、絶縁枠体12の上面に被着させた
封止用メタライズ層14に金属製蓋体17を半田等の封
止材を介して接合させ、絶縁基体11、絶縁枠体12及
び蓋体17から成る容器内部に電子素子15を気密に封
止することによって最終製品としての電子部品となる。
2. Description of the Related Art Conventionally, an electronic element housing package for housing a small electronic element such as a SAW filter or a light emitting element is made of an electrically insulating material such as alumina ceramics as shown in FIGS. Insulating substrate 11 having a mounting portion 11a for mounting an electronic element on a portion and a wiring metallization layer 13 made of a high melting point metal powder such as tungsten or molybdenum, which is led out from the periphery of the mounting portion 11a to the lower surface, and also alumina ceramics or the like. And an insulating frame 12 having an encapsulating metallization layer 14 bonded to the outer peripheral portion of the upper surface of the insulating base 11 and having a metal lid bonded to the upper surface. The electronic element 15 is bonded and fixed to the mounting portion 11a of the electronic component 11 with an adhesive such as solder, resin, or glass, and each electrode of the electronic element 15 is fixed. (Including the ground electrode) is electrically connected to the wiring metallization layer 13 via the bonding wire 16, and then the sealing metallization layer 14 attached to the upper surface of the insulating frame 12 is covered with the metal lid 17 Are joined via a sealing material such as solder, and the electronic element 15 is hermetically sealed inside the container composed of the insulating base 11, the insulating frame 12 and the lid 17 to form an electronic component as a final product.

【0003】尚、前記絶縁基体11に被着形成された配
線用メタライズ層13は絶縁基体11の下面に導出させ
た部位が外部電気回路基板の配線導体に半田等の導電性
接着剤を介して接合され、これによって内部に収容する
電子素子15が外部電気回路に電気的に接続されるよう
になっている。
The wiring metallization layer 13 adhered to the insulating base 11 has a portion led out to the lower surface of the insulating base 11 on the wiring conductor of the external electric circuit board via a conductive adhesive such as solder. They are joined together, so that the electronic element 15 housed inside is electrically connected to an external electric circuit.

【0004】また前記電子素子収納用パッケージは、絶
縁基体11の側面に半径約0.2mm程度の略半円状の
複数の切欠部11bが形成されており、該切欠部11b
を介して配線用メタライズ層13が絶縁基体11の上面
から下面にかけて導出されている。
Further, in the package for housing the electronic element, a plurality of substantially semicircular cutouts 11b having a radius of about 0.2 mm are formed on the side surface of the insulating base 11, and the cutouts 11b are formed.
The metallization layer 13 for wiring is led out from the upper surface to the lower surface of the insulating base 11 via.

【0005】更に前記電子素子収納用パッケージは絶縁
枠体12上面に被着させた封止用メタライズ層14と絶
縁基体11に被着させた配線用メタライズ層13との間
に不要な静電結合が形成されて電子素子の動作が不安定
となることを防止するために通常、絶縁枠体12に被着
させた封止用メタライズ層14と絶縁基体11に被着さ
せた配線用メタライズ層13の一部(一般的には電子素
子の接地電極に接続される配線用メタライズ層13)と
が絶縁枠体12側面の切欠部12aに設けられた接続用
メタライズ層18を介して電気的に接続されている。
Further, in the electronic element housing package, unnecessary electrostatic coupling is provided between the sealing metallization layer 14 attached to the upper surface of the insulating frame 12 and the wiring metallization layer 13 attached to the insulating substrate 11. In order to prevent the operation of the electronic element from becoming unstable due to the formation of the metal, the metallizing layer 14 for sealing which is attached to the insulating frame 12 and the metallizing layer 13 for wiring which is attached to the insulating base 11. Part (generally, the wiring metallization layer 13 connected to the ground electrode of the electronic element) is electrically connected through the connection metallization layer 18 provided in the notch 12a on the side surface of the insulating frame 12. Has been done.

【0006】[0006]

【発明が解決しようとする課題】しかしながら、近時、
電子部品の小型化に伴い電子素子を収容する電子素子収
納用パッケージも小型化しており、絶縁枠体の幅が切欠
部の形成位置で極めて狭いものとなってきた。そのため
絶縁枠体上面の封止用メタライズ層に金属製蓋体を封止
材を介して接合させ電子素子収納用パッケージ内に電子
素子を収容した場合、絶縁枠体と金属製蓋体との間に介
在する封止材の量が少なくなり、その結果、パッケージ
の気密封止の信頼性が低いものとなる欠点を有してい
た。
However, in recent years,
Along with the miniaturization of electronic components, electronic device housing packages that house electronic devices have also become smaller, and the width of the insulating frame has become extremely narrow at the position where the notch is formed. Therefore, when the metal lid is bonded to the sealing metallization layer on the upper surface of the insulating frame via the sealing material to house the electronic element in the electronic element housing package, the space between the insulating frame and the metallic lid is reduced. The amount of the sealing material intervening in the package is small, and as a result, the reliability of the hermetic sealing of the package is low.

【0007】[0007]

【目的】本発明は上記欠点に鑑み案出されたもので、そ
の目的は、内部に収容する電子素子の気密封止を完全と
し、電子素子を外部電気回路に確実、強固に接続するこ
とができる小型の電子素子収納用パッケージを提供する
ことにある。
[Object] The present invention has been devised in view of the above-mentioned drawbacks, and an object thereof is to complete the hermetic sealing of an electronic element housed therein and to securely and firmly connect the electronic element to an external electric circuit. An object of the present invention is to provide a small package for accommodating electronic elements.

【0008】[0008]

【課題を解決するための手段】本発明は、側面に切欠部
を有し、上面から前記切欠部を介し下面にかけて導出す
る配線用メタライズ層を有する絶縁基体と、前記絶縁基
体の上面外周部に接合され、側面に切欠部を有し、上面
に封止用メタライズ層を有する絶縁枠体とから成る電子
素子収納用パッケージであって、前記絶縁枠体側面に設
けた切欠部の切欠断面積を絶縁基体側面に設けた切欠部
の切欠断面積より小さくするとともに絶縁枠体側面に設
けた切欠部に封止用メタライズ層と配線用メタライズ層
とを電気的に接続させる接続用メタライズ層を被着させ
たことを特徴とするものである。
According to the present invention, there is provided an insulating base having a notch on a side surface and a wiring metallization layer extending from an upper surface to a lower surface through the notch, and an outer peripheral surface of an upper surface of the insulating base. What is claimed is: 1. A package for storing an electronic element, comprising an insulating frame body which is joined and has a notch portion on a side surface and an encapsulating metallization layer on an upper surface, wherein the notch cross-sectional area of the notch portion provided on the side surface of the insulating frame body is A connection metallization layer for electrically connecting the metallization layer for sealing and the metallization layer for wiring is attached to the cutout portion formed on the side surface of the insulating frame while making the cutout cross-sectional area of the cutout portion formed on the side surface of the insulating substrate smaller. It is characterized by having done.

【0009】[0009]

【作用】絶縁枠体の側面に設けた切欠部の切欠断面積を
絶縁基体の側面に設けた切欠部の切欠断面積より小さく
したことから絶縁枠体の切欠部の幅を広くなすことがで
き、これによって絶縁枠体と金属製蓋体とを封止材を介
して接合させた場合、絶縁枠体と金属製蓋体との間に介
在する封止材の量は多くなってパッケージの気密封止の
信頼性が大幅に向上する。
Since the notch cross-sectional area of the notch provided on the side surface of the insulating frame is made smaller than the notch cross-sectional area of the notch provided on the side of the insulating base, the width of the notch of the insulating frame can be increased. Therefore, when the insulating frame and the metallic lid are joined together via the sealing material, the amount of the sealing material interposed between the insulating frame and the metallic lid increases and the package air The reliability of tight sealing is significantly improved.

【0010】また、前記絶縁基体の側面に形成された切
欠部の切欠断面積が大きいことから絶縁基体の下面に導
出された配線用メタライズ層を外部電気回路基板の配線
導体に半田等の導電性接着剤を介して接合させ、内部に
収容する電子素子を外部電気回路に電気的に接続する
際、絶縁基体側面の切欠部内に位置する配線用メタライ
ズ層と外部電気回路基板の配線導体との間に導電性接着
剤の溜まり(メニスカス)が形成され、これによって配
線用メタライズ層と外部電気回路基板の配線導体との接
合が強固となり、電子素子を外部電気回路に確実、強固
に電気的接続することが可能となる。
Further, since the notch cross-sectional area of the notch formed on the side surface of the insulating base is large, the metallization layer for wiring led out to the lower surface of the insulating base is electrically conductive such as solder to the wiring conductor of the external electric circuit board. Between the wiring metallization layer located in the notch on the side surface of the insulating substrate and the wiring conductor of the external electric circuit board when the electronic element accommodated inside is electrically connected to the external electric circuit by bonding via an adhesive. A pool (meniscus) of conductive adhesive is formed on the surface, which strengthens the bond between the metallization layer for wiring and the wiring conductor of the external electric circuit board, and securely and firmly electrically connects the electronic element to the external electric circuit. It becomes possible.

【0011】[0011]

【実施例】次に本発明を添付図面に基づき詳細に説明す
る。図1、図2は本発明にかかる電子素子収納用パッケ
ージの一実施例を示し、1は絶縁基体、2は絶縁枠体で
ある。この絶縁基体1と絶縁枠体2とで電子素子3が収
容される半導体素子収納用パッケージが形成される。
The present invention will now be described in detail with reference to the accompanying drawings. 1 and 2 show an embodiment of a package for housing an electronic element according to the present invention, in which 1 is an insulating base and 2 is an insulating frame. The insulating substrate 1 and the insulating frame 2 form a semiconductor element housing package in which the electronic element 3 is housed.

【0012】前記絶縁基体1は略矩形状の平板であり、
その上面中央部には電子素子が搭載される搭載部1aを
有し、前記搭載部1aには電子素子3が半田、ガラス、
樹脂等の接着剤を介して接着固定される。
The insulating substrate 1 is a substantially rectangular flat plate,
A mounting portion 1a on which an electronic element is mounted is provided in the central portion of the upper surface, and the electronic element 3 is mounted on the mounting portion 1a by solder, glass,
It is adhered and fixed via an adhesive such as resin.

【0013】前記絶縁基体1はアルミナ質焼結体、ムラ
イト質焼結体、窒化アルミニウム質焼結体、炭化珪素質
焼結体、ガラス−セラミック質焼結体等の電気絶縁材料
から成り、例えばアルミナ質焼結体から成る場合、アル
ミナ、シリカ、カルシア、マグネシア等の原料粉末に適
当なバインダー及び溶剤を添加混合して泥漿となすとと
もにこれを従来周知のドクターブレード法やカレンダー
ロール法等のシート形成技術を採用してセラミックグリ
ーンシート(セラミック生シート)を得、次に前記セラ
ミックグリーンシートを打ち抜き加工法により所定形状
となすとともにこれを約1600℃の高温で焼成するこ
とによって製作される。
The insulating substrate 1 is made of an electrically insulating material such as an alumina sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, and a glass-ceramic sintered body. When it is composed of an alumina-based sintered body, it is made into a slurry by adding and mixing an appropriate binder and solvent to raw material powder such as alumina, silica, calcia, magnesia, etc. and it is a sheet of the conventionally known doctor blade method or calender roll method. A ceramic green sheet (ceramic green sheet) is obtained by adopting a forming technique, and then the ceramic green sheet is formed into a predetermined shape by a punching method and is fired at a high temperature of about 1600 ° C.

【0014】また前記絶縁基体1には上面の電子素子搭
載部1a周辺から側面を介し下面にかけて導出する配線
用メタライズ層4が被着形成されており、該配線用メタ
ライズ層4の電子素子搭載部1a周辺には電子素子3の
各電極がボンディングワイヤー5を介して電気的に接続
され、また絶縁基体1の下面に導出した部位には図示し
ない外部電気回路基板の配線導体が半田等の導電性接着
剤を介して電気的に接続される。
A wiring metallization layer 4 extending from the periphery of the electronic element mounting portion 1a on the upper surface to the lower surface via the side surface is adhered to the insulating substrate 1, and the electronic element mounting portion of the wiring metallization layer 4 is formed. Electrodes of the electronic element 3 are electrically connected to the periphery of 1a via the bonding wires 5, and wiring conductors of an external electric circuit board (not shown) are electrically conductive such as solder in a portion led out to the lower surface of the insulating substrate 1. It is electrically connected via an adhesive.

【0015】前記配線用メタライズ層4はタングステ
ン、モリブデン、マンガン、銅、銀等の金属粉末から成
り、例えばタングステン、モリブデン等の金属粉末に適
当なバインダー、溶剤を添加混合して得た金属ペースト
を絶縁基体1となるセラミックグリーンシートに予め従
来周知のスクリーン印刷法により所定パターンに印刷塗
布しておくことによって絶縁基体1の電子素子搭載部1
a周辺から側面を介し下面にかけて被着形成される。
The wiring metallization layer 4 is made of a metal powder of tungsten, molybdenum, manganese, copper, silver or the like. For example, a metal paste obtained by adding and mixing an appropriate binder and a solvent to the metal powder of tungsten, molybdenum or the like. An electronic element mounting portion 1 of the insulating substrate 1 is formed by printing and applying a predetermined pattern to a ceramic green sheet to be the insulating substrate 1 in advance by a conventionally known screen printing method.
It is adhered from the periphery of a to the lower surface via the side surface.

【0016】更に、前記絶縁基体1の側面には切欠部1
bが形成されており、該切欠部1bは配線用メタライズ
層4の側面通路として作用するとともに配線用メタライ
ズ層4を外部電気回路基板の配線導体に半田等の導電性
接着剤を介して接続させる際、導電性接着剤の一部を内
部に収容することによって配線用メタライズ層4と外部
電気回路基板の配線導体との間に良好なメニスカスを形
成させる作用を為す。
Further, a cutout 1 is formed on the side surface of the insulating base 1.
b, the notch 1b acts as a side passage of the wiring metallization layer 4 and connects the wiring metallization layer 4 to the wiring conductor of the external electric circuit board through a conductive adhesive such as solder. At this time, by containing a part of the conductive adhesive inside, a good meniscus is formed between the wiring metallization layer 4 and the wiring conductor of the external electric circuit board.

【0017】前記絶縁基体1の切欠部1aは半円状を成
しており、その半径が0.2mm以下となると配線用メ
タライズ層4と外部電気回路基板の配線導体との間に良
好なメニスカスを形成するのが困難となることから半径
を0.2mm以上とした半円状となすことが好ましく、
絶縁基体1の全体形状を考慮すれば0.2乃至1.0m
mとしておくことが好ましい。
The notch 1a of the insulating substrate 1 has a semicircular shape, and when the radius is 0.2 mm or less, a good meniscus is formed between the wiring metallization layer 4 and the wiring conductor of the external electric circuit board. Since it is difficult to form the shape, it is preferable to form a semicircular shape with a radius of 0.2 mm or more,
Considering the entire shape of the insulating base 1, 0.2 to 1.0 m
It is preferable to set m.

【0018】尚、前記切欠部1aは絶縁基体1となるセ
ラミックグリーンシートに予め打ち抜き加工法により半
円の打ち抜き加工を施しておくことによって絶縁基体1
の側面に形成される。
The cutout portion 1a is formed by subjecting the ceramic green sheet to be the insulating substrate 1 to a semicircular punching process by a punching process in advance.
Is formed on the side surface of.

【0019】また前記絶縁基体1の上面外周部には絶縁
枠体2が電子素子搭載部1aを囲繞するようにして接合
されている。
An insulating frame 2 is joined to the outer peripheral portion of the upper surface of the insulating base 1 so as to surround the electronic element mounting portion 1a.

【0020】前記絶縁枠体2はアルミナ質焼結体、ムラ
イト質焼結体、窒化アルミニウム質焼結体、炭化珪素質
焼結体、ガラス−セラミック質焼結体等の電気絶縁材料
から成り、例えばアルミナ質焼結体から成る場合、アル
ミナ、シリカ、カルシア、マグネシア等の原料粉末に適
当なバインダー及び溶剤を添加混合して泥漿となすとと
もにこれを従来周知のドクターブレード法やカレンダー
ロール法等のシート形成技術を採用してセラミックグリ
ーンシート(セラミック生シート)を得、次に前記セラ
ミックグリーンシートを打ち抜き加工法により所定の枠
状となすとともにこれを絶縁基体1となるセラミックグ
リーンシート上に載置させ、しかる後、前記絶縁基体1
と成るセラミックグリーンシートと絶縁枠体2と成る枠
状のセラミックグリーンシートとを約1600℃の高温
で焼成し、両者を焼結一体化させることによって絶縁基
体1の上面外周部に接合される。
The insulating frame 2 is made of an electrically insulating material such as an alumina sintered body, a mullite sintered body, an aluminum nitride sintered body, a silicon carbide sintered body, and a glass-ceramic sintered body. For example, in the case of an alumina-based sintered body, alumina, silica, calcia, magnesia and other raw material powders are mixed by adding an appropriate binder and solvent to form a slurry, which is conventionally known as a doctor blade method or a calendar roll method. A ceramic green sheet (ceramic green sheet) is obtained by adopting a sheet forming technique, and then the ceramic green sheet is formed into a predetermined frame shape by a punching method and placed on the ceramic green sheet which becomes the insulating substrate 1. Then, the insulating substrate 1
And a frame-shaped ceramic green sheet serving as the insulating frame body 2 are fired at a high temperature of about 1600 ° C., and the both are sintered and integrated to be bonded to the upper peripheral portion of the upper surface of the insulating base 1.

【0021】前記絶縁枠体2はまたその上面に枠状の封
止用メタライズ層6が被着形成されており、該封止用メ
タライズ層6は金属製蓋体8を絶縁枠体2上に接合させ
る際の下地金属層として作用し、封止用メタライズ層6
に金属製の蓋体8を半田等の封止材9を介し接合させる
ことによって絶縁基体1と絶縁枠体2と蓋体8とから成
る容器内部に電子素子3が気密に封止される。
On the upper surface of the insulating frame body 2, a frame-shaped sealing metallization layer 6 is adhered and formed. The sealing metallization layer 6 has a metallic lid body 8 on the insulating frame body 2. It acts as a base metal layer at the time of joining, and the sealing metallization layer 6
The electronic element 3 is hermetically sealed inside the container composed of the insulating base body 1, the insulating frame body 2 and the lid body 8 by joining the metallic lid body 8 with the sealing material 9 such as solder.

【0022】前記封止用メタライズ層6はタングステ
ン、モリブデン、マンガン、銅、銀等の金属粉末から成
り、配線用メタライズ層4と同様の方法によって絶縁枠
体2の上面に枠状に被着形成される。
The encapsulating metallization layer 6 is made of metal powder such as tungsten, molybdenum, manganese, copper and silver, and is formed in a frame shape on the upper surface of the insulating frame body 2 by the same method as the wiring metallization layer 4. To be done.

【0023】また、前記絶縁枠体2はその側面に切欠部
2bが形成されており、該切欠部2bは後述する封止用
メタライズ層6と配線用メタライズ層4とを接続させる
接続用メタライズ層7の通路として作用を為す。
Further, the insulating frame 2 is formed with a notch 2b on its side surface, and the notch 2b connects the metallizing layer 6 for sealing and the metallizing layer 4 for wiring, which will be described later, to each other. Acts as a passage for 7.

【0024】前記絶縁枠体2の側面に形成する切欠部2
bは絶縁枠体2となるセラミックグリーンシートに予め
打ち抜き加工法により半円の打ち抜き加工を施しておく
ことによって絶縁枠体2の側面に半円状に形成され、そ
の半径が0.15mmを越えると絶縁枠体2の切欠部2
bを形成した位置の幅が狭くなり、絶縁枠体2上面の封
止用メタライズ層6に金属製蓋体8を封止材9を介して
接合させ電子素子収納用パッケージ内に電子素子3を収
容した場合、絶縁枠体2と金属製蓋体8との間に介在す
る封止材9の量が少なくなってパッケージの気密封止の
信頼性が低いものとなる危険性がある。従って、前記絶
縁枠体2に形成する切欠部2bは半径0.15mm以下
の半円状としておくことが好ましく、切欠部2b内に接
続用メタライズ層7を形成することを考慮すれば0.0
5乃至0.15mmとしておくことが良い。
Notch 2 formed on the side surface of the insulating frame 2
b is formed in a semicircular shape on the side surface of the insulating frame body 2 by punching a semicircular shape on the ceramic green sheet to be the insulating frame body 2 in advance by a punching method, and its radius exceeds 0.15 mm. And notch 2 of insulating frame 2
The width of the position where b is formed becomes narrow, and the metal lid 8 is bonded to the sealing metallization layer 6 on the upper surface of the insulating frame 2 via the sealing material 9 to place the electronic element 3 in the electronic element housing package. When housed, there is a risk that the amount of the sealing material 9 interposed between the insulating frame body 2 and the metal lid body 8 becomes small, and the hermetic sealing of the package becomes unreliable. Therefore, it is preferable that the cutout portion 2b formed in the insulating frame body 2 has a semicircular shape with a radius of 0.15 mm or less, and if the formation of the connection metallization layer 7 in the cutout portion 2b is taken into consideration, it is 0.0.
It is preferable to set it to 5 to 0.15 mm.

【0025】更に前記絶縁枠体2の側面に形成した切欠
部2bには接続用メタライズ配線層7が被着形成されて
おり、該接続用メタライズ層7は絶縁枠体2に被着させ
た封止用メタライズ層6と絶縁基体1に被着させた配線
用メタライズ層4の一部とを電気的に接続させ、封止用
メタライズ層6と配線用メタライズ層4との間に不要な
静電結合が形成されるのを有効に防止する作用を為し、
これによって前記静電結合により搭載する電子素子3の
作動が不安定となることは皆無となる。
Further, a connection metallized wiring layer 7 is adhered to the notch 2b formed on the side surface of the insulating frame 2, and the connection metallized layer 7 is sealed by the insulating frame 2. The stop metallization layer 6 and a part of the wiring metallization layer 4 adhered to the insulating substrate 1 are electrically connected to each other, so that unnecessary static electricity is not provided between the sealing metallization layer 6 and the wiring metallization layer 4. Acts to effectively prevent the formation of bonds,
As a result, the operation of the electronic element 3 mounted by the electrostatic coupling is never unstable.

【0026】前記接続用メタライズ層7はタングステ
ン、モリブデン、マンガン、銅、銀等の金属粉末から成
り、封止用メタライズ層6と同様の方法によって絶縁枠
体2の側面切欠部2b内に被着形成される。
The connecting metallization layer 7 is made of a metal powder such as tungsten, molybdenum, manganese, copper, silver, etc., and is deposited in the side surface notch 2b of the insulating frame 2 by the same method as the sealing metallization layer 6. It is formed.

【0027】かくして本発明の電子素子収納用パッケー
ジによれば、絶縁基体1の電子素子搭載部1aに電子素
子3を半田、ガラス、樹脂等の接着剤を介して接着固定
するとともに該電子素子3の各電極をボンディングワイ
ヤー5を介して配線用メタライズ層4に接続させ、しか
る後、絶縁枠体2上面の封止用メタライズ層6に金属製
蓋体8を金−錫半田等の封止材9を介して接合させ、絶
縁基体1と絶縁枠体2と蓋体8とからなる容器内部に電
子素子3を気密に封止すことによって製品としての電子
装置が完成する。
Thus, according to the electronic element housing package of the present invention, the electronic element 3 is adhered and fixed to the electronic element mounting portion 1a of the insulating substrate 1 through an adhesive such as solder, glass or resin. Each electrode is connected to the wiring metallization layer 4 through the bonding wire 5, and then the metal lid 8 is attached to the metallization layer 6 for sealing on the upper surface of the insulating frame 2 with a sealing material such as gold-tin solder. The electronic device 3 is completed by hermetically sealing the electronic element 3 inside the container composed of the insulating base body 1, the insulating frame body 2 and the lid body 8 by joining them via 9.

【0028】尚、本発明は上述の実施例に限定されるも
のではなく、本発明の要旨を逸脱しない範囲であれば種
々の変更は可能であり、例えば上述の実施例では電子素
子収納用パッケージの絶縁基体1及び絶縁枠体2をそれ
ぞれ1枚のセラミックグリーンシートで形成したが、複
数枚のセラミックグリーンシートを積層したもので形成
してもよい。
The present invention is not limited to the above-mentioned embodiments, but various modifications can be made without departing from the scope of the present invention. For example, in the above-mentioned embodiments, the electronic element storing package is provided. Although the insulating base 1 and the insulating frame 2 are each formed of one ceramic green sheet, they may be formed by stacking a plurality of ceramic green sheets.

【0029】また、前述の実施例では絶縁枠体2の上面
に被着させた封止用メタライズ層6に金属製の蓋体8を
金−錫半田等の封止材9を介して接合していたが、封止
用メタライズ層6に金属枠体を銀ろう等のろう材を介し
て接合させ、該金属枠体に金属製の蓋体8をシームウエ
ルド法により溶接し接合させてもよい。
Further, in the above-mentioned embodiment, the metallic lid 8 is bonded to the sealing metallization layer 6 adhered to the upper surface of the insulating frame 2 through the sealing material 9 such as gold-tin solder. However, the metal frame body may be joined to the sealing metallization layer 6 through a brazing material such as silver brazing, and the metal lid body 8 may be welded and joined to the metal frame body by the seam weld method. .

【0030】更に、上述の実施例では絶縁基体1の側面
に形成した切欠部1b及び絶縁枠体2の側面に形成した
切欠部2bをいずれも半円状となしたが半円状のものに
限るることなく長半円状やコの字状であってもよい。
Further, in the above-described embodiment, both the notch 1b formed on the side surface of the insulating substrate 1 and the notch 2b formed on the side surface of the insulating frame body 2 are semicircular, but they are semicircular. The shape is not limited, and may be elliptical or U-shaped.

【0031】更にまた、上述の実施例では絶縁基体1の
切欠部1b及び絶縁枠体2の切欠部2bがいずれも絶縁
基体1及び絶縁枠体2の各辺中央部に形成されている
が、各辺中央部に限定されるものではなく、絶縁基体1
及び絶縁枠体2の角部に形成しても良い。この場合、切
欠部1b、2bの断面形状は扇状やL字状となる。
Furthermore, in the above-described embodiment, the cutout portion 1b of the insulating base body 1 and the cutout portion 2b of the insulating frame body 2 are both formed in the center portions of the sides of the insulating base body 1 and the insulating frame body 2, respectively. The insulating base 1 is not limited to the central portion of each side.
Alternatively, it may be formed at a corner of the insulating frame 2. In this case, the cutouts 1b and 2b have a fan-shaped or L-shaped cross-section.

【0032】[0032]

【発明の効果】本発明の電子素子収納用パッケージによ
れば、絶縁枠体の側面に設けた切欠部の切欠断面積を絶
縁基体の側面に設けた切欠部の切欠断面積より小さくし
たことから絶縁枠体の切欠部の幅を広くなすことがで
き、これによって絶縁枠体と金属製蓋体とを封止材を介
して接合させた場合、絶縁枠体と金属製蓋体との間に介
在する封止材の量は多くなってパッケージの気密封止の
信頼性が大幅に向上する。
According to the electronic element storage package of the present invention, the notch cross-sectional area of the notch provided on the side surface of the insulating frame is smaller than the notch cross-sectional area of the notch provided on the side surface of the insulating base. The width of the cutout portion of the insulating frame body can be widened, and when the insulating frame body and the metal lid body are joined to each other through the sealing material, the insulating frame body and the metal lid body are provided with a space between the insulating frame body and the metal lid body. The amount of intervening encapsulant is increased, and the reliability of hermetic sealing of the package is significantly improved.

【0033】また、前記絶縁基体の側面に形成された切
欠部の切欠断面積が大きいことから絶縁基体の下面に導
出された配線用メタライズ層を外部電気回路基板の配線
導体に半田等の導電性接着剤を介して接合させ、内部に
収容する電子素子を外部電気回路に電気的に接続する
際、絶縁基体側面の切欠部内に位置する配線用メタライ
ズ層と外部電気回路基板の配線導体との間に導電性接着
剤の溜まりが形成され(メニスカスが形成され)、これ
によって配線用メタライズ層と外部電気回路基板の配線
導体との接合が強固となり、電子素子を外部電気回路に
確実、強固に電気的接続することが可能となる。
Further, since the notch cross-sectional area of the notch formed on the side surface of the insulating base is large, the wiring metallization layer led out to the lower surface of the insulating base is electrically conductive such as solder to the wiring conductor of the external electric circuit board. Between the wiring metallization layer located in the notch on the side surface of the insulating substrate and the wiring conductor of the external electric circuit board when the electronic element accommodated inside is electrically connected to the external electric circuit by bonding via an adhesive. A pool of conductive adhesive is formed on the surface (a meniscus is formed), which strengthens the connection between the metallization layer for wiring and the wiring conductor of the external electric circuit board, and ensures that the electronic element is securely and firmly electrically connected to the external electric circuit. It becomes possible to make a physical connection.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の電子素子収納用パッケージの一実施例
を示す断面図である。
FIG. 1 is a sectional view showing an embodiment of a package for housing an electronic element of the present invention.

【図2】図1に示した電子素子収納用パッケージの平面
図である。
FIG. 2 is a plan view of the electronic element housing package shown in FIG.

【図3】従来の電子素子収納用パッケージの断面図であ
る。
FIG. 3 is a cross-sectional view of a conventional electronic element housing package.

【図4】図3に示した電子素子収納用パッケージの平面
図である。
FIG. 4 is a plan view of the electronic element housing package shown in FIG.

【符号の説明】[Explanation of symbols]

1・・・絶縁基体 1a・・搭載部 1b・・絶縁基体に形成した切欠部 2・・・絶縁枠体 2b・・絶縁枠体に形成した切欠部 3・・・電子素子 4・・・配線用メタライズ層 6・・・封止用メタライズ層 7・・・接続用メタライズ層 DESCRIPTION OF SYMBOLS 1 ... Insulating base 1a ... Mounting part 1b ... Cutout formed in insulating base 2 ... Insulating frame 2b ... Cutout formed in insulating frame 3 ... Electronic element 4 ... Wiring Metallization layer 6 ... Sealing metallization layer 7 ... Connection metallization layer

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】側面に切欠部を有し、上面から前記切欠部
を介し下面にかけて導出する配線用メタライズ層を有す
る絶縁基体と、前記絶縁基体の上面外周部に接合され、
側面に切欠部を有し、上面に封止用メタライズ層を有す
る絶縁枠体とから成る電子素子収納用パッケージであっ
て、前記絶縁枠体側面に設けた切欠部の切欠断面積を絶
縁基体側面に設けた切欠部の切欠断面積より小さくする
とともに絶縁枠体側面に設けた切欠部に封止用メタライ
ズ層と配線用メタライズ層とを電気的に接続させる接続
用メタライズ層を被着させたことを特徴とする電子素子
収納用パッケージ。
1. An insulating base having a notch on a side surface and having a wiring metallization layer extending from the upper surface to the lower surface through the notch, and an insulating base bonded to an upper peripheral portion of the upper surface.
What is claimed is: 1. An electronic element storage package comprising an insulating frame body having a cutout portion on a side surface and a sealing metallization layer on an upper surface, wherein a cutout cross-sectional area of the cutout portion provided on the side surface of the insulating frame body is a side surface of an insulating substrate. A connection metallization layer for electrically connecting the metallization layer for sealing and the metallization layer for wiring to the notch provided on the side surface of the insulating frame, and having a size smaller than the notch cross-sectional area of the notch provided at A package for storing electronic elements characterized by:
JP4344417A 1992-12-24 1992-12-24 Electronic device storage package Expired - Fee Related JP2948998B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4344417A JP2948998B2 (en) 1992-12-24 1992-12-24 Electronic device storage package

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4344417A JP2948998B2 (en) 1992-12-24 1992-12-24 Electronic device storage package

Publications (2)

Publication Number Publication Date
JPH06196577A true JPH06196577A (en) 1994-07-15
JP2948998B2 JP2948998B2 (en) 1999-09-13

Family

ID=18369096

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4344417A Expired - Fee Related JP2948998B2 (en) 1992-12-24 1992-12-24 Electronic device storage package

Country Status (1)

Country Link
JP (1) JP2948998B2 (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000228451A (en) * 1999-02-05 2000-08-15 Matsushita Electric Ind Co Ltd Electronic component
JP2002270709A (en) * 2001-03-08 2002-09-20 Toyo Commun Equip Co Ltd Package of electronic components for surface mounting
JP2004079642A (en) * 2002-08-12 2004-03-11 Kyocera Corp Wiring board
JP2005191042A (en) * 2003-12-24 2005-07-14 Kyocera Corp Wiring board

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2000228451A (en) * 1999-02-05 2000-08-15 Matsushita Electric Ind Co Ltd Electronic component
JP2002270709A (en) * 2001-03-08 2002-09-20 Toyo Commun Equip Co Ltd Package of electronic components for surface mounting
JP2004079642A (en) * 2002-08-12 2004-03-11 Kyocera Corp Wiring board
JP2005191042A (en) * 2003-12-24 2005-07-14 Kyocera Corp Wiring board

Also Published As

Publication number Publication date
JP2948998B2 (en) 1999-09-13

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