JPH0622146A - Picture processor - Google Patents

Abstract

(57) [Abstract] [Purpose] To reduce the memory capacity for storing transmission image data in an image processing apparatus. [Structure] The CPU 2 obtains an image having a resolution of 200 [pel / inch] by converting the resolution of the data in the RAM by the LSI in step S23, and obtains the image of 200 [pel in the RAM in step S24.
/ inch] data is converted to 100 [pel / i
Images having a resolution of nch] are obtained and stored, and in a succeeding step S25, an image having a resolution of 50 obtained by converting the resolution of the data in the RAM by the LSI is overwritten in the memory area of 200. Similarly, an image with a resolution of 25 [pel / inch] and an image with a resolution of 12.5 [pel / inch] are
After overwriting the memory areas of 2.5 and 50, the image having the resolution of 12.5 [pel / inch] is modulated by the modem in step S28 and transmitted through the line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image processing apparatus having a page memory for images and performing progressive buildup.

[0002]

2. Description of the Related Art A conventional facsimile apparatus as an image processing apparatus does not have so-called progressive build-up, but is configured to print out an image (hard copy) only by sequential build-up. The progressive build-up is intended to improve the image quality by displaying a rough but whole image at an early stage of transmission and then adding additional information as necessary. Further, the sequential buildup is a method of scanning the paper surface from left to right and from top to bottom, and encoding in that order.

FIG. 23 is a flow chart showing a control procedure on the transmission side of a conventional facsimile apparatus. As shown in the figure, in a conventional facsimile apparatus, images are transmitted in order from a coarse layer image to a fine layer image. That is,
In step S121, CCD reading processing is performed, and in step S122, an image having a resolution of 400 [pel / inch] is stored in the image encoding buffer area. Then, in steps S123 to S127, resolution conversion is performed in order from the high resolution image to the low resolution image.

Further, in steps S128 to S133,
The low-resolution image and the high-resolution image are coded by the LSI in this order, and the data is modulated by the modem and transmitted.

[0005]

However, in the above-mentioned conventional facsimile apparatus, the image is printed out by the sequential buildup, and in the future, the image transmission
Even when using image data that is hierarchically encoded when receiving,
It is predicted that the facsimile machine on the transmission side encodes the original image into an image layered by the JBIG hierarchical encoding process described later and transmits the image. Therefore, in order to repeat the encoding and transmit the layer image with the coarsest resolution (12.5 [pel / inch]), and then transmit the layer image with the resolution of 25 [pel / inch], 50 [pel / inch], There is a problem that all the hierarchical images up to that point must be stored in the memory in the device.

An object of the present invention is to provide a small-sized and low-priced image processing apparatus in which the memory capacity for storing the image after the progressive buildup processing is reduced.

[0007]

To achieve the above object, the present invention encodes a lower resolution image than a high resolution image, and after the encoding, converts the low resolution image to the high resolution image. In the image processing apparatus for transmitting in the order of, an image having a predetermined resolution is encoded every time an image whose transmission order is earlier than the image is transmitted, and a resolution conversion of the encoded image having the predetermined resolution. And a means for storing the resolution-converted image in the storage area of the image of the predetermined resolution.

[0008]

With the above configuration, the image processing apparatus functions to reduce the memory capacity for storing the transmission image data.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Preferred embodiments of the present invention will be described in detail below with reference to the accompanying drawings. FIG. 1 is a block diagram showing the overall configuration of a facsimile apparatus as an image processing apparatus according to an embodiment of the present invention. In the figure, a CPU (main control unit) 2 is connected to the ROM 3 and the RAM 4 via a bus 20 and controls the operation of the entire apparatus according to a program stored in the ROM 3. The RAM 4 is used as a work area for the CPU 2.

The reading unit for reading the original image in this apparatus is mainly composed of the CCD line sensor 11 and the reading motor 23. The image recording section is composed of a recording head (thermal head) 12 and a recording motor 24, and is used for recording a received image or a copy image. The modem 14 modulates / demodulates image data and control procedure data, and is connected to the line 33 via the NCU 15. The NCU 15 holds the loop current of the line 33 and exchanges the line with the telephone 34. Further, the hierarchical encoding / decoding LSI 9 (hereinafter, referred to as LSI) performs the processing (the processing of “C: encoding” and “D: decoding” shown in FIG. 2) described later.

FIG. 2 shows a JBIG (Joint Bi-level Image).
It is a figure which shows the concept of the hierarchical encoding process used as the object of standardization in (Group). Here, the resolution of the original image is 4
It is assumed that the resolution is about 00 dpi or more, and the transmission side sequentially creates the required number of layers of low-resolution images whose resolution is halved both horizontally and vertically. In the standardized model shown in FIG. 2, the resolution of the original image is 400 [pel / inch], the number of layers is 6, and the minimum resolution is 12.5 [pel / inch].
The image with the resolution of [h] and 25 [pel / inch] is 3/16 of the original picture.
It is displayed in a size of × 3/16 and is supposed to be used as an icon.

On the transmission side, the lowest resolution image is encoded and transmitted. Next, the information necessary for increasing the resolution is coded. In addition, the receiving side decodes and plays back the image with the lowest resolution, and progressively displays it by displaying the images with the resolutions improved, and finally, the original image without deterioration can be decoded and played back. To be However, it is also possible to cut off with an intermediate resolution image if necessary.

Next, the control of the facsimile apparatus according to this embodiment will be described in detail. 3 and 4 are views for reading an image in the facsimile apparatus according to the present embodiment.
It is a flowchart which shows the encoding and the transmission processing procedure. 5 to 8 are diagrams showing a memory map in the facsimile apparatus on the transmission side according to the present embodiment.
FIG. 19 is a diagram showing, in stages, hierarchical coding according to the embodiment.

In the flowchart shown in FIG. 3, in step S21, the CPU 2 drives the reading motor 23 to convey the original, and the CCD 11 performs the reading process via the gate array 7. In step S22, the CPU 2 puts 400 [pel / i] in the image coding buffer area in the RAM 4.
nch] resolution images are accumulated (this process is performed by storing # 1 in the memory map shown in FIG.
Corresponding to. For the state of the hierarchical encoding at this time, refer to FIG. 9), and in the subsequent step S23, the resolution of the data in the RAM 4 is converted by the LSI 9 to obtain an image with a resolution of 200 [pel / inch], and the image is stored. (See # 2 of FIG. 5 and FIG. 10).

In step S24, the CPU 2 has a RAM
The data of 200 [pel / inch] in 4 is converted by the LSI 9 to obtain an image having a resolution of 100 [pel / inch], and the image is stored (# 3 in FIG. 5, see FIG. 11). Further, in the subsequent step S25, the CPU 2 sets the data in the RAM 4 to LS.
The resolution is converted by I9 to obtain an image with a resolution of 50, and the image is stored (# 4 in FIG. 5, see FIG. 12). Here, the converted image data is overwritten in the memory area 200.

Similarly, in step S26, the resolution of the data in the RAM 4 is converted by the LSI 9 to obtain and store an image having a resolution of 25 [pel / inch] (see # 5 in FIG. 5 and FIG. 13).
25 overwrites the memory area of 100), step S
At 27, the CPU 2 performs resolution conversion of the data in the RAM 4 by the LSI 9 to obtain and store an image having a resolution of 12.5 [pel / inch] (see # 6 in FIG. 5 and FIG. 14. See 12.5 in FIG. 5
0 overwrites the memory area).

In step S28, the CPU 2 makes the RAM
The image with the resolution of 12.5 [pel / inch] in 4 is transferred to the transmission buffer in RAM4, and 12.5 [p in the transmission buffer
The image having a resolution of [el / inch] is modulated by the modem 14 and transmitted via the line 33 through the NCU 15. Also,
In step S29, 25 [pel / inch] and 1 in RAM4
An image having a resolution of 25-12.5 in a transmission buffer obtained by encoding 2.5 [pel / inch] data by the LSI 9 is modulated by the modem 4 and transmitted via the line 33 via the NCU 15 ( (See # 7 of FIG. 5 and FIG. 15).

In this embodiment, since the area of 200 is overwritten, it is repeated 20 times when transmitting the image data.
Image data having a resolution of 0 is required. Therefore,
In this process, each time, hierarchical coding is performed to calculate 200 data. That is, step S3
At 0 and S31, 200 [pel / inch] and 100 [pel / inc] are respectively processed by the same processing as that at steps S23 and S24.
An image having a resolution of h] is obtained (see # 9 and # 10 in FIG. 6).
Further, in steps S32 and S33, the above step S2
5, the same processing as S26 is performed, and 50 [pel / i
Images having a resolution of nch] and 25 [pel / inch] are obtained and stored (see # 11 and # 12 in FIG. 6).

In step S34, 50 [p
El / inch] and 25 [pel / inch] data are encoded by the LSI 9 and the image of the resolution of 50-25 [pel / inch] in the transmission buffer is modulated by the modem 14 and then the line 33 is transmitted via the NCU 15. It is transmitted via (see FIG. 16). In steps S35 and S36 of FIG. 4, for the same reason as above, the same process as steps S23 and S24 of FIG.
Images with resolutions of 00 [pel / inch] and 100 [pel / inch] are obtained (see # 14 and # 15 in FIG. 7). Also, step S3
In step 7, the same processing as step S25 is performed, and in the following step S38, 100 [pel / inch] and 5 in the RAM 4 and
The image of the resolution of 100-50 [pel / inch] in the transmission buffer obtained by encoding the data of 0 [pel / inch] by the LSI 9 is modulated by the modem 14 and transmitted via the line 33 through the NCU 15. (See # 16 and FIG. 17 in FIG. 7).

In steps S39 and S40, the same processes as steps S23 and S24 in FIG.
Images with a resolution of [pel / inch] and 100 [pel / inch] are obtained (see # 18 and # 19 in FIG. 8). And step S4
1 with 200 [pel / inch] and 100 [pel / i] in RAM4
The image of the resolution of 200-100 [pel / inch] in the transmission buffer obtained by encoding the data of [nch] by the LSI 9 is modulated by the modem 14 and transmitted via the line 33 through the NCU 15 (see FIG. 8). # 19, see FIG. 18), the next step S4
In 2, the CPU 2 encodes the data of 400 [pel / inch] and 200 [pel / inch] in the RAM 4 by the LSI 9 and obtains the obtained image of the resolution of 400-200 [pel / inch] in the transmission buffer. After being modulated by the MODEM 14, it is transmitted via the line 33 through the NCU 15 (see # 20 in FIG. 8 and FIG. 19).

20 and 21 are diagrams showing the structure of a memory map in a conventional facsimile apparatus (transmission side). As shown in the figure, in the conventional facsimile apparatus, the image data (200, 100, 50, 25) corresponding to the history at the stage of the hierarchical encoding is stored in the image encoding buffer as it is. I have to. Therefore, an increase in memory capacity is inevitable.

FIG. 22 shows a memory map on the receiving side of the facsimile apparatus according to the embodiment. As shown in the figure, the CPU 2 receives 12.5 [pel / inch], 25
-12.5 [pel / inch], 50-25 [pel / inch], 100
-50 [pel / inch], 200-100 [pel / inch], 400
The data of −200 [pel / inch] is accumulated in the image buffer in the RAM 4. Then, the CPU 2 drives the recording motor 24 to convey the recording paper, and records 400 [pel / inch] of data with the recording head 12, for example.

As described above, according to this embodiment,
When transmitting hierarchically encoded image data, the image information of the layer whose transmission order does not come is not stored in the image memory one by one, and the image information required at that time is the image of the layer that does not arrive in the transmission order. When the image data of the layer is overwritten in the information area and the image data of the layer is needed, the image of the layer required for transmission is calculated and transmitted each time from the original image, and the image of the image of the facsimile machine on the transmission side is transmitted. There is an effect that the capacity of the memory can be reduced, the device can be downsized, and the price can be reduced.

The present invention may be applied to a system composed of a plurality of devices or an apparatus composed of a single device.

[0025]

As described above, according to the present invention,
By storing the image information having the earlier transmission order in the area for storing the image information of the predetermined layer having the later transmission order, and calculating and transmitting the image information each time the image information of the layer is needed. There is an effect that the capacity of the transmission image memory can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram showing an overall configuration of a facsimile apparatus as an image processing apparatus according to an exemplary embodiment of the present invention.

FIG. 2 is a diagram showing a concept of hierarchical encoding processing which is a standardization object in JBIG.

FIG. 3 is a flowchart showing an image reading, encoding, and transmission processing procedure in the facsimile apparatus according to the embodiment.

FIG. 4 is a flowchart showing an image reading, encoding, and transmission processing procedure in the facsimile apparatus according to the embodiment.

FIG. 5 is a diagram showing a memory map in the facsimile apparatus on the transmission side according to the embodiment.

FIG. 6 is a diagram showing a memory map in the facsimile apparatus on the transmission side according to the embodiment.

FIG. 7 is a diagram showing a memory map in the facsimile apparatus on the transmission side according to the embodiment.

FIG. 8 is a diagram showing a memory map in the facsimile apparatus on the transmission side according to the embodiment.

FIG. 9 is a diagram showing stepwise hierarchical encoding according to an embodiment.

FIG. 10 is a diagram showing stepwise hierarchical coding according to an embodiment.

FIG. 11 is a diagram showing, in a stepwise manner, hierarchical coding according to an embodiment.

[Fig. 12] Fig. 12 is a diagram showing stepwise hierarchical encoding according to an embodiment.

FIG. 13 is a diagram showing stepwise hierarchical coding according to an embodiment.

[Fig. 14] Fig. 14 is a diagram showing stepwise hierarchical coding according to an embodiment.

[Fig. 15] Fig. 15 is a diagram showing hierarchical coding stepwise according to an embodiment.

FIG. 16 is a diagram showing, in a stepwise manner, hierarchical coding according to an embodiment.

FIG. 17 is a diagram showing, in stages, hierarchical coding according to an embodiment.

[Fig. 18] Fig. 18 is a diagram showing hierarchical coding in stages according to an embodiment.

[Fig. 19] Fig. 19 is a diagram showing, in stages, hierarchical encoding according to an embodiment.

FIG. 20 is a diagram showing a configuration of a memory map in a conventional facsimile apparatus (transmission side).

FIG. 21 is a diagram showing a configuration of a memory map in a conventional facsimile apparatus (transmission side).

FIG. 22 is a diagram showing a memory map on the receiving side of the facsimile apparatus according to the embodiment.

FIG. 23 is a flowchart showing a control procedure on the transmission side of a conventional facsimile apparatus.

[Explanation of symbols]

 2 CPU 3 ROM 4 RAM 5, 7, 10, 18 Gate array 9 Hierarchical encoding / decoding LSI 14 Modem 15 NCU 16 Sensor 19 Speaker 21 Speaker driving unit 22 Motor driving unit 23 Reading motor 24 Recording motor 33 Line 34 Telephone

Claims (2)

[Claims] 1. An image processing apparatus for encoding an image having a lower resolution than an image having a higher resolution and transmitting the encoded images in order from the image having the lower resolution to the image having the higher resolution, A unit that encodes an image whose transmission order is earlier than the image every time it is transmitted, a unit that converts the resolution of the encoded image having a predetermined resolution, and a unit that converts the resolution-converted image to the predetermined resolution. And a means for storing the image in a storage area of the image. 2. The image after the resolution conversion is overwritten in the storage area even if the image is already stored in the storage area of the image of the predetermined resolution. Image processing device.