JPH0622325A - Picture display device - Google Patents

Abstract

(57) [Summary] [Object] An object of the present invention is to provide an image display device having excellent brightness uniformity at low cost by correcting the brightness at an arbitrary position on the screen. According to the image display device of the present invention, a video signal is converted into RGB.
An AD converter for converting each to a digital video signal, a switch circuit for converting the RGB digital video signal to a serial composite video signal, a frame memory in which brightness nonuniformity of the image display device is recorded in advance, and the frame memory And a flip-flop for returning the corrected composite video signal output from the multiplier to the corrected RGB signal, and the image display using the corrected RGB signal. An image display device characterized by driving a beam flow control electrode of an element.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention generates an electron beam for each section when a screen on a screen is divided into a plurality of sections in the vertical direction, and emits each electron beam in the vertical direction for each section. The present invention relates to an image display device that deflects and displays a plurality of lines to display an image as a whole.

[0002]

2. Description of the Related Art The basic structure of an image display device used in the present invention will be described with reference to FIG.

This display device has a back electrode 1, a line cathode 2 as a beam source, and a beam in this order from the rear to the anode side.
Beam extraction electrode 3, beam flow control electrode 4, focusing electrode 5,
A horizontal deflection electrode 6, a vertical deflection electrode 7, and a screen plate 8 are arranged and configured, and these are housed inside a vacuum container.

A line cathode 2 as a beam source is stretched in the horizontal direction so as to generate an electron beam which is linearly distributed in the horizontal direction, and the line cathodes 2 are further arranged at intervals in the vertical direction. (In this description, only 7 of 2 a to 2 g are shown)
It is provided. In this configuration, the line cathode spacing is 4.4 mm,
Assuming that 19 pieces are provided, the number of the line cathodes is 2 to 2 pieces. The distance between the line cathodes cannot be freely set, and is regulated by the distance between the vertical deflection electrode 7 and the screen 8 which will be described later. As the structure of these wire cathodes 2, an oxide cathode material is applied to the surface of a tungsten rod having a diameter of 10 to 30 μm. As will be described later, the above-mentioned line cathode is controlled so as to sequentially emit an electron beam from the upper line cathode 2a to the lower two line cathodes at regular intervals.

The back electrode 1 not only prevents the generation of electron beams from other line cathodes but also pushes out the electron beams only in the anodic direction. Although the vacuum container is not shown in FIG. 3, it is possible to use the back electrode 1 to form a structure integrated with the vacuum container.

The beam lead-out electrode 3 is a conductive plate 11 having a plurality of through-holes 10 which are arranged in a row in the horizontal direction at regular intervals facing the respective line cathodes 2 to 2 and are emitted from the line cathode 2. The formed electron beam is taken out through the through hole 10.

Next, the beam flow control electrode 4 is connected to the line cathodes 2a to 2b.
A plurality of vertically long conductive plates 15 each having a through hole 14 at a position facing each other are arranged side by side in a horizontal direction at a predetermined interval. 11 in this configuration
Four control electrode conductive plates 15a to 15n are provided (only eight are shown in FIG. 3). The beam flow control electrode 4 synchronizes the passing amount of each electron beam horizontally divided by the beam extraction electrode 3 with the picture element of the video signal and in synchronization with the horizontal deflection timing described later. Let me control.

The focusing electrode 5 is a conductive plate 17 having a through hole 16 at a position facing each through hole 14 provided in the beam flow control electrode 4, and focuses the electron beam.

The horizontal deflection electrode 6 is composed of a plurality of conductive plates 18 and 18 'vertically arranged along both sides of the through hole 16 in the horizontal direction. The deflection voltage is applied. The electron beam for each picture element is deflected in the horizontal direction, and the R, G, and B phosphors are sequentially irradiated on the screen 8 to emit light. In this configuration, each electron beam is deflected by 2 trio.

The vertical deflection electrode 7 is composed of a plurality of conductive plates 19 and 19 'horizontally arranged at intermediate positions in the vertical direction of the through hole 16, and a vertical deflection voltage is applied to the vertical deflection electrode 7. The electron beam is vertically deflected.
In this structure, the electron beam generated from one line cathode is vertically deflected by 12 lines by the pair of electrodes 19 and 19 '. And a vertical deflection electrode 7 composed of 20 pieces
Thus, 19 pairs of vertical deflection conductors corresponding to 19 line cathodes are formed, and 228 horizontal scanning lines are drawn in the vertical direction on the screen 8.

As described above, in this structure, a plurality of horizontal deflection electrodes 6 and vertical deflection electrodes 7 are arranged in a comb shape. Further, by setting the distance to the screen 8 longer than the distance between the horizontal and vertical deflection electrodes, it becomes possible to irradiate the screen 8 with the electron beam with a small deflection amount. As a result, horizontal and vertical co-deflection distortion can be reduced.

As shown in FIG. 3, the screen 8 is constructed by coating the back surface of the glass plate 21 with the phosphor 20 in a stripe shape. Also, although not shown, a metal back, a car
Bon is also applied. The phosphor 20 deflects the electron beam passing through one through hole 14 of the beam flow control electrode 4 in the horizontal direction to form two phosphor pairs of three colors of R, G and B.
It is provided to irradiate the amount of trio, and is applied in stripes in the vertical direction.

In FIG. 3, the broken lines drawn on the screen 8 indicate vertical divisions corresponding to the plurality of line cathodes 2, and the two-dot chain line indicates the plurality of beam flow control electrodes 4. The horizontal divisions displayed corresponding to each of the above are shown. FIG. 4 shows an enlarged view of one section divided by a broken line and a two-dot chain line.

As shown in FIG. 4, two trio R, G, and B phosphors in the horizontal direction and a width of 12 lines in the vertical direction are provided. In this example, the size of one section (one unit) is 1 mm in the horizontal direction and 4.4 mm in the vertical direction. Incidentally, FIG.
Although the phosphors of three colors R, G, and B are illustrated in a stripe shape, they may be arranged in a delta shape. However, when they are arranged in a delta shape, it is necessary to apply horizontal deflection and vertical deflection waveforms suitable for them.

Further, in FIG. 4, for the sake of explanation, the dimensional ratio in the vertical and horizontal directions is different from the image displayed on the actual screen. Further, in this configuration, R, G, and B phosphors for two trios are provided for one through hole 14 of the beam flow control electrode 4, but one trio or three trios or more is used. Is also good. However, the R, G, and B video signals of 1 trio or 3 trios or more are sequentially applied to the beam flow control electrode 4, and it is necessary to perform horizontal deflection in synchronization therewith.

As described above, the image display element used in the present invention is a minute image display unit (1 mm in the above example).
(x4 mm) are arranged in a vertical and horizontal direction to display one image as a whole. Therefore, in order to obtain a uniform image quality, the display characteristics of each image display unit are uniform, and It is necessary that there is no distortion of the beam in the display unit, and that the image display units themselves are arranged correctly. Distortion of the beam in the image display unit, variations in characteristics between image display units, and image display unit The occurrence of array disorder and the like both visually appear as a difference in brightness, which causes a strong point at the boundary of the image display unit and significantly deteriorates the uniformity of image quality.

In order to solve the above problems, the applicant of the present invention has previously found that the brightness on the screen is improved even if the beam distortion in the image display unit, the characteristic variation among the image display units, the arrangement disorder of the image display units and the like occur. Compensate for changes and make them uniform,
An image display device that does not impair the uniformity of image quality is proposed. The image display device has a frame memory in which the brightness nonuniformity of the image display element is recorded in advance, and a correction circuit for correcting the video signal itself so as to cancel the brightness nonuniformity.

The image display device described above will be described below.
A description will be given with reference to the drawings. FIG. 2 is a block diagram of a video signal correction circuit of the image display device according to the embodiment of the present invention. 51a to 51c are A / D converters for converting analog video signals into digital signals, and 52a to 52.
Reference numeral c is a multiplier as a correction circuit for correcting the video signal, 53 is a frame memory in which the information of the luminance distribution of the image display element is recorded, and 54 is an address generation circuit for controlling the frame memory 53.

The information on the luminance distribution recorded in the frame memory 53 is obtained as follows. First, a video signal having a certain size is input to the image display element. At this time, if each of the image display units constituting the image display element has completely the same characteristics, there is no distortion of the beam, and if each image display unit is arranged at exactly equal intervals, the entire screen is displayed. Although a uniform luminance distribution can be obtained, if there are variations among the image display units, beam deflection distortion, aberrations, and disorder of the image display unit arrangement, a non-uniform luminance portion occurs. The luminance distribution at this time is measured, and the data corresponding to the negative of the luminance distribution (the bright portion is small and the dark portion is large) is recorded in the frame memory. At this time, if the video signal having a certain magnitude is corrected by the data recorded in the frame memory 53 and input to the image display element, the uneven brightness of the image display element itself is canceled and the entire screen is canceled. Therefore, a uniform brightness distribution can be obtained.

Next, it will be explained that the modulation circuit can be realized by a multiplier. The image display device used in the present invention,
Since the pulse width modulation (hereinafter referred to as PWM) driving is performed, the input video signal and the luminance output are in proportion to each other. In FIG. 5, when the input video signal is a, the average brightness of the screen is La, and the uneven brightness occurs.
Suppose it has become Lb. At this time, in order to make the luminance uniform at the point where the luminance nonuniformity occurs, it is necessary to correct the input to b.

At this time, since La / Lb = b / a = constant, the correction amount is constant regardless of the size of the input video signal. That is, the correction means 52 may be a simple multiplier.

The address generating circuit 54 is synchronized with the horizontal synchronizing signal h and the vertical synchronizing signal v so that the data on the frame scale and the image display element always correspond one to one.

When the video signal is corrected by the data recorded in the frame memory by the circuit described above and input to the image display device, the uneven brightness of the image display device itself is canceled and the entire screen is made uniform. A luminance distribution will be obtained.

[0024]

However, the above-mentioned structure has a problem that the cost is high because three expensive multipliers must be used.

[0025]

In order to solve the above-mentioned problems, an image display device of the present invention comprises an AD converter for converting a video signal into a digital video signal for each of RGB, and the above-mentioned RGB.
A switch circuit for converting a digital video signal into a serial composite video signal, a frame memory in which the brightness nonuniformity of the image display element is recorded in advance, and a correction signal output from the frame memory and the serial composite video signal are multiplied. It is characterized by having a multiplier and a flip-flop for returning the corrected composite video signal output from the multiplier to the corrected RGB signal.

[0026]

According to the present invention, even if the distortion of the beam in the image display unit, the characteristic variation among the image display units, the disorder of the arrangement of the image display units, etc. occur, the luminance change on the screen is corrected and equalized. An image display device that does not impair image quality uniformity can be obtained at low cost, low power consumption, and small scale.

[0027]

First Embodiment An image display device according to a first embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram of a video signal correction circuit of an image display device according to an embodiment of the present invention. In the figure, CKR, CKG, and CKB are three-phase clocks that AD-convert the video signals RGB, respectively.

Reference numerals 51a to 51c are AD converters for converting an analog video signal into a digital video signal, 53 is a frame memory in which information on the luminance distribution of the image display device is recorded, and 54 is a frame memory for controlling the frame memory 53. Address generating circuit, 55 is the AD converters 51a-5
1a is a switch circuit for converting the digital video signal output to a serial composite video signal, 52 is a multiplier for multiplying the correction signal output from the frame memory by the serial composite video signal, and 56a to 56c are the multipliers. It is a flip-flop that returns the corrected composite video signal output by 52 to the corrected RGB signal.

The information on the luminance distribution recorded in the frame memory 53 is obtained as follows. First, a video signal having a certain size is input to the image display element. At this time, if each of the image display units constituting the image display element has completely the same characteristics, there is no distortion of the beam, and if each image display unit is arranged at exactly equal intervals, the entire screen is displayed. Although a uniform brightness distribution can be obtained, if there is a deflection distortion or aberration of a beam that is dispersed among image display units, or an image display unit array is disturbed, an uneven brightness portion is generated. The brightness distribution at this time is measured, and the data corresponding to the negative of the brightness distribution (the bright part is small, the dark part is large) is recorded in the frame memory 53.

At this time, if the video signal having a certain magnitude is corrected by the data recorded in the frame memory 53 and input to the image display element, the uneven brightness of the image display element itself is canceled. As a result, a uniform brightness distribution can be obtained on the entire screen.

Although the above correction can be realized by a multiplier as in the conventional example, a high-speed multiplier is expensive, has a large power, and has a large circuit scale.

The image evaluation apparatus of the present invention is characterized by being thin and compact, and the use of three multipliers means that the above three
It is a big disadvantage for the reason. Compared with this, flip-flops and switch circuits are commonly used in T
TL can be used, and it is inexpensive, has low power consumption, and has a small scale. Therefore, according to the present invention, the number of multipliers can be one,
It is possible to realize an image evaluation device that maximizes thinness and compactness.

[0034]

According to the present invention, even if the distortion of the beam in the image display unit, the characteristic variation among the image display units, the disorder of the arrangement of the image display units, etc. occur, the brightness change on the screen is corrected. An image display device that is uniform and does not impair image quality uniformity can be obtained at low cost, low power consumption, and small scale.

[Brief description of drawings]

FIG. 1 is a block diagram of a correction circuit used in an image display device according to an embodiment of the present invention.

FIG. 2 is a block diagram of a correction circuit used in a conventional image display device.

FIG. 3 is an exploded perspective view of an image display element in a conventional example.

FIG. 4 is an enlarged view of a phosphor screen of the image display device.

FIG. 5 is an explanatory diagram showing that the correction circuit can be realized by a multiplier.

[Explanation of symbols]

 51a to 51c AD converters 52a to 52c, 52 multiplier 53 frame memory 54 address generation circuit 55 switch circuit 56a to 56c flip-flop

Claims (1)

[Claims] 1. A line cathode as a beam source, a back electrode and a beam extraction electrode for controlling the total amount of electron beam, a beam flow control electrode for controlling the flow rate of the electron beam, and the electron beam is deflected in the horizontal direction. An image display device having a horizontal deflection electrode, a vertical deflection electrode for vertically deflecting the electron beam, and a screen on which the electron beam collides is used to convert the video signal and the video signal into RGB digital video signals. AD converter and the RG
B A switch circuit for converting a digital video signal into a serial composite video signal, a frame memory in which the brightness nonuniformity of the image display device is recorded in advance, and a correction signal output from the frame memory and the serial composite video signal are multiplied. And a flip-flop for returning the corrected composite video signal output from the multiplier to a corrected RGB signal, and driving the beam flow control electrode of the image display element using the corrected RGB signal. Image display device.