JPH06230866A - Interface circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide an interface circuit with low current consumption. Arrangement: An OR gate 4E and a control circuit 5 for applying a high level voltage to the output terminal of a 3-state buffer 4B on the device 2 side when the device 2 is not selected.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an interface circuit provided between a common data bus and a device (for example, an IC memory card).

[0002]

2. Description of the Related Art As shown in FIG. 4, an interface circuit 3 for bidirectionally exchanging data between a common data bus 1 and a device (for example, an IC memory card) 2 is used. The interface circuit 3 includes a pair of 3-state buffers 4A and 4B having an output enable function.
And a pair of buffers 4C and 4D, and the bidirectional buffer 4 and the device 2 between the output end of the bidirectional buffer 4 on the device side and the power supply V _DD supplied to the device 2. It comprises a pull-up resistor R _PU provided to match the output impedance 2. Since the other device connected to the common data bus 1 is not affected when the device 2 is not selected, the common data of the bidirectional buffer 4 is controlled by the control signal to the control terminal of the 3-state buffer 4A of the interface circuit 3. The output end on the bus side has high impedance.

[0003]

However, in the above-mentioned conventional interface circuit, since the 3-state buffer 4B on the device side of the interface circuit 3 holds the output enable state, it is common when the device 2 is not selected. When the data on the data bus 1 has a low level voltage, the output end of the bidirectional buffer 4 on the device side outputs a low level voltage. Further, when the common data bus 1 is _pulled down by the pull-down resistor R _DN as shown in FIG. 4, if there is no data on the common data bus 1, the bus 1 is always at a low level voltage, and the bidirectional buffer 4 The output end on the device side outputs a low level voltage.

Therefore, at this time, there is a problem that a current flows from the power source V _DD through the pull-up resistor R _PU to the bidirectional buffer 4 and the current consumption thereof increases.

Therefore, an object of the present invention is to provide an interface circuit which solves the above problems.

[0006]

In order to achieve the above object, the present invention is provided between a common data bus and a device, and has a pull-up means at an output end of the device, the common data bus and the device. An interface circuit for bidirectionally exchanging data with a device, comprising means for outputting a high level voltage or a high impedance to an output end of the device when the device is not selected. And

[0007]

According to the present invention, the current flowing through the pull-up means is suppressed when the device is not selected, and the increase in current consumption is suppressed.

[0008]

Embodiments of the present invention will now be described in detail with reference to the drawings.

FIG. 1 shows a first embodiment of the present invention. In the present embodiment, the OR gate 4E is provided in the bidirectional buffer 4.
The output terminal of the buffer 4C is connected to one input terminal of the gate 4E, the control signal composed of the high level voltage or the low level voltage from the control circuit 5 is input to the other input terminal, and the output terminal is The input end of the state buffer 4B is connected. A control signal is input from the control circuit 5 to the control terminal of the 3-state buffer 4A. When the device 2 is not selected based on the control signal, the control circuit 5
The 3-state buffer 4A on the common data bus 1 side is controlled to make its output end high impedance, and a high level voltage is applied to the OR gate 4E to set the 3-state buffer 4A on the device 2 side.
The output terminal of the state buffer 4B is set to a high level voltage. As a result, the voltage difference across the pull-up resistor R _PU becomes smaller, and the current flowing through the resistor R _PU becomes smaller.
That is, current consumption is reduced. When the device 2 is selected, the control circuit 5 sets the 3-state buffer 4A to the output enable state based on the control signal and applies the low level voltage to the OR gate 4E.

FIG. 2 shows a second embodiment of the present invention. In this embodiment, the control signal from the control circuit 5 is input to the control terminals of the two 3-state buffers 4A and 4B in the bidirectional buffer 4. When the device 2 is not selected on the basis of the control signal, the control circuit 5 controls the 3-state buffer 4A on the common data bus 1 side to make its output end high impedance and also to set the 3-state buffer on the device 2 side. The buffer 4B is controlled to make its output end high impedance. As a result, the pull-up resistor R _PU
The voltage difference between both ends of the resistor becomes small, and the current flowing through the resistor R _PU becomes small. When the device 2 is selected, the control circuit 5 sets the two 3-state buffers 4A and 4B to the output enable state based on the control signal.

FIG. 3 shows a third embodiment of the present invention. This embodiment is a combination of the first embodiment and the second embodiment. An OR gate 4E is provided in the bidirectional buffer 4, and the output end of the buffer 4C is connected to one input end of the gate 4E. Then, the control signal composed of the high-level voltage or the low-level voltage from the control circuit 5 is input to the other input terminal, the input terminal of the 3-state buffer 4B is connected to the output terminal, and the two 3-state buffers 4A, The control signal from the control circuit 5 is input to the control terminal of 4B. Even with such a configuration, when the device 2 is not selected, as in the first and second embodiments, the device 2 side 3
The output terminal of the state buffer 4B can be set to a high level voltage or high impedance, and the current flowing through the pull-up resistor R _PU is reduced.

[0012]

As described above, according to the present invention, the current consumption can be suppressed to a low level. For example, a battery-driven IC
An interface circuit suitable for a device such as a memory card can be provided.

[Brief description of drawings]

FIG. 1 is a block diagram of a first embodiment of the present invention.

FIG. 2 is a block diagram of a second embodiment of the present invention.

FIG. 3 is a block diagram of a third embodiment of the present invention.

FIG. 4 is a block diagram of a conventional example.

[Explanation of symbols]

 1 common data bus 2 device 3 interface circuit 4 bidirectional buffer 4A, 4B 3 state buffer 4C, 4D buffer 4E OR gate 5 control circuit

Claims (2)

[Claims] 1. An interface circuit provided between a common data bus and a device, having a pull-up means at an output end on the device side, and bidirectionally exchanging data between the common data bus and the device. An interface circuit comprising means for outputting a high level voltage or a high impedance to the output end on the side of the device when the device is not selected. 2. The interface circuit according to claim 1, wherein the device is an IC memory card.