JPH06252429A - Solar cell element, and solar cell and manufacture thereof - Google Patents
Solar cell element, and solar cell and manufacture thereofInfo
- Publication number
- JPH06252429A JPH06252429A JP5032149A JP3214993A JPH06252429A JP H06252429 A JPH06252429 A JP H06252429A JP 5032149 A JP5032149 A JP 5032149A JP 3214993 A JP3214993 A JP 3214993A JP H06252429 A JPH06252429 A JP H06252429A
- Authority
- JP
- Japan
- Prior art keywords
- solar cell
- silicon semiconductor
- type silicon
- conductive
- thin wire
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/545—Microcrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/546—Polycrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/547—Monocrystalline silicon PV cells
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E10/00—Energy generation through renewable energy sources
- Y02E10/50—Photovoltaic [PV] energy
- Y02E10/548—Amorphous silicon PV cells
Landscapes
- Photovoltaic Devices (AREA)
Abstract
(57)【要約】 (修正有)
【目的】 低コストの太陽電池素子、セルおよびその製
造方法を提供する。
【構成】 太陽電池素子12は、導電性細線7の周囲に
被覆されたpまたはn型のシリコン半導体8の全表面ま
たは一部の表面をそれぞれnまたはp型のシリコン半導
体9とし、両半導体間にpn接合面10を形成し、該n
またはp型のシリコン半導体9に接続した金属電極11
をもつ。太陽電池セル16は、前記太陽電池素子12の
nまたはp型のシリコン半導体9が導電性基板13に接
触して平行に並ぶ。太陽電池セル16の製造方法は、導
電性細線7の周囲にpまたはn型のシリコン半導体8を
被覆し、これを複数本平行にそれぞれV族または III族
不純物を含む導電性材料を被覆した導電性基板13上に
並べ熱処理する。
(57) [Summary] (Modified) [Objective] To provide a low-cost solar cell element, cell, and manufacturing method thereof. [Construction] In the solar cell element 12, the entire surface or a part of the surface of a p- or n-type silicon semiconductor 8 coated around the conductive thin wire 7 is an n- or p-type silicon semiconductor 9, respectively, A pn junction surface 10 is formed on the
Alternatively, a metal electrode 11 connected to the p-type silicon semiconductor 9
With. In the solar cell 16, the n-type or p-type silicon semiconductor 9 of the solar cell element 12 contacts the conductive substrate 13 and is arranged in parallel. The solar cell 16 is manufactured by a method in which a conductive thin wire 7 is coated with a p- or n-type silicon semiconductor 8 in parallel, and a plurality of these are coated in parallel with a conductive material containing a group V or group III impurity. It is arranged on the flexible substrate 13 and heat-treated.
Description
【0001】[0001]
【産業上の利用分野】本発明は、シリコン半導体のpn
接合よりなる太陽電池素子および太陽電池セルおよびこ
の製造方法の改良に関するものである。BACKGROUND OF THE INVENTION The present invention relates to a silicon semiconductor pn.
The present invention relates to a solar cell element having a junction, a solar cell, and an improvement in the manufacturing method.
【0002】[0002]
【従来の技術】石油資源の将来の枯渇あるいは地球温暖
化など環境問題を背景に、太陽エネルギーによる発電手
段の一つとして太陽光発電、すなわち太陽電池セルによ
る発電が注目され、中でも半導体材料を用いる太陽電池
セルはその有効な手段として、これまでも各国でその材
料、構成および製造方法について精力的な開発が進めら
れてきたが、現在の商用電力の価格に比べて太陽電池発
電システムによる電力が高価格であることが実用化の最
大の障壁になっており、これの解決のためには低コスト
の太陽電池素子およびセルの開発が不可欠である。2. Description of the Related Art With the background of environmental problems such as depletion of petroleum resources and global warming, photovoltaic power generation, that is, power generation by solar cells has attracted attention as one of power generation means by solar energy, and in particular semiconductor materials are used As an effective means, solar cells have been vigorously developed in various countries in terms of materials, configurations, and manufacturing methods.However, compared with the current price of commercial power, the power generated by the solar cell power generation system High price is the biggest barrier to practical use, and development of low-cost solar cell elements and cells is indispensable for solving this.
【0003】従来の太陽電池素子は、例えば図3に示す
ように、p型のシリコン半導体板1にn型の不純物を拡
散させ、pn接合面2を挟んでn型のシリコン半導体層
3を形成したもので、太陽光線4を照射すると、p型の
シリコン半導体板1に設けた電極5よりn型のシリコン
半導体層3に設けた電極6に向かう起電力を発生し、太
陽エネルギーを直接電気エネルギーに変換することがで
きる。In a conventional solar cell element, for example, as shown in FIG. 3, n-type impurities are diffused in a p-type silicon semiconductor plate 1 to form an n-type silicon semiconductor layer 3 with a pn junction surface 2 sandwiched therebetween. When the solar light 4 is irradiated, an electromotive force is generated from the electrode 5 provided on the p-type silicon semiconductor plate 1 toward the electrode 6 provided on the n-type silicon semiconductor layer 3, and the solar energy is directly converted into electrical energy. Can be converted to.
【0004】[0004]
【発明が解決しようとする課題】しかしながら、シリコ
ン半導体板1はシリコン棒をスライスして得るが、シリ
コン単結晶棒は製造コストが高く、多結晶棒は製造コス
トは低いがいずれもスライス、研磨の際のロスが多いた
め結果としてシリコン半導体板のコストは高くなる。ア
モルファスシリコンを利用する場合は、薄膜であるから
材料コストは低いが、設備コストが高く、耐久性にも問
題がある。However, although the silicon semiconductor plate 1 is obtained by slicing a silicon rod, the silicon single crystal rod has a high manufacturing cost, and the polycrystalline rod has a low manufacturing cost, but both are sliced and polished. As a result, the cost of the silicon semiconductor plate is increased due to the large loss. When amorphous silicon is used, the material cost is low because it is a thin film, but the equipment cost is high and the durability is also problematic.
【0005】[0005]
【課題を解決するための手段】本発明は、従来に比べエ
ネルギー変換効率が高く、大幅にコストの低減が可能な
新しい太陽電池素子及びセルを提供するもので、第1の
発明は、導電性細線の周囲にシリコン半導体を被覆し、
該細線を一方の電極として使用し、pn接合またはショ
ットキー形のエネルギー障壁を挟んで、他の電極を接触
させたことを特徴とする太陽電池素子、第2の発明は、
第1の発明に記載の太陽電池素子の前記nまたはp型の
シリコン半導体が導電性基板に接触して平行に並んでい
ることを特徴とする太陽電池セル、第3の発明は、導電
性細線の周囲にpまたはn型のシリコン半導体を被覆
し、これを複数本平行にそれぞれV族または III族不純
物を含む合金を被覆した基板上に並べ、熱処理すること
を特徴とする太陽電池セルの製造方法を要旨とする。DISCLOSURE OF THE INVENTION The present invention provides a new solar cell element and cell which have higher energy conversion efficiency than conventional ones and can be significantly reduced in cost. A silicon semiconductor is coated around the thin wire,
A solar cell element, characterized in that the thin wire is used as one electrode, and another electrode is brought into contact with the pn junction or a Schottky type energy barrier interposed therebetween, the second invention is
The solar cell according to the first invention is characterized in that the n-type or p-type silicon semiconductors are arranged in parallel in contact with a conductive substrate, and the third invention is a conductive thin wire. A solar cell characterized by coating a p- or n-type silicon semiconductor around a substrate, arranging the silicon semiconductor in parallel on a substrate coated with an alloy containing a group V or group III impurity, and heat-treating the substrate. The method is the gist.
【0006】以下図によって本発明の一実施態様を説明
する。図1(a)において、導電性細線7の周囲にCV
Dによりn型シリコン半導体8を被覆した後、表面から
III族不純物を拡散して、n型シリコン半導体8の全表
面を導電性細線7に至る手前の一定の深さまでp型シリ
コン半導体9とすると、両半導体8、9間にpn接合面
10が形成される。このp型シリコン半導体9に金属電
極11を接続させて太陽電池素子12が得られる。この
素子12に太陽光線4を照射すると、金属電極11より
導電性細線7に向かう起電力を生じ、太陽エネルギーを
直接電気エネルギーに変換することがてきる。またシリ
コン半導体は結晶質、非結晶質いずれでもよい。被覆す
る半導体シリコンの厚さは0.1〜1000μmが適当
である。An embodiment of the present invention will be described below with reference to the drawings. In FIG. 1 (a), a CV is formed around the conductive thin wire 7.
After coating the n-type silicon semiconductor 8 with D, from the surface
If the group III impurities are diffused to make the entire surface of the n-type silicon semiconductor 8 a p-type silicon semiconductor 9 to a certain depth before reaching the conductive thin line 7, a pn junction surface 10 is formed between the semiconductors 8 and 9. To be done. The solar cell element 12 is obtained by connecting the metal electrode 11 to the p-type silicon semiconductor 9. When the element 12 is irradiated with the solar rays 4, an electromotive force is generated from the metal electrode 11 toward the conductive thin wire 7, and the solar energy can be directly converted into electric energy. The silicon semiconductor may be either crystalline or amorphous. A suitable thickness of the semiconductor silicon to be coated is 0.1 to 1000 μm.
【0007】つぎに図1(b),(c)に示すように、
前記太陽電池素子12を導電性基板13上に複数本平行
にオーミック接触させて並べ、各太陽電池素子12の導
電性細線7を一括して出力端子14に接続し、導電性基
板13に接続して出力端子15を設けると太陽電池セル
16が得られる。これに太陽光線4を照射すると出力端
子15より出力端子14に向かう起電力を生じる。Next, as shown in FIGS. 1 (b) and 1 (c),
A plurality of the solar cell elements 12 are arranged in parallel on the conductive substrate 13 in ohmic contact, and the conductive thin wires 7 of each solar cell element 12 are collectively connected to the output terminal 14 and connected to the conductive substrate 13. When the output terminal 15 is provided as a result, the solar battery cell 16 is obtained. When this is irradiated with the sunlight 4, an electromotive force is generated from the output terminal 15 toward the output terminal 14.
【0008】太陽電池セルの製造方法の他の実施態様を
挙げると、図1(d)に示すように、導電性細線7の周
囲にn型シリコン半導体8を被覆し、これをアルミニウ
ム21を被覆したガラス基板13上に複数本平行に並
べ、全体を炉中で熱処理すると、基板13上のアルミニ
ウムがn型シリコン半導体8の中に拡散してp型シリコ
ン半導体17を生じ、両半導体の境界にpn接合面10
を形成し、n型シリコン半導体8の一部の表面をp型シ
リコン半導体17とした太陽電池セル18が作られる。
ただしこのときp型シリコン半導体17は導電性細線7
に達しない深さとする。As another embodiment of the method for manufacturing a solar battery cell, as shown in FIG. 1D, an n-type silicon semiconductor 8 is coated around the conductive thin wire 7, and this is coated with aluminum 21. When a plurality of glass substrates 13 are arranged in parallel on each other and heat-treated in a furnace, the aluminum on the substrate 13 diffuses into the n-type silicon semiconductor 8 to form a p-type silicon semiconductor 17, and the p-type silicon semiconductor 17 is formed at the boundary between the two semiconductors. pn junction surface 10
Is formed, and a solar battery cell 18 in which a part of the surface of the n-type silicon semiconductor 8 is used as the p-type silicon semiconductor 17 is manufactured.
However, at this time, the p-type silicon semiconductor 17 is the conductive thin wire 7
The depth is not reached.
【0009】導電性細線は直径が5〜500μmで、シ
リコン半導体の被覆、熱処理に際し障害を起こさない金
属であればよく、例えばCu,Al,Ag,Ti,W,
Mo,Ta等の中のいずれかまたはこれらの1つ以上を
含んだ合金が適している。The conductive thin wire may have a diameter of 5 to 500 μm and may be a metal that does not cause any trouble during the coating and heat treatment of the silicon semiconductor, such as Cu, Al, Ag, Ti, W,
Any of Mo, Ta, etc., or alloys containing one or more of these are suitable.
【0010】導電性基板は13は、アルミニウム、銅、
鉄、金、銀のいずれかまたはこれらの1つ以上を含んだ
合金よりなるが、pまたはn型シリコン半導体8に逆導
電性を付与する金属よりなる導電性被膜をガラス、樹
脂、セラミックス等の絶縁板の表面にスクリーン印刷あ
るいは蒸着、スパッタリング、CVD等によって膜状に
形成したものでもよい。導電性被膜を形成する金属は、
アルミニウム、銅、鉄、金または銀のいずれかまたはこ
れらの1つ以上を含んだ合金よりなるものでよい。The conductive substrate 13 is made of aluminum, copper,
A conductive coating made of a metal that imparts reverse conductivity to the p-type or n-type silicon semiconductor 8 is formed of glass, resin, ceramics, or the like, which is made of iron, gold, silver, or an alloy containing one or more of these. It may be a film formed on the surface of the insulating plate by screen printing, vapor deposition, sputtering, CVD or the like. The metal forming the conductive coating is
It may consist of aluminum, copper, iron, gold or silver or an alloy containing one or more of these.
【0011】導電性細線7の周囲にpまたはn型のシリ
コン半導体8を形成するには、例えば図2に示すよう
に、導電性細線7を反応室19の中を通し、CVD法に
よりp型またはn型のシリコン半導体の層8を形成し、
反応室19を出たところでレーザー、または高周波加熱
して溶融結晶化し、ドラム20に長尺状に巻き取れば連
続して製造することができる。また導電性細線をp型あ
るいはn型のシリコン半導体融液に浸して引き出すこと
によってシリコン層を被覆することができる。これを一
定長さに切断して使用すれば、シリコン半導体の材料ロ
スをほとんど生ずることなく太陽電池セルを製造するこ
とができる。In order to form a p-type or n-type silicon semiconductor 8 around the conductive thin wire 7, the conductive thin wire 7 is passed through a reaction chamber 19 as shown in FIG. Or forming a layer 8 of n-type silicon semiconductor,
When it exits the reaction chamber 19, it is melted and crystallized by heating with a laser or high frequency, and wound on a drum 20 in a long shape, so that continuous production is possible. Further, the silicon layer can be coated by immersing the conductive thin wire in the p-type or n-type silicon semiconductor melt and pulling it out. If this is cut into a certain length and used, a solar cell can be manufactured with almost no material loss of the silicon semiconductor.
【0012】またp型シリコン半導体−接合面−n型シ
リコン半導体の構造を作るには、導電性細線のまわりに
形成したp型またはn型シリコン半導体に逆導電性を与
える不純物を塗布するか、気相拡散によって逆導電層を
形成すれば、図1(c)に示すように、p,n型シリコ
ン半導体およびpn接合面を同心円状に形成することが
できる。さらに太陽電池セルの上に反射防止材をコーテ
ィングし、その上に保護のため有機材料をコーティング
したりガラス板で覆うことも可能である。To form a p-type silicon semiconductor-junction surface-n-type silicon semiconductor structure, an impurity imparting reverse conductivity is applied to the p-type or n-type silicon semiconductor formed around the conductive thin wire, or If the reverse conductive layer is formed by vapor phase diffusion, as shown in FIG. 1C, the p, n-type silicon semiconductor and the pn junction surface can be formed concentrically. Further, it is also possible to coat the solar cell with an antireflection material and then coat it with an organic material or cover it with a glass plate.
【0013】[0013]
【作用】本発明の太陽電池セルに太陽光線を照射すれ
ば、図1(d)に示すように、表面から太陽光線の一部
が反射されても、隣接の太陽電池素子に吸収されるので
変換効率が良く、また太陽電池素子をなるべく太陽の子
午線方向に一致させて南北方向に配置すれば、特に太陽
光線を追尾しなくても常に効率良く電気エネルギーが取
り出される。When the solar cell of the present invention is irradiated with sunlight, as shown in FIG. 1 (d), even if a part of the sunlight is reflected from the surface, it is absorbed by the adjacent solar cell element. The conversion efficiency is good, and if the solar cell elements are arranged in the north-south direction so as to coincide with the meridian direction of the sun as much as possible, electric energy can always be efficiently extracted without particularly tracking the sun's rays.
【0014】[0014]
【実施例】長さ150mm、直径500μmのモリブデ
ン線をシリコン半導体融液に浸し、毎分5cmの速さで
引き上げて導電性細線の周囲に厚さ100μmのp型シ
リコン半導体層を形成した。ついでPOCl3 の気相拡
散法によってp型シリコン半導体の表面にn+層を形成
させた後、20mm毎に切断し、一方の端部を加工して
モリブデン線を3mm露出させた。これを、ガラス板上
に15mm角に印刷された銀ペースト上に15本平行に
配列し、荷重をかけながら焼成して太陽電池セルを製作
した。露出させたモリブデン線を一括して接続した出力
端子と焼成された銀ペーストに接続した出力端子より変
換された電気エネルギーを取り出したが、変換効率は1
0.2%であった。EXAMPLE A molybdenum wire having a length of 150 mm and a diameter of 500 μm was dipped in a silicon semiconductor melt and pulled up at a rate of 5 cm / min to form a p-type silicon semiconductor layer having a thickness of 100 μm around a conductive thin wire. Then, an n + layer was formed on the surface of the p-type silicon semiconductor by the vapor phase diffusion method of POCl 3 , and then cut into 20 mm intervals, and one end was processed to expose the molybdenum wire to 3 mm. Fifteen of these were arranged in parallel on a silver paste printed in a 15 mm square on a glass plate and fired while applying a load to produce a solar battery cell. The converted electric energy was taken out from the output terminal connected to the exposed molybdenum wires all at once and the output terminal connected to the baked silver paste, but the conversion efficiency was 1
It was 0.2%.
【0015】[0015]
【発明の効果】本発明の太陽電池セルを構成する太陽電
池素子は、太陽光線の光学的収集性能がきわめて高く、
またこれを南北方向に配置すれば高い収集性能が得られ
るので、本発明によりエネルギー変換効率の高い太陽電
池セルを安価に提供することができる。INDUSTRIAL APPLICABILITY The solar cell element that constitutes the solar cell of the present invention has an extremely high optical collecting performance of solar rays,
Further, if they are arranged in the north-south direction, high collection performance can be obtained, so that the present invention can provide a solar cell having high energy conversion efficiency at a low cost.
【図1】(a)は本発明の太陽電池素子の斜視図、
(b)は本発明の太陽電池セルの平面図、(c)及び
(d)は本発明の製造方法により得られる太陽電池セル
の部分拡大側面図である。FIG. 1A is a perspective view of a solar cell element of the present invention,
(B) is a plan view of the solar cell of the present invention, and (c) and (d) are partially enlarged side views of the solar cell obtained by the manufacturing method of the present invention.
【図2】本発明の太陽電池セルに用いる線状の太陽電池
素子の一製造方法の説明図である。FIG. 2 is an explanatory diagram of a method for manufacturing a linear solar cell element used in the solar cell of the present invention.
【図3】従来の太陽電池素子の説明用断面図である。FIG. 3 is a sectional view for explaining a conventional solar cell element.
1…p型のシリコン半導体板 14、15…出力端
子 2…pn接合面 16…太陽電池セル 3…n型のシリコン半導体層 17…p型のシリコ
ン半導体 4…太陽光線 18…太陽電池セル 5、6…電極 19…反応室 7…導電性細線 20…ドラム 8…n型シリコン半導体 21…導電性被膜 9…p型シリコン半導体 10…pn接合面 11…金属電極 12…太陽電池素子 13…導電性基板DESCRIPTION OF SYMBOLS 1 ... P-type silicon semiconductor plate 14, 15 ... Output terminal 2 ... pn junction surface 16 ... Solar cell 3 ... N-type silicon semiconductor layer 17 ... P-type silicon semiconductor 4 ... Solar ray 18 ... Solar cell 5, 6 ... Electrode 19 ... Reaction chamber 7 ... Conductive wire 20 ... Drum 8 ... N-type silicon semiconductor 21 ... Conductive film 9 ... P-type silicon semiconductor 10 ... Pn junction surface 11 ... Metal electrode 12 ... Solar cell element 13 ... Conductivity substrate
───────────────────────────────────────────────────── フロントページの続き (72)発明者 平沢 照彦 神奈川県川崎市高津区坂戸3丁目2番1号 信越化学工業株式会社コーポレートリサ ーチセンター内 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Teruhiko Hirasawa 3-2-1 Sakado, Takatsu-ku, Kawasaki-shi, Kanagawa Shin-Etsu Chemical Co., Ltd. Corporate Research Center
Claims (11)
該細線を一方の電極として使用し、pn接合を挟んで、
他の電極を接続させたことを特徴とする太陽電池素子。1. A silicon is coated around a conductive thin wire,
Using the thin wire as one electrode, sandwiching the pn junction,
A solar cell element having another electrode connected thereto.
る請求項1に記載の太陽電池素子。2. The solar cell element according to claim 1, wherein the conductive thin wire has a diameter of 5 to 500 μm.
に記載の太陽電池素子。3. The silicon semiconductor is crystalline.
The solar cell element described in 1.
に記載の太陽電池素子。4. The silicon semiconductor is amorphous.
The solar cell element described in 1.
タン、タングステン、モリブデン、タリウムの中のいず
れかまたはこれらの1つ以上を含んだ合金よりなる請求
項1に記載の太陽電池素子。5. The solar cell element according to claim 1, wherein the conductive thin wire is made of any one of copper, aluminum, silver, titanium, tungsten, molybdenum, and thallium, or an alloy containing one or more thereof.
基板に接触して平行に並んでいることを特徴とする太陽
電池セル。6. A solar battery cell in which the solar battery elements according to claim 1 are arranged in parallel in contact with a conductive substrate.
金、銀のいずれかまたはこれらの1つ以上を含んだ合金
よりなる請求項6に記載の太陽電池セル。7. The conductive substrate is aluminum, copper, iron,
The solar cell according to claim 6, which is made of one of gold and silver or an alloy containing one or more of these.
けたものである請求項6に記載の太陽電池セル。8. The solar cell according to claim 6, wherein the conductive substrate is an insulating plate provided with a conductive coating.
金、銀のいずれかまたはこれらの1つ以上を含んだ合金
よりなる請求項8に記載の太陽電池セル。9. The conductive coating is aluminum, copper, iron,
The solar cell according to claim 8, which is made of one of gold and silver or an alloy containing one or more of these.
スよりなる請求項8に記載の太陽電池セル。10. The solar battery cell according to claim 8, wherein the insulating plate is made of resin, glass, or ceramics.
コン半導体を被覆し、これを複数本平行にそれぞれV族
または III族不純物を含む合金を被覆した基板上に並
べ、熱処理することを特徴とする太陽電池セルの製造方
法。11. A method of coating a p- or n-type silicon semiconductor around a conductive thin wire, arranging the silicon semiconductor in parallel on a substrate coated with an alloy containing a group V or group III impurity, and performing heat treatment. A method of manufacturing a characteristic solar cell.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5032149A JPH06252429A (en) | 1993-02-22 | 1993-02-22 | Solar cell element, and solar cell and manufacture thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5032149A JPH06252429A (en) | 1993-02-22 | 1993-02-22 | Solar cell element, and solar cell and manufacture thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH06252429A true JPH06252429A (en) | 1994-09-09 |
Family
ID=12350859
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5032149A Pending JPH06252429A (en) | 1993-02-22 | 1993-02-22 | Solar cell element, and solar cell and manufacture thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH06252429A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005029591A1 (en) * | 2003-09-23 | 2005-03-31 | The Furukawa Electric Co., Ltd. | Linear semiconductor substrate, device using the linear semiconductor substrate, device array, and module |
-
1993
- 1993-02-22 JP JP5032149A patent/JPH06252429A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2005029591A1 (en) * | 2003-09-23 | 2005-03-31 | The Furukawa Electric Co., Ltd. | Linear semiconductor substrate, device using the linear semiconductor substrate, device array, and module |
| US8039927B2 (en) | 2003-09-23 | 2011-10-18 | The Furukawa Electric Co., Ltd. | Linear semiconductor substrate, and device, device array and module, using the same |
| JP5260830B2 (en) * | 2003-09-23 | 2013-08-14 | 古河電気工業株式会社 | Method for manufacturing a one-dimensional semiconductor substrate |
| US8778719B2 (en) | 2003-09-23 | 2014-07-15 | Furukawa Electric Co., Ltd. | Linear semiconductor substrate, and device, device array and module, using the same |
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