JPH06268464A - Noise filter block - Google Patents

Noise filter block

Info

Publication number
JPH06268464A
JPH06268464A JP5056735A JP5673593A JPH06268464A JP H06268464 A JPH06268464 A JP H06268464A JP 5056735 A JP5056735 A JP 5056735A JP 5673593 A JP5673593 A JP 5673593A JP H06268464 A JPH06268464 A JP H06268464A
Authority
JP
Japan
Prior art keywords
electrode
substrate
ground electrode
signal
ground
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5056735A
Other languages
Japanese (ja)
Inventor
Yasushi Kojima
靖 小島
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Materials Corp
Original Assignee
Mitsubishi Materials Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Materials Corp filed Critical Mitsubishi Materials Corp
Priority to JP5056735A priority Critical patent/JPH06268464A/en
Publication of JPH06268464A publication Critical patent/JPH06268464A/en
Pending legal-status Critical Current

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Landscapes

  • Details Of Connecting Devices For Male And Female Coupling (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)
  • Filters And Equalizers (AREA)

Abstract

(57)【要約】 【目的】 全体形状を薄型にし、かつ信号線路間のピッ
チを狭くして小型化できる。また温度サイクル試験を実
施しても割れ等の発生がなく、静電容量の取得範囲が広
く、十分に高周波ノイズを除去できる。 【構成】 複数の端子挿入用孔12が所定の間隔をあけ
て設けられた絶縁性基板11の孔周縁の表面に信号用電
極14が孔の内面の内面電極12aに連続して形成され
る。この電極14と所定の絶縁間隙15をあけて基板1
1の表面に第1アース電極16が形成され、この電極1
6は内面電極12aと所定の絶縁間隙18をあけて基板
11の裏面に形成された第2アース電極17に電気的に
接続される。基板表面の信号用電極と第1アース電極と
の間にはチップコンデンサ19が架設され、コンデンサ
19はベアチップ19a両端に設けられた一対の端子電
極19b,19cを信号用電極と第1アース電極にそれ
ぞれ接続する。
(57) [Summary] [Purpose] The overall shape can be made thin, and the pitch between signal lines can be narrowed to achieve miniaturization. Further, even if a temperature cycle test is carried out, no cracks or the like occur, the capacitance acquisition range is wide, and high frequency noise can be sufficiently removed. A signal electrode 14 is formed continuously on the inner surface electrode 12a on the inner surface of the hole on the surface of the periphery of the hole of an insulating substrate 11 in which a plurality of terminal insertion holes 12 are provided at a predetermined interval. The substrate 1 is provided with a predetermined insulating gap 15 from the electrode 14.
The first ground electrode 16 is formed on the surface of the electrode 1.
6 is electrically connected to a second ground electrode 17 formed on the back surface of the substrate 11 with a predetermined insulating gap 18 between the inner surface electrode 12a. A chip capacitor 19 is installed between the signal electrode on the surface of the substrate and the first ground electrode, and the capacitor 19 uses a pair of terminal electrodes 19b and 19c provided at both ends of the bare chip 19a as the signal electrode and the first ground electrode. Connect each.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、複数の信号線路におけ
る高周波ノイズを除去するためのノイズフィルタブロッ
クに関する。更に詳しくはコネクタ等に内蔵するに適し
たノイズフィルタブロックに関するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a noise filter block for removing high frequency noise in a plurality of signal lines. More specifically, it relates to a noise filter block suitable for being built in a connector or the like.

【0002】[0002]

【従来の技術】コンピュータ等のデジタル機器では、信
号線路に高周波のノイズが混入すると誤動作を生じ易
く、しかも他の電子機器等に障害をもたらす恐れのある
不要な電磁波を配線から放射する問題点がある。このた
め、信号線路にはコンデンサ素子を用いた高周波ノイズ
を除去するノイズフィルタが多用されている。複数の信
号線路における高周波ノイズを除去するためのノイズフ
ィルタブロックとしては、金属製のアース板やシールド
ケースに形成された複数の取付孔にそれぞれ貫通コンデ
ンサをはんだ付けにより配列したものや、或いは印刷回
路基板にチップコンデンサをはんだ付けにより実装した
ものが知られている。
2. Description of the Related Art In digital equipment such as computers, there is a problem that if electromagnetic waves of high frequency are mixed in a signal line, malfunctions are likely to occur, and that unnecessary electromagnetic waves that may damage other electronic equipment are radiated from wiring. is there. For this reason, a noise filter using a capacitor element for removing high frequency noise is often used in the signal line. As a noise filter block for removing high frequency noise in a plurality of signal lines, a feedthrough capacitor is arranged by soldering in a plurality of mounting holes formed in a metal ground plate or a shield case, or a printed circuit. It is known that a chip capacitor is mounted on a board by soldering.

【0003】[0003]

【発明が解決しようとする課題】しかし、上記貫通コン
デンサを用いたノイズフィルタブロックには、 複数
の貫通コンデンサをアース板に取付けた場合、貫通コン
デンサの長さの分だけノイズフィルタブロックが厚くな
り、その薄型化が困難であり、また貫通コンデンサの外
径に相応して取付孔相互の間隔をあけなければならず、
信号線路の狭ピッチ化が困難であり、 コネクタに組
込まれた状態で温度サイクル試験を実施した場合、コネ
クタの絶縁性樹脂とアース板の熱膨張率の違いにより、
端子であるコネクタピンに応力が発生し、このコネクタ
ピンが挿通する貫通コンデンサに割れ等が発生すること
があり、 貫通コンデンサの静電容量の取得可能な範
囲が狭く限定される等の問題点があった。またチップコ
ンデンサを用いたノイズフィルタブロックには、基板上
の印刷パターンの引き回しや、アース電極の構造により
高周波ノイズを除去する性能が不十分であった。
However, in the noise filter block using the feedthrough capacitor, when a plurality of feedthrough capacitors are attached to the ground plate, the noise filter block becomes thicker by the length of the feedthrough capacitor. It is difficult to make it thinner, and the mounting holes must be spaced apart according to the outer diameter of the feedthrough capacitor.
It is difficult to narrow the pitch of the signal line, and when the temperature cycle test is carried out in the state where it is installed in the connector, due to the difference in the coefficient of thermal expansion between the insulating resin of the connector and the ground plate,
The stress may occur in the connector pin that is the terminal, and the feedthrough capacitor through which this connector pin is inserted may be cracked, which limits the obtainable range of the capacitance of the feedthrough capacitor. there were. Further, the noise filter block using the chip capacitor is insufficient in the ability to route the printed pattern on the substrate and the structure of the ground electrode to remove high frequency noise.

【0004】本発明の目的は、全体形状を薄型にし、か
つ信号線路間のピッチを狭くして小型化できるノイズフ
ィルタブロックを提供することにある。本発明の別の目
的は、温度サイクル試験を実施しても割れ等の発生がな
く、静電容量の取得範囲が広く、十分に高周波ノイズを
除去できるノイズフィルタブロックを提供することにあ
る。
An object of the present invention is to provide a noise filter block which can be miniaturized by making the overall shape thin and narrowing the pitch between signal lines. Another object of the present invention is to provide a noise filter block which is free from cracks and the like even when a temperature cycle test is performed, has a wide electrostatic capacitance acquisition range, and can sufficiently remove high frequency noise.

【0005】[0005]

【課題を解決するための手段】上記目的を達成するため
の本発明の構成を、実施例に対応する図1を用いて説明
する。本発明のノイズフィルタブロック10は、複数の
端子挿入用孔12が所定の間隔をあけて設けられた絶縁
性基板11と、この基板11の孔周縁の表面に孔の内面
の内面電極12aに連続して形成された信号用電極14
と、この信号用電極14と所定の絶縁間隙15をあけて
基板11の表面に形成された第1アース電極16と、孔
12の内面の内面電極12aと所定の絶縁間隙18をあ
けて基板11の裏面に形成され第1アース電極16に電
気的に接続された第2アース電極17と、ベアチップ1
9a両端に設けられた一対の端子電極19b,19cを
信号用電極14と第1アース電極16にそれぞれ接続す
るように基板表面の信号用電極14と第1アース電極1
6との間に架設されたチップコンデンサ19とを備え
る。
A configuration of the present invention for achieving the above object will be described with reference to FIG. 1 corresponding to an embodiment. In the noise filter block 10 of the present invention, an insulating substrate 11 having a plurality of terminal insertion holes 12 provided at a predetermined interval and a surface of a peripheral edge of the substrate 11 connected to an inner electrode 12a on the inner surface of the hole. Signal electrode 14 formed by
The first earth electrode 16 formed on the surface of the substrate 11 with a predetermined insulating gap 15 between the signal electrode 14 and the inner electrode 12a on the inner surface of the hole 12 and the substrate 11 with a predetermined insulating gap 18 therebetween. The second ground electrode 17 formed on the back surface of the substrate and electrically connected to the first ground electrode 16, and the bare chip 1
The signal electrode 14 and the first ground electrode 1 on the surface of the substrate are connected so that the pair of terminal electrodes 19b and 19c provided at both ends of 9a are connected to the signal electrode 14 and the first ground electrode 16, respectively.
6 and a chip capacitor 19 installed between the first and second terminals.

【0006】[0006]

【作用】複数の端子挿入用孔12にコネクタピンのよう
な信号線路Pを挿入し、これらの信号線路Pを基板表面
の信号用電極14にそれぞれ接続するとともに、基板裏
面の第2アース電極17をアース用シールドケースのア
ース電極に接続する。チップコンデンサ19により僅か
なスペースで大きな静電容量が得られるため、ノイズフ
ィルタブロック10を小型で薄くすることができるとと
もに、このブロック10によりコネクタに実装した後の
アース側に発生する残留インダクタンスを極めて小さく
抑えることができ、しかも各信号線路を通る信号の高周
波ノイズを一括して確実に除去することができる。
The signal lines P such as connector pins are inserted into the plurality of terminal insertion holes 12, the signal lines P are connected to the signal electrodes 14 on the front surface of the substrate, and the second ground electrode 17 on the rear surface of the substrate is connected. To the ground electrode of the ground shield case. Since the chip capacitor 19 can provide a large electrostatic capacity in a small space, the noise filter block 10 can be made small and thin, and the residual inductance generated on the ground side after being mounted on the connector can be extremely reduced by the block 10. It can be suppressed to a small value, and high-frequency noise of the signal passing through each signal line can be collectively and reliably removed.

【0007】[0007]

【実施例】次に本発明の実施例を図面に基づいて詳しく
説明する。図1〜図4は本発明第1実施例ノイズフィル
タブロック10を示す。図1〜図4に示すように、絶縁
性基板であるガラスエポキシ基板11の両面に薄い銅箔
を貼付けた銅張積層板を出発材料とし、不要な部分をエ
ッチングで取去ることにより、信号用電極14、第1及
び第2アース電極16,17を形成した。即ち、銅張基
板11の中央には4個の端子挿入用孔12を、また基板
11の両端縁近傍には10個のスルーホール13をそれ
ぞれ等間隔に設けた。孔12及びスルーホール13の各
内面には銅めっきにより内面電極12a及び13aを形
成した。
Embodiments of the present invention will now be described in detail with reference to the drawings. 1 to 4 show a noise filter block 10 according to the first embodiment of the present invention. As shown in FIGS. 1 to 4, a copper clad laminate having thin copper foils attached to both sides of a glass epoxy substrate 11 which is an insulating substrate is used as a starting material, and unnecessary portions are removed by etching to obtain a signal. The electrode 14 and the first and second ground electrodes 16 and 17 were formed. That is, four terminal insertion holes 12 were provided at the center of the copper-clad substrate 11, and ten through holes 13 were provided at equal intervals in the vicinity of both edges of the substrate 11. Inner electrodes 12a and 13a were formed on the inner surfaces of the holes 12 and the through holes 13 by copper plating.

【0008】基板11の表面では孔12を中心とする円
形状の信号用電極14及びこの周囲の第1アース電極1
6の部分に、間隙15を残してレジストが印刷され、基
板11の裏面では孔12の周囲の間隙18を残して第2
アース電極17の部分に、それぞれレジストが印刷され
た。エッチング処理して間隙15と間隙18の部分の銅
箔を除去した。この結果、信号用電極14が基板11の
孔周縁の表面に孔12の内面の内面電極12aに連続し
て形成され、第1アース電極16はこの信号用電極14
を囲んでかつ電極14と所定の絶縁間隙15をあけて形
成された。また基板11の裏面には第2アース電極17
が孔12の内面の内面電極12aを囲んでかつ電極12
aと所定の絶縁間隙18をあけて形成され、この第2ア
ース電極17はスルーホール13の内面の内面電極13
aを介して第1アース電極16に電気的に接続された。
基板11の表面の信号用電極14と第1アース電極16
との間には、信号用電極1個当り2個のチップコンデン
サ19が架設される。この例では2個のチップコンデン
サは同一の静電容量を有する。チップコンデンサ19の
架設は、そのベアチップ19aの両端に設けられた一対
の端子電極19b,19cを信号用電極14と第1アー
ス電極16にそれぞれはんだ付けすることにより、行わ
れる。チップコンデンサ19はチップ型積層セラミック
コンデンサであって、ベアチップ19aは内部電極とチ
タン酸バリウム系又は鉛系の誘電体層を交互に積層した
後、焼成して得られた焼結体である。端子電極19b,
19cはAgを含む導電性ペーストをベアチップの両端
面に塗布後、焼付けて形成され、端子電極表面にはんだ
めっきが施される。
On the surface of the substrate 11, a circular signal electrode 14 centered on the hole 12 and the first ground electrode 1 around the signal electrode 14 are formed.
The resist is printed on the portion 6 at a gap 15 and the second portion is formed on the back surface of the substrate 11 at a gap 18 around the hole 12.
A resist was printed on each of the ground electrodes 17. The copper foil in the gaps 15 and 18 was removed by etching. As a result, the signal electrode 14 is continuously formed on the surface of the peripheral edge of the hole of the substrate 11 with the inner surface electrode 12a of the inner surface of the hole 12, and the first ground electrode 16 is the signal electrode 14
The electrode 14 and the electrode 14 are formed with a predetermined insulating gap 15 therebetween. The second earth electrode 17 is formed on the back surface of the substrate 11.
Surround the inner surface electrode 12a on the inner surface of the hole 12 and
The second ground electrode 17 is formed with a predetermined insulating gap 18 between the inner surface electrode 13 and the inner surface electrode 13 of the through hole 13.
It was electrically connected to the first ground electrode 16 via a.
The signal electrode 14 and the first ground electrode 16 on the surface of the substrate 11
Two chip capacitors 19 are provided for each signal electrode between and. In this example, the two chip capacitors have the same capacitance. The chip capacitor 19 is installed by soldering the pair of terminal electrodes 19b and 19c provided at both ends of the bare chip 19a to the signal electrode 14 and the first ground electrode 16, respectively. The chip capacitor 19 is a chip type monolithic ceramic capacitor, and the bare chip 19a is a sintered body obtained by alternately laminating internal electrodes and barium titanate-based or lead-based dielectric layers and firing them. Terminal electrode 19b,
19c is formed by applying a conductive paste containing Ag to both end faces of the bare chip and then baking it, and the surface of the terminal electrode is plated with solder.

【0009】このように構成されたノイズフィルタブロ
ック10を例えばコネクタ(図示せず)に内蔵する場合
について説明する。4個の端子挿入用孔12に信号線路
である4本のコネクタピンP(図1)をそれぞれ挿入
し、これらのコネクタピンPを内面電極12aに、また
基板11の裏面の第2アース電極17をアース用シール
ドケース(図示せず)にそれぞれはんだ付けにより電気
的に接続する。コネクタピンPは内面電極12a、信号
用電極14及び2個のチップコンデンサ19を介してア
ース電極16,17に接続される。チップコンデンサ1
9により僅かなスペースで大きな静電容量が得られるた
め、ノイズフィルタブロック10を小型で薄くすること
ができるとともに、このブロック10によりコネクタに
実装した後のアース側に発生する残留インダクタンスを
極めて小さく抑えることができ、しかも各信号線路を通
る信号の高周波ノイズを一括して確実に除去することが
できる。
A case where the noise filter block 10 thus constructed is built in a connector (not shown) will be described. Four connector pins P (FIG. 1), which are signal lines, are inserted into the four terminal insertion holes 12, and these connector pins P are used as the inner surface electrode 12a and the second ground electrode 17 on the back surface of the substrate 11. Are electrically connected to a ground shield case (not shown) by soldering. The connector pin P is connected to the ground electrodes 16 and 17 via the inner surface electrode 12a, the signal electrode 14 and the two chip capacitors 19. Chip capacitor 1
Since a large electrostatic capacity can be obtained in a small space by means of 9, the noise filter block 10 can be made small and thin, and the residual inductance generated on the ground side after being mounted on the connector can be kept extremely small by this block 10. It is possible to remove the high frequency noise of the signal passing through each signal line collectively and surely.

【0010】図5〜図8は本発明第2実施例ノイズフィ
ルタブロック20を示す。図1〜図4と同一符号は同一
構成部品を示す。この例の特徴ある構成は、第1実施例
のスルーホール13を設ける代わりに、絶縁性基板11
の両端面に端面電極21が形成され、第1アース電極1
6と第2アース電極17が、内面電極13aの代わりに
端面電極21を介して電気的に接続されたことにある。
この例では絶縁性基板11としてアルミナセラミックス
基板を用いた。基板11の中央に第1実施例と同様に4
個の端子挿入用孔12を等間隔に設けた。これらの孔1
2の内面にはスルーホール印刷により内面電極12aを
形成した。基板11の表面に信号用電極14及び第1ア
ース電極16をAg又はAg/Pdなどを含む導電性ペ
ーストをスクリーン印刷して形成した。即ち、信号用電
極14は基板11の孔周縁の表面にこれらの孔12の内
面の内面電極12aに連続して円形状に形成され、第1
アース電極16はこの信号用電極14を囲んでかつ電極
14と所定の絶縁間隙15をあけて形成された。
5 to 8 show a noise filter block 20 according to the second embodiment of the present invention. 1 to 4 indicate the same components. The characteristic constitution of this example is that the insulating substrate 11 is replaced by the through hole 13 of the first embodiment.
End face electrodes 21 are formed on both end faces of the first ground electrode 1
6 and the second ground electrode 17 are electrically connected via the end face electrode 21 instead of the inner face electrode 13a.
In this example, an alumina ceramic substrate was used as the insulating substrate 11. In the center of the substrate 11, 4 as in the first embodiment.
The individual terminal insertion holes 12 were provided at equal intervals. These holes 1
An inner electrode 12a was formed on the inner surface of No. 2 by through-hole printing. The signal electrode 14 and the first ground electrode 16 were formed on the surface of the substrate 11 by screen-printing a conductive paste containing Ag or Ag / Pd. That is, the signal electrode 14 is formed in a circular shape on the surface of the peripheral edge of the hole of the substrate 11 so as to be continuous with the inner electrode 12a on the inner surface of the hole 12,
The ground electrode 16 is formed so as to surround the signal electrode 14 and leave a predetermined insulating gap 15 from the electrode 14.

【0011】基板11の裏面に第2アース電極17を上
記と同じ導電性ペーストをスクリーン印刷して形成し
た。更に基板11の端面に導電性ペーストをコーティン
グして焼付け端面電極21を形成した。これにより、第
2アース電極17は孔12の内面の内面電極12aを囲
んでかつ電極12aと所定の絶縁間隙18をあけて形成
され、第2アース電極17が端面電極21を介して第1
アース電極16に電気的に接続された。基板11の表面
の信号用電極14と第1アース電極16との間には、第
1実施例と同様にチップコンデンサ19が架設された。
このノイズフィルタブロック20の使用方法及び特性は
前記第1実施例と同様であるので繰り返しの説明を省略
する。
A second ground electrode 17 was formed on the back surface of the substrate 11 by screen-printing the same conductive paste as above. Further, the end face of the substrate 11 was coated with a conductive paste to form a baked end face electrode 21. As a result, the second ground electrode 17 is formed so as to surround the inner surface electrode 12a on the inner surface of the hole 12 and to leave a predetermined insulating gap 18 from the electrode 12a, and the second ground electrode 17 is provided with the first surface electrode 21 via the end surface electrode 21.
It was electrically connected to the ground electrode 16. A chip capacitor 19 was installed between the signal electrode 14 and the first ground electrode 16 on the surface of the substrate 11 as in the first embodiment.
The method of use and characteristics of the noise filter block 20 are the same as those in the first embodiment, and the repeated description will be omitted.

【0012】なお、上記例では絶縁性基板としてガラス
エポキシ基板及びアルミナセラミックス基板を示した
が、耐熱性のある、機械的強度の高い絶縁性基板であれ
ば、他の基板を用いてもよい。また、信号用電極の形状
は円形に限らず、角形、楕円形など他の形状でもよい。
また、チップコンデンサを信号用電極1個当り2個設け
たが、この数は一例であって、除去する周波数範囲に応
じてチップコンデンサを1個又は3個以上設けてもよ
く、或いは除去する周波数範囲に応じて静電容量を変え
てもよい。更に、端子挿入用孔の数、又はスルーホール
の数は一例であって、上記例に限るものではない。
Although a glass epoxy substrate and an alumina ceramics substrate are shown as the insulating substrate in the above example, other substrates may be used as long as they are heat resistant and have high mechanical strength. Further, the shape of the signal electrode is not limited to a circular shape, but may be another shape such as a square shape or an elliptical shape.
Further, two chip capacitors are provided for each signal electrode, but this number is an example, and one or three or more chip capacitors may be provided depending on the frequency range to be removed, or the frequency to be removed. The capacitance may be changed according to the range. Furthermore, the number of terminal insertion holes or the number of through holes is an example, and is not limited to the above example.

【0013】[0013]

【発明の効果】以上述べたように、本発明によれば、以
下の優れた効果を奏する。 (a) コンデンサ素子として従来の貫通コンデンサの代わ
りにチップコンデンサを用いるため、信号線路間を狭ピ
ッチ化でき、ノイズフィルタブロックの小型化、薄型化
が可能となり、これを内蔵するフィルタコネクタの小型
化が可能となる。 (b) コネクタ等に装着した後、コネクタピン等の端子に
荷重を加えてもコンデンサ素子であるチップコンデンサ
には直接荷重がかからないため、チップコンデンサを損
傷させることがない。また温度サイクル試験を実施して
も割れ等の発生がない。
As described above, the present invention has the following excellent effects. (a) Since a chip capacitor is used as the capacitor element instead of the conventional feedthrough capacitor, the pitch between signal lines can be narrowed, and the noise filter block can be made smaller and thinner, and the filter connector incorporating this can be made smaller. Is possible. (b) Since the chip capacitor, which is a capacitor element, is not directly loaded even if a load is applied to the terminals such as connector pins after it is mounted on the connector, the chip capacitor is not damaged. Moreover, even if a temperature cycle test is performed, no cracks or the like occur.

【0014】(c) チップコンデンサを搭載しているた
め、従来の貫通コンデンサと比べて静電容量の取得範囲
が広く、十分に高周波ノイズを除去できるとともに、チ
ップコンデンサを複数個搭載し、例えば高周波用、低周
波用のチップコンデンサを組合せれば、広い周波数範囲
のノイズ対策が可能となる。 (d) 絶縁性基板の表面及び裏面にそれぞれ第1及び第2
アース電極を設けて、基板端面又はスルーホールにより
両アース電極を電気的に接続するため、コネクタ等のア
ース用シールドケースに取り付けた場合、シールド効果
が高いとともに、アース側に発生する残留インダクタン
スが抑えられ、高周波除去効果に優れている。
(C) Since the chip capacitor is mounted, the capacitance acquisition range is wider than that of the conventional feedthrough capacitor, and high-frequency noise can be sufficiently removed. By combining a chip capacitor for high frequency and low frequency, it is possible to take measures against noise in a wide frequency range. (d) First and second on the front and back of the insulating substrate, respectively.
Since a ground electrode is provided and both ground electrodes are electrically connected by the end face of the board or through holes, when installed in a ground shield case such as a connector, the shield effect is high and the residual inductance generated on the ground side is suppressed. And is excellent in high frequency removal effect.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明第1実施例のノイズフィルタブロックの
図2のA−A線断面図。
FIG. 1 is a sectional view of the noise filter block according to the first embodiment of the present invention taken along the line AA of FIG.

【図2】その平面図。FIG. 2 is a plan view thereof.

【図3】その外観斜視図。FIG. 3 is an external perspective view thereof.

【図4】その反転した外観斜視図。FIG. 4 is an inverted perspective view of the same.

【図5】本発明第2実施例のノイズフィルタブロックの
図6のB−B線断面図。
5 is a cross-sectional view of the noise filter block of the second embodiment of the present invention taken along the line BB of FIG.

【図6】その平面図。FIG. 6 is a plan view thereof.

【図7】その外観斜視図。FIG. 7 is an external perspective view thereof.

【図8】その反転した外観斜視図。FIG. 8 is an inverted perspective view of the same.

【符号の説明】[Explanation of symbols]

P コネクタピン(信号線路) 10,20 ノイズフィルタブロック 11 絶縁性基板 12 端子挿入用孔 12a,13a 内面電極 13 スルーホール 14 信号用電極 15,18 絶縁間隙 16 第1アース電極 17 第2アース電極 19 チップコンデンサ 19a ベアチップ 19b,19c 端子電極 21 端面電極 P Connector pin (signal line) 10, 20 Noise filter block 11 Insulating substrate 12 Terminal insertion hole 12a, 13a Inner surface electrode 13 Through hole 14 Signal electrode 15, 18 Insulation gap 16 First earth electrode 17 Second earth electrode 19 Chip capacitor 19a Bare chip 19b, 19c Terminal electrode 21 End surface electrode

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】 複数の端子挿入用孔(12)が所定の間隔を
あけて設けられた絶縁性基板(11)と、 前記基板(11)の孔周縁の表面に前記孔(12)の内面の内面
電極(12a)に連続して形成された信号用電極(14)と、 前記信号用電極(14)と所定の絶縁間隙(15)をあけて前記
基板(11)の表面に形成された第1アース電極(16)と、 前記孔(12)の内面の内面電極(12a)と所定の絶縁間隙(1
8)をあけて前記基板(11)の裏面に形成され前記第1アー
ス電極(16)に電気的に接続された第2アース電極(17)
と、 ベアチップ(19a)両端に設けられた一対の端子電極(19b,
19c)を前記信号用電極(14)と前記第1アース電極(16)に
それぞれ接続するように前記基板(11)の表面の前記信号
用電極(14)と前記第1アース電極(16)との間に架設され
たチップコンデンサ(19)とを備えたノイズフィルタブロ
ック。
1. An insulative substrate (11) having a plurality of terminal insertion holes (12) provided at predetermined intervals, and an inner surface of the hole (12) on a surface of a hole periphery of the substrate (11). A signal electrode (14) continuously formed on the inner surface electrode (12a) of the electrode, and a predetermined insulating gap (15) from the signal electrode (14) formed on the surface of the substrate (11). A predetermined insulation gap (1) is formed between the first ground electrode (16) and the inner electrode (12a) on the inner surface of the hole (12).
A second ground electrode (17) which is formed on the back surface of the substrate (11) by opening 8) and is electrically connected to the first ground electrode (16).
And a pair of terminal electrodes (19b, 19b) provided on both ends of the bare chip (19a).
19c) is connected to the signal electrode (14) and the first ground electrode (16) respectively, and the signal electrode (14) and the first ground electrode (16) on the surface of the substrate (11) are connected to each other. A noise filter block including a chip capacitor (19) installed between the two.
【請求項2】 絶縁性基板(11)に複数のスルーホール(1
3)が設けられ、第1アース電極(16)と第2アース電極(1
7)が前記スルーホール(13)の内面電極(13a)を介して電
気的に接続された請求項1記載のノイズフィルタブロッ
ク。
2. A plurality of through holes (1) in an insulating substrate (11).
3) is provided, and the first ground electrode (16) and the second ground electrode (1
The noise filter block according to claim 1, wherein 7) is electrically connected through an inner surface electrode (13a) of the through hole (13).
【請求項3】 絶縁性基板(11)の端面に端面電極(21)が
形成され、第1アース電極(16)と第2アース電極(17)が
前記端面電極(21)を介して電気的に接続された請求項1
記載のノイズフィルタブロック。
3. An end surface electrode (21) is formed on an end surface of an insulating substrate (11), and a first ground electrode (16) and a second ground electrode (17) are electrically connected via the end surface electrode (21). Claim 1 connected to
Noise filter block as described.
JP5056735A 1993-03-17 1993-03-17 Noise filter block Pending JPH06268464A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5056735A JPH06268464A (en) 1993-03-17 1993-03-17 Noise filter block

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5056735A JPH06268464A (en) 1993-03-17 1993-03-17 Noise filter block

Publications (1)

Publication Number Publication Date
JPH06268464A true JPH06268464A (en) 1994-09-22

Family

ID=13035778

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5056735A Pending JPH06268464A (en) 1993-03-17 1993-03-17 Noise filter block

Country Status (1)

Country Link
JP (1) JPH06268464A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100432361B1 (en) * 2001-05-29 2004-05-22 김성열 Lead-through type filter with improved function of shielding
TWI382633B (en) * 2004-11-29 2013-01-11 Tdk Corp Noise filter and motor
JP2013065800A (en) * 2011-09-20 2013-04-11 Bosch Corp Printed wiring board
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EP2669914A1 (en) 2012-05-30 2013-12-04 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
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JP2014154395A (en) * 2013-02-08 2014-08-25 Auto Network Gijutsu Kenkyusho:Kk Noise filter built-in joint connector
US8934215B2 (en) 2012-07-20 2015-01-13 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
WO2018189226A1 (en) * 2017-04-11 2018-10-18 Enraf-Nonius B.V. Electrical device comprising filter and feedthrough capacitor

Cited By (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100432361B1 (en) * 2001-05-29 2004-05-22 김성열 Lead-through type filter with improved function of shielding
TWI382633B (en) * 2004-11-29 2013-01-11 Tdk Corp Noise filter and motor
JP2013065800A (en) * 2011-09-20 2013-04-11 Bosch Corp Printed wiring board
KR20130135015A (en) 2012-05-30 2013-12-10 삼성전기주식회사 Laminated chip electronic component, board for mounting the same, packing unit thereof
EP2669914A1 (en) 2012-05-30 2013-12-04 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
US20130321981A1 (en) 2012-05-30 2013-12-05 Young Ghyu Ahn Laminated chip electronic component, board for mounting the same, and packing unit thereof
US9099242B2 (en) 2012-05-30 2015-08-04 Samsung Electro-Mechanics Co., Ltd. Laminated chip electronic component, board for mounting the same, and packing unit thereof
KR20130135014A (en) 2012-05-30 2013-12-10 삼성전기주식회사 Laminated chip electronic component, board for mounting the same, packing unit thereof
US8638543B2 (en) 2012-05-30 2014-01-28 Samsung Electro-Mechanics Co., Ltd. Laminated chip electronic component, board for mounting the same, and packing unit thereof
KR20140028092A (en) 2012-05-30 2014-03-07 삼성전기주식회사 Laminated chip electronic component, board for mounting the same, packing unit thereof
EP2669915A1 (en) 2012-05-30 2013-12-04 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
US9576728B2 (en) 2012-05-30 2017-02-21 Samsung Electro-Mechanics Co., Ltd. Laminated chip electronic component, board for mounting the same, and packing unit thereof
EP2819134A2 (en) 2012-05-30 2014-12-31 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
EP2827351A1 (en) 2012-05-30 2015-01-21 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component and board for mounting the laminated component
US8934215B2 (en) 2012-07-20 2015-01-13 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
EP2713378A1 (en) 2012-09-27 2014-04-02 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
EP2849190A1 (en) 2012-09-27 2015-03-18 Samsung Electro-Mechanics Co., Ltd Laminated chip electronic component, board for mounting the same, and packing unit thereof
US9155197B2 (en) 2012-09-27 2015-10-06 Samsung Electro-Mechanics Co., Ltd. Laminated chip electronic component, board for mounting the same, and packing unit thereof
JP2014154395A (en) * 2013-02-08 2014-08-25 Auto Network Gijutsu Kenkyusho:Kk Noise filter built-in joint connector
WO2018189226A1 (en) * 2017-04-11 2018-10-18 Enraf-Nonius B.V. Electrical device comprising filter and feedthrough capacitor
US11564339B2 (en) 2017-04-11 2023-01-24 Enraf-Nonius B.V. Electrical device comprising filter and feedthrough capacitor

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