JPH06292020A - Method and device for decoding picture code - Google Patents

Abstract

(57) [Summary] [Object] To provide an encoding method capable of suppressing deterioration of image quality even when compression / expansion is repeated in image compression encoding using orthogonal transform such as discrete cosine transform. [Structure] A block position detection circuit 30 detects a block position at the time of previous encoding. Block division circuit 52
In, the block division is performed so as to match the detected block position, and the central block and the peripheral block are encoded (10, 53). A code indicating the block position information is created by the code creation circuit 54, added to the code created by the coding circuits 10 and 53, and output (55).

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image data coding method and device using orthogonal transform such as discrete cosine transform, and more particularly to a coding method and device for repeatedly compressing / expanding for VTR and the like. The present invention relates to an encoding / decoding method and a device capable of obtaining the same.

[0002]

2. Description of the Related Art Image data has an extremely large amount of data as compared with audio data, and for example, it becomes about 5 MByte on one screen of HDTV. In order to efficiently store or transmit these, various image data compression coding methods have been proposed. Currently, the mainstream of this encoding method is one using orthogonal transform such as discrete cosine transform (DCT).

In DCT, an input image is divided into a plurality of blocks each having a fixed number of pixels in the vertical and horizontal directions, and D is divided into blocks.
Apply CT to transform into frequency components called DCT coefficients. In DCT, the data of M × N pixels is D of M × N order.
Converted to CT coefficient. Normally, M = N is set, and the horizontal coordinate in the block is i and the vertical coordinate is j (i, j = 0,1, ..., N-
1), the brightness f (i, j) of each pixel is the two-dimensional D
The CT transforms the DCT coefficients into F (u, v) (u, v = 0,1, ..., N-1).

[0004]

[Equation 1]

FIG. 1 schematically shows DCT conversion. The DCT converts the brightness data of an image into a frequency spectrum, and as shown in FIG. 1, F (0,
0) is the DC component, and the average value of the brightness in the block is F
(u, v) is the horizontal spatial frequency u and the vertical spatial frequency v
Represents the magnitude of the component of, the larger u or v,
It is a component with a high spatial frequency. In general images, it is known that the energy of brightness concentrates on DC and low-frequency AC components. Therefore, the brightness data is converted by the DCT into data concentrated on the coefficients of the direct current and low frequency alternating current components, and high compression efficiency can be realized.

JPEG (Joint Photographic Expert) is one of the compression coding methods utilizing such characteristics of DCT.
Group). JPEG is CCITT SG VIII CCIC and IS
O This is an international standard method for compression encoding of still images studied by JTC1 / SC29 / WG10, and is extremely versatile so that it can be used for various purposes. See the ISO / IEC CD for a detailed description of the JPEG encoding method.
10198-1,, "Digital Compression and Coding of Conti
nuous-tone Still Images Part 1: Requirements and
guidelines ", ISO / IEC JTC 1 / SC 2 N2215, 1991.3
The description is omitted here, and only the part related to the present invention will be briefly described below with reference to FIG.

The image input from the terminal 11 is divided into blocks of 8 × 8 pixels by the block division circuit 12, and DCT is performed by the DCT circuit 13. The DCT coefficient is quantized by the quantizing circuit 14. However, human visual characteristics are insensitive to high frequency components, and the deterioration of high frequency components is not noticeable even if rough quantization is performed. The AC component is finely quantized, and is quantized more roughly as the spatial frequency becomes higher.

The variable-length coding circuit 15 codes the quantized data, but performs different coding for the DC component and the AC component. The DC component is the average value of the luminance in the block as described above, and since the correlation between adjacent blocks is strong, the difference from the DC component value of the immediately encoded block is calculated and Huffman coding is performed. . On the other hand, the AC component is almost 0 for the high frequency component due to the above-mentioned DCT properties and quantization characteristics. Therefore, the DCT coefficients are arranged in a one-dimensional manner from low frequency to high frequency, and the non-zero coefficient and its coefficient continue. Huffman coding is performed on the combination of the number of zero coefficients. In JPEG, the code amount can be reduced as described above, and compression of image data is achieved.

[0009]

When the compression / expansion is repeatedly performed by using the above method, the DCT at the time of the previous encoding is used.
When the block subjected to the DCT and the block subjected to the DCT this time match, the required code amount and the reproduction image quality are almost constant, and deterioration due to repeated compression / expansion is small.
However, when the image position shift occurs after the previous compression / expansion, that is, when the DCT block positions do not match for each encoding, the required code amount is increased by repeatedly performing compression / expansion. Therefore, there is a problem that the image quality deteriorates when the code amount needs to be constant.

This is because the luminance value of the pixel in the block is expressed by the cosine function at the time of encoding, but at that time, since each block is processed independently, the continuity of the luminance value with the adjacent block is kept. It is thought that it is because it cannot be kept. That is, although the DCT is excellent in expressing smooth data, a large amount of coefficient data is required in order to express discontinuous data, so that block shift occurs and discontinuous data is generated within a block. Is present in
The code amount increases.

As described above, when encoding / decoding is repeatedly performed, it is important to match the blocks for each encoding. However, considering the compatibility with other devices, it is difficult to add block position information to unencoded normal image data, and the previous block division information cannot be obtained at the time of encoding. become.

The present invention provides an image data compression encoding method and apparatus which does not increase the required code amount even when the block division information at the time of the previous encoding cannot be obtained, and therefore does not cause the image quality deterioration. The purpose is.

[0013]

The above problem is solved by detecting the block position when the input image was previously coded, and dividing the coded block this time so as to match the detected block. Will be solved by

The present invention has been made for the purpose of solving the above problems, and a block position detecting method for detecting the block division position at the time of the previous encoding and a block which matches the detected block position. It is composed of an encoding method of dividing and encoding each block. Further, in order to prevent the displacement of the image position after decoding, it is also possible to use a method of adding block division information to the output code and a decoding method of performing decoding based on the added block division information.

[0015]

In the block position detecting method provided by the present invention, the block position is detected by utilizing the above-mentioned property of DCT. In a normal image, D in the encoding process
Due to the quantization of the CT coefficients, most of the high frequency coefficients are zero. In the decoding process, the inverse DCT is added to the DCT coefficient.
Since the image is reproduced by performing the above, when the DCT is performed again on the obtained reproduced image, if the block positions match,
Many of the high frequency component coefficients of the obtained DCT coefficient are still zero. However, when the block positions do not match, since the discontinuous data at the block boundary at the time of the previous encoding exists in the block, the coefficient of the high frequency component also has a value. Therefore, the high frequency component of the DCT becomes the smallest when the block position matches the previous encoding.

In this method, first, the input image is divided into test blocks of the same size as at the time of encoding, and this is divided into DCTs.
Then, the sum of high frequency components of all blocks is calculated. Similarly, the DCT block position at the time of the previous encoding can be detected by calculating also when the position of the test block is horizontally or vertically shifted and calculating the shift amount that minimizes this. .

In the encoding and decoding method provided by the present invention, the DC based on the data of the block position detecting method is used.
By matching the block to which T is applied with the previous encoding, it is possible to suppress an increase in the amount of generated code at the time of re-encoding or deterioration of the image quality. Also, by adding block division information to the output code of the encoding method,
It is possible to prevent the image position from shifting before and after encoding.

[0018]

FIG. 3 shows an embodiment of a block position detecting circuit according to the present invention. In the following description, the block size is N × N pixels, and an example using the DCT will be described. Further, since the shift amount can be detected independently in the horizontal direction and the vertical direction, the horizontal direction will be described here.

In FIG. 3, the image data input from the input terminal 31 is divided into test blocks by the block division circuit 32. On the other hand, the input image data is also sent to the delay 33. The delay 33 has a delay amount corresponding to one pixel, and the input data of each block division circuit is a signal horizontally shifted by one pixel. As a result, in each block division circuit, as shown in FIG. 4, division is performed by horizontally shifting by one pixel. The image data in each block divided in this way is stored in the DCT circuit 13
Is subjected to discrete cosine transform by the adder circuit 34, and the sum of absolute values of the AC component coefficients is calculated by the adder circuit 34. If the determination circuit 35 determines the smallest absolute value sum of the AC component coefficients obtained in this way and outputs the block position information at that time, this becomes the block division position information at the time of the previous encoding. .

Here, it is not necessary to use the entire screen as the test block, and when detecting the block position in the horizontal direction, even if it is detected from a horizontally long area of vertical N pixels as shown in FIG. The effect of is obtained. Further, when detecting the block position in the vertical direction, the delay 33
This is achieved by setting the delay amount of 1 for one line and shifting the division results of each block division circuit vertically. Also in this case, for example, it is possible to detect only from a vertically long area of N horizontal pixels as shown in FIG.

In this embodiment, the sum of absolute values of only the AC component coefficients of the DCT is used, but the same effect can be obtained by using the sum of squares. With respect to the DC component coefficient, the influence of the block division position is small, while the influence of the property of the original image is large. Therefore, using the AC component alone enables more reliable detection.

FIG. 7 shows an embodiment of the image coding circuit according to the present invention.

The image data input from the input terminal 51 is first detected by the block position detection circuit 30 shown in FIG. 3 at the block position at the time of the previous encoding, and is divided into blocks by the block division circuit 52 based on the information. To be done.
By this division, the block divided into N × N pixels in the central portion of the image is processed by the encoding circuit 10 in a normal JP
It is encoded by the EG method. On the other hand, in the peripheral portion of the image, the block divided into smaller than N × N pixels is encoded by the peripheral block encoding circuit 53. In the peripheral block coding circuit 53, the corresponding area is divided into four areas as shown in FIG. 8, and each area is divided into DPCM (Different
It is encoded by (ial PCM). Further, the block position information 57 from the block position detection circuit 30 is stored in the code creation circuit 5
It is binary-coded by 4. At this time, it is also possible to use another encoding method such as differential encoding instead of binary encoding.

FIG. 9 shows an example of the DPCM circuit. The image data input from the input terminal 61 is sent to the differentiator 62. On the other hand, the image data is also sent to the delay 63, and the data delayed by one pixel is sent to the difference unit 62. The differencer 62 takes the difference between the two, but in a normal image, the correlation between adjacent pixels is strong, so the difference value is a small value. This difference value is quantized by the quantization circuit 64 and encoded by the variable length encoding circuit 65 to create a code.

The code thus created is multiplexed by the multiplexer 55 shown in FIG. 7 and output as the final code. FIG. 10 shows an example of the structure of the code word.
As shown in FIG. 10A, after the header information, the binary-coded block position information, and the upper end block information, the image information for every N lines is displayed as the left end block information, the central block information, and the right end block. The information is output in the order of information, and finally the lower end block information is output.

In VTR encoding and the like, the upper limit of the code amount is often fixed for each frame, and it is not allowed to exceed the upper limit. Therefore, some kind of control is performed so that the upper limit is not exceeded.
When the code amount control is not successful and the code amount exceeds the upper limit, the output of the code must be terminated. In such a case, in the codeword configuration of FIG. 10 (1), the influence of the censoring is likely to reach the central block, but the codeword configuration as shown in FIG. It is possible to

In the embodiment, the coding system used in the peripheral block coding circuit 53 is DPCM, but M × N.
It is obvious that the present invention also includes the case of using the DCT or the one-dimensional DCT. Alternatively, if the image size is vertical
If the width is an integer multiple of N, a block of N × N pixels can be created by combining the left and right ends or the upper and lower end regions.
It is also possible to encode the entire image with the encoding circuit 10.

FIG. 11 shows an embodiment of the decoding circuit according to the present invention. The code input from the input terminal 71 is separated by the demultiplexer 72 into block position information and two types of image information of central block data and peripheral block data, and sent to the decoding circuits 73 to 75, respectively. The block position information is decoded by the decoding circuit 75 and sent to the write control circuit 76. The image center block data is decoded by the decoding circuit 74 of the coding circuit 10, and the image peripheral block data is coded by the coding circuit 5.
3 is decoded by the decoding circuit 73 that performs the inverse conversion processing of 3, and the write control circuit 76 causes the frame memory 77
Is written in a predetermined position.

When the image signal is input in analog, 1
There is a possibility that a minute image shift of less than pixels occurs, which may cause image quality deterioration during compression and expansion. In such a case, as shown in FIG.
Double oversampling is performed, the block position detection circuit 30 detects the block position in 1 / n pixel units by the same method, and the delay circuit 83 and the sub-sampling circuit 84 compensate based on the detected block position information 57. can do. In addition, as shown in FIG. 13, the block position detection circuit 30 outputs DC together with the block position information 57.
The magnitude 93 of the high frequency component of the T coefficient is output, and the A / D generated by the clock generation circuit 92 is minimized.
It is also possible to compensate by controlling the conversion clock.

Although an example using JPEG has been shown in the description, other than this, two-dimensional orthogonal transform such as two-dimensional DCT or Hadamard transform may be used, or one-dimensional orthogonal transform may be used. Also in this case, the block position detecting section can be applied by using the same orthogonal transform as that used for encoding.

Further, when detecting the block position, the amount of high frequency components in the test block is calculated instead of the orthogonal transformation, and the sum of the high frequency components in the test block is calculated as in the case of the orthogonal transformation. The same effect can be obtained by a method of obtaining the minimum block division position. The high frequency component can be obtained by applying a high pass filter to the block and calculating the energy of the filter output data. An example of the high-pass filter is a filter as shown in FIG. By doing so, it is possible to apply to a case where an image is divided into blocks and encoded, instead of encoding using orthogonal transform.

If it is not necessary to detect pixel by pixel depending on the application, the delay amount of the delay 33 in FIG. 3 may be increased and the block division circuit 32 may be divided into blocks by several pixels. .

When there are a plurality of regions having different block positions in the frame, the regions can be detected and the block position can be corrected for each region. In this case, the boundary of each area is divided into blocks of less than N × N pixels, and the area is encoded by DPCM as in the peripheral block. Also for this encoding, an encoding method other than DPCM can be applied as in the case of the peripheral block.

The block position detecting circuit shown in FIG. 3 can also be realized with a configuration as shown in FIG. In this configuration, the high frequency component calculation circuit 102 calculates the high frequency component in the N × N pixel area of the input image, and the distribution circuit 103 distributes the high frequency component according to the position in the frame of the high frequency component calculation area. At this time, the horizontal or vertical coordinates of the high frequency component calculation area are sequentially distributed to the N adder circuits 104 by the remainder obtained by dividing by the size N of the coding block. Since the high frequency component amount in the configuration of FIG. 3 is obtained by adding the distributed data in the adding circuit 104, the determining circuit 3
By determining the minimum value according to 5, the block position can be detected.

Although the present embodiment is premised on re-encoding an encoded image, the high frequency component of the DCT coefficient is calculated over the entire screen even for an unencoded image, By performing block division according to the minimum point, improvement in coding efficiency can be expected.

An application example of the image coding circuit and the decoding circuit according to the present invention is shown in FIG. FIG. 16 is for recording or transmitting an HDTV signal, and by using the image coding circuit and the image decoding circuit according to the present invention, the current T
An HDTV signal can be recorded and transmitted by a VTR for V or a transmission system. In this case, since the block shift is compensated for encoding and decoding, it is possible to suppress the image quality deterioration even when the position of the image shifts when these recording and transmission are repeated.

[0037]

According to the present invention, even if the block division information at the time of the previous encoding cannot be obtained, the required code amount is not increased, and therefore, the image data compression encoding method and apparatus without the risk of image quality deterioration. Can be realized.

[Brief description of drawings]

FIG. 1 is an explanatory diagram of a discrete cosine transform (DCT).

FIG. 2 is a schematic diagram of JPEG.

FIG. 3 is a first schematic block diagram of a block position detection device according to an embodiment of the present invention.

FIG. 4 is a diagram showing division of test blocks.

FIG. 5 is a diagram showing a test block for detecting a horizontal shift amount.

FIG. 6 is a diagram showing a test block for detecting a vertical shift amount.

FIG. 7 is a schematic block diagram of an encoding device according to an embodiment of the present invention.

FIG. 8 is a diagram showing a region of an image.

FIG. 9 is an explanatory diagram of DPCM.

FIG. 10 is a diagram showing the structure of a code word.

FIG. 11 is a schematic block diagram of a decoding device according to an embodiment of the present invention.

FIG. 12 is a first schematic block diagram of an encoding apparatus according to an embodiment of the present invention at the time of analog input.

FIG. 13 is a second schematic block diagram of the encoding apparatus in one embodiment of the present invention at the time of analog input.

FIG. 14 is a diagram showing an example of a detection filter.

FIG. 15 is a second schematic block diagram of a block position detection device according to an embodiment of the present invention.

FIG. 16 is an application example of an image encoding circuit and a decoding circuit according to the present invention.

[Explanation of symbols]

10 ... Image block coding circuit, 30 ... Block position detection circuit, 32 ... Test block division circuit, 33 ... Delay circuit, 35 ... Judgment circuit, 52 ... Block division circuit, 5
3 ... Image peripheral block coding circuit, 54 ... Block position information coding circuit, 76 ... Write control circuit, 83 ... Delay circuit, 84 ... Subsample circuit, 92 ... Clock generation circuit, 102 ... High frequency component calculation circuit, 103 … Distribution circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Junichi Kimura 1-280 Higashi Koigokubo, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Inventor Akiko Gonda 1-280 Higashi Koikeku, Kokubunji, Tokyo Hitachi Ltd. Central Research Center

Claims (14)

[Claims] 1. An image compression coding method in which an input image signal is divided into a plurality of blocks each having a fixed number of pixels in the vertical and horizontal directions, and coding is performed in units of these image blocks. Divide into multiple test blocks, perform orthogonal transformation on each block, and calculate the magnitude of the high frequency component of the obtained orthogonal transformation coefficient,
The image coding method is characterized in that the test block position is shifted by 1 or several pixels, the magnitudes of these high frequency components are compared, and the minimum test block division position is detected. 2. An image compression coding apparatus for dividing an input image signal into a plurality of blocks each having a fixed number of pixels in the vertical and horizontal directions, and encoding the image in units of these image blocks. A plurality of block division methods for dividing into a plurality of test blocks are provided, and each block division is set to shift by 1 or several pixels, or the test block is divided by 1 or several pixels. A block division unit capable of, and each block divided by the block division unit,
An orthogonal transformation unit that performs orthogonal transformation, a calculation unit that calculates the magnitude of the high-frequency component of the orthogonal transformation coefficient obtained by the orthogonal transformation unit, and a minimum of the high-frequency components calculated by shifting the division of the test block An image coding apparatus, comprising: a block position detection circuit provided with a determination unit that selects the following one and outputs the minimum block division position. 3. An image coding method for performing coding by performing block division so as to match the detected block position based on the block position information detected by the block position detecting method according to claim 1. 4. An image coding apparatus which performs block division based on block position information detected by the block position detection circuit according to claim 2 so as to match the detected block position and performs coding. 5. The image coding method according to claim 3, wherein block division position information is added to the output code. 6. The image coding apparatus according to claim 4, wherein block division position information is added to the output code. 7. An image decoding method, wherein an image is reconstructed based on block division position information added to a code created by the image coding method according to claim 5. 8. An image decoding device, which reconstructs an image based on block division position information added to a code created by the image coding device according to claim 6. 9. An image recording device for recording and reproducing an image by a recording device having a low recording speed, using the image encoding device according to claim 6 and the image decoding device according to claim 8. . 10. The image encoding device according to claim 6,
And using the image decoding device according to claim 8,
An image transmission device that transmits images using a transmission system with a small transmission capacity. 11. A processing method for dividing an input image signal into a plurality of blocks each having a predetermined number of vertical and horizontal pixels and processing the block, wherein the block position of the input image signal is detected, and the input image is detected according to the detected block position. An image coding method characterized in that a signal is divided into blocks and each of the divided blocks is encoded. 12. An apparatus for processing an input image signal by dividing it into a plurality of blocks each having a predetermined number of pixels in the vertical and horizontal directions, the block position detecting circuit of the input image signal, and the input according to the output of the block position detecting circuit. An image encoding device comprising: a block division circuit for dividing an image signal into blocks; and an encoding circuit for encoding the blocks divided by the block division circuit. 13. A decoding method for decoding an encoded code by dividing an image signal into a plurality of blocks each having a predetermined number of vertical and horizontal pixels, in a decoded block based on block division information added to the code. An image decoding method characterized by writing image data at a predetermined position on a screen. 14. An apparatus for decoding an encoded code by dividing an image signal into a plurality of blocks each having a predetermined number of pixels in the vertical and horizontal directions, a circuit for decoding block division information added to the code, and the decoding circuit. An image decoding apparatus comprising: a write control circuit for writing the decoded in-block image data to a predetermined position on the screen based on the block division information obtained by the above.