JPH06295907A - Film forming method, film forming apparatus, and semiconductor device manufacturing method - Google Patents

Abstract

PURPOSE:To prevent that a reaction is caused before a part, which requires the film-forming reaction, and particles are generated and to execute the film- forming reaction so that a good film-forming reaction is executed by a method wherein at least one kind of gas out of raw gases is introduced in a reaction chamber through a gas feeding opening, which is apart from the gas feeding opening of reaction catalyst gas. CONSTITUTION:An introducing tube 12 for introducing an organic Si compound, a TEOS, and oxygen gas, which is an oxidizing agent, from the direction shown by an arrow B1 is provided on the upper part of a reaction chamber 11. Moreover, in an H2O-TEOS plasma CVD device, gas introducing rings 18 are provided in the chamber 11 so that ammonia, which is used as a basic reaction catalyst to make it possible to form a reaction product consisting of the TEOS having a high molecular weight on the surface of a wafer 15, can be mixed with the TEOS on the surface of the wafer. Accordingly, an addition of the reaction catalyst can be performed on the surface of the wafer, the reaction of dehydration and condensation of an H2O-TEOS system progresses effectively and the formation of a good interlayer insulating film becomes possible.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a film forming method, a film forming apparatus,
And a method for manufacturing a semiconductor device. INDUSTRIAL APPLICABILITY The film forming method and the film forming apparatus of the present invention can be used in various fields in which film formation is performed using a raw material gas, and can be used, for example, in film formation during electronic material formation. INDUSTRIAL APPLICABILITY The method for manufacturing a semiconductor device of the present invention can be applied to the manufacture of various semiconductor devices, and can be preferably used, for example, for manufacturing a semiconductor device having a miniaturized / integrated wiring structure. It can be used when manufacturing integrated semiconductor circuits such as integrated memory devices.

[0002]

2. Description of the Related Art With the advancement of devices, the wiring technology is progressing toward miniaturization and multilayering. However, high integration may cause a decrease in reliability. This is because the step of the interlayer insulating film becomes large and steep due to the miniaturization of wiring and the progress of multi-layering, and the processing accuracy and reliability of the wiring formed thereon are lowered. For this reason, it is necessary to improve the flatness of the interlayer flattening film, which is not able to largely improve the step coverage of the Al wiring.

So far, various insulating film forming techniques and planarizing techniques shown in the following table have been developed (Press Journal, monthly monthly Semiconductor).
World Nov 1989, p. 81).

[0004]

[Table 1]

Conventionally, as a technique for forming and flattening this type of insulating film, as shown in the above table, for example, a method of performing chemical vapor deposition (hereinafter referred to as CVD) using an organic silane-based gas, and film formation. At the same time, the bias sputter and the bias ECR CVD technology are performed to obtain an angle by performing sputter etching.
Various types of flattening technology for applying SOG (Spin On Glass), flattening technology for softening a film by heat treatment, and etch back method are known.

However, when these conventional techniques are applied to a fine and multi-layered wiring layer, lack of flattening in a place where the wiring interval is wide and "sun" (hollow) in the interlayer film at the wiring interval occur. , Connection failure between wirings has become a serious problem.

Therefore, as a means for improving this problem,
A technique for flattening an Al wiring having a high aspect ratio by plasma CVD of an organic silane added with water has been attracting attention. For this kind of technology, for example, the Japan Society of Applied Physics 19
It is described in the proceedings of the 38th Joint Lecture of Applied Physics, 1991 (Page 632, 29P-V-8, 29P-V-9). However, when water is added, the concentration of hydroxyl groups in the film and the concentration of alcohol, which is a side reaction product in the reaction system, are high, so cracks occur due to a large thermal contraction rate during subsequent annealing. For this reason, there is a concern that the reliability of the multi-layer wiring may be reduced. On the other hand, in an attempt to improve the film quality, a low hydroxyl group content was measured by a CVD method (Japanese Patent Laid-Open No. 3-116835) using an organic silane and an inorganic acid, which are said to undergo hydrolysis to reduce hydroxyl groups, as source gases. It has been reported that an interlayer flattening film can be formed.

However, on the contrary, when a hydrogen donor typified by an inorganic acid is added, it is also reported that the concentration of hydroxyl groups in the system increases sharply because the proton acts as a catalyst for hydrolysis and the hydrolysis proceeds rapidly. I am (Journal of N
on-Crystallin Sods 63 (198)
4) 13-21 North-Holland. Amst
erdam). Therefore, it is considered that problems such as high shrinkage rate and high hygroscopicity in heat treatment regarding film quality have not been solved.

Further, in order to form a reaction product having a high molecular weight on the surface of the wafer so as to obtain a self-flow shape (which means that the film formation itself is flat without requiring a flattening means). It is considered that the addition of an inorganic acid has a very high hydrolysis rate and preferentially produces a low-molecular-weight hydrolyzate, which hinders polymerization and makes it difficult to obtain a self-flow shape.

Therefore, at the present time when it is required to improve the step coverage by self-flow, it is necessary to form a reaction product having a high molecular weight on the surface of a wafer, and the dehydration condensation rate is higher than the hydrolysis rate. There is a need for the addition of catalysts that can be significantly improved. There is also a need for a film forming means capable of performing a good film forming reaction in the reaction chamber of a CVD apparatus without generating particles or the like when such a catalyst is added to the source gas. Furthermore, there is a strong demand for a technique for reducing the desorbed gas from the film, which adversely affects the formation of wiring.

The problem to be solved by the present invention lies in what kind of means should be taken to achieve a good film formation without the problem of particles and the like in the CVD accompanied by the addition of a catalyst. is there. Further, what kind of means should be taken to obtain a semiconductor device including a flat interlayer insulating film having a good low hydroxyl group concentration.

[0012]

In order to solve such a problem, a film forming method, a film forming apparatus, and a method for manufacturing a semiconductor device as described below have been devised.

In the invention according to claim 1 of this application, a raw material gas and a reaction catalyst gas are introduced into a reaction chamber to form a CVD film.
In the film forming method formed by the method, at least one kind of raw material gas is introduced into the reaction chamber from a gas supply port different from the gas supply port of the reaction catalyst gas.

In the invention according to claim 2, the source gas contains at least an organic silicon compound, and at least one of the source gases is introduced when the source gas and the reaction catalyst gas are introduced into the reaction chamber. The film forming method is configured to be introduced through a gas supply port different from the reaction catalyst gas.

Further, in the invention according to claim 3, a source gas (including a case of adding an organic silicon compound) and a reaction catalyst (including a case of a basic reaction catalyst) gas are introduced into a reaction chamber. At this time, at least one kind of the source gas is introduced from a gas supply port different from the reaction catalyst gas, which is the configuration of the film forming method.

The invention according to claim 4 of this application is a film forming apparatus for introducing a source gas and a reaction catalyst gas into a reaction chamber to form a film by a CVD method, wherein the reaction chamber has a plurality of gas supply ports. In addition, at least one of the raw material gases is introduced into the reaction chamber from a gas supply port different from the gas supply port of the reaction catalyst gas.

According to a fifth aspect of the present invention, there is provided a film forming apparatus for introducing a raw material gas containing at least an organic silicon compound and a reaction catalyst gas into a reaction chamber, wherein The film forming apparatus is configured so that the gas supply port is a gas supply port different from the reaction catalyst gas.

Further, in the invention according to claim 6, a raw material gas (including a case of adding an organic silicon compound) and a reaction catalyst (including a case of a basic reaction catalyst) are introduced into a reaction chamber. In a film forming apparatus for forming a film by a CVD method, a reaction chamber has a plurality of gas supply ports and at least one kind of raw material gas is introduced into the reaction chamber from a gas supply port different from a reaction catalyst gas. It is configured to do.

The invention according to claim 7 of this application is a method of manufacturing a semiconductor device, which comprises a step of introducing a source gas and a reaction catalyst gas into a reaction chamber to form an interlayer insulating film on a semiconductor substrate by a CVD method. In above, at least one kind of raw material gas is introduced into the reaction chamber from a gas supply port different from the gas supply port of the reaction catalyst gas.

In the invention according to claims 1 to 7, the raw material gas may be one kind or two or more kinds.

The invention according to claim 8 comprises a step of forming an interlayer insulating film on a semiconductor substrate by performing a CVD method using an introduction gas containing at least an organic silicon compound gas, water and a basic reaction catalyst. The provision is the configuration of the method for manufacturing a semiconductor device.

The invention according to claim 9 includes a step of forming an interlayer insulating film on a semiconductor substrate by performing a CVD method using an introduction gas containing at least an organic silicon compound gas, water and a hydrazine derivative. This is the configuration of the method for manufacturing a semiconductor device.

Further, the invention according to claim 10 is an introduction gas containing at least an organosilicon compound gas and an aqueous solution in which a basic reaction catalyst (including a hydrazine derivative) is dissolved in water. Using the CVD method,
The method of manufacturing a semiconductor device includes the step of forming an interlayer insulating film on a semiconductor substrate.

Further, the invention according to claim 11 uses an introduction gas containing at least an organic silicon compound gas, water and a basic reaction catalyst (including an aqueous solution) such as a hydrazine derivative and an oxidizing gas. The method of manufacturing a semiconductor device includes a step of forming an interlayer insulating film on a semiconductor substrate by performing a CVD method by using a CVD method.

The invention according to claim 12 is the introduction gas (oxidizing gas is not included) containing at least an organic silicon compound gas, water, and a basic reaction catalyst (including an aqueous solution) having at least an amino group. The method of manufacturing a semiconductor device includes a step of forming an interlayer insulating film on a semiconductor substrate by performing a CVD method using (including the case of adding).

The invention according to claim 13 of this application is
CVD on a semiconductor substrate using a source gas that does not contain water
Forming a lower layer insulating film by a CVD method, and then forming a middle layer insulating film on the surface of the lower layer insulating film by a CVD method using a source gas containing an organic silicon compound gas and an oxidant, and then forming a middle layer insulating film. The method of manufacturing a semiconductor device has a step of forming an upper insulating film on the surface of the substrate by a CVD method using a source gas containing no water.

Further, the invention of claim 14 forms a lower insulating film on a semiconductor substrate by a CVD method using a raw material gas containing no water, and an organic silicon compound gas and water are formed on the surface of the lower insulating film. A step of forming an intermediate insulating film by a CVD method using a source gas containing (oxidizer) and then forming an upper insulating film on the surface of the intermediate insulating film by a CVD method using a source gas containing no water Is provided in the structure of the method for manufacturing a semiconductor device.

Further, in the invention according to claim 15, after the lower insulating film is formed on the semiconductor substrate by a CVD method using a raw material gas containing no water, an organic silicon compound is formed on the surface of the lower insulating film. C using a source gas containing a gas, an oxidant (including water) and a basic reaction catalyst
A method of manufacturing a semiconductor device, comprising the step of forming an intermediate insulating film by a VD method and then forming an upper insulating film by a CVD method on a surface of the intermediate insulating film by using a source gas containing no water. It is configured.

The raw material gas in the inventions according to claims 1 to 7 and the organosilicon compound gas in the inventions according to claims 8 to 15 are, for example, TE.
OS {Tetra Ethoxy Ortho Sil
It is preferable to use a Si alkoxide such as ane: Si (OC ₂ H ₅ ) ₄ }. Preferred S including TEOS
i alkoxides and other usable organic silicon compounds are alkoxysilanes, alkoxyacetoxysilanes, chain polysiloxanes, and cyclic polysiloxanes of 4
The types are listed below.

(Alkoxysilanes) Tetramethoxysilane: Si (OCH ₃ ) ₄ Tetraethoxysilane: Si (OC ₂ H ₅ ) ₄ Tetraisopropoxysilane: Si (i-OC ₃ H ₇ ) ₄ Tetratertiary Butoxysilane : Si (t-OC
₄ H ₉ ) ₄ (Alkoxyacetoxysilanes) Diisopropoxydiacetoxysilane: Si (OC
₃ H ₇ ) ₂ (OCOCH ₃ ) ₂ (DADBS) (Chain polysiloxanes) Hexatimethyldisiloxane: Si ₂ C ₆ H ₁₈ O (HMD
S) (Cyclic polysiloxanes) Octamethylcyclotetrasiloxane: Si ₄ C ₈ H ₂₄ O
₂ (OMCTS) Tetramethylcyclotetrasiloxane: Si ₄ C ₄ H ₁₆ O
₄ (TOMCATS) Further, as the reaction catalyst, a catalyst capable of controlling hydrogen ion concentration, for example, a basic catalyst can be used, and as such a compound, a compound having an amino group such as ammonia, an alkylamine or a hydrazine derivative can be used. Can be mentioned.

Conventionally, in the CVD technique using a mixed gas system, it has been recommended to premix the raw material gas as much as possible before introducing the gas into the reaction chamber. This is because the mixing allows rapid and uniform film formation. Against this background, CVD
In the art, it is considered that the idea of the invention of the present application, in which the gas introduction is separated and separated, has not been conventionally made.

According to a sixteenth aspect of the present invention, in a method for forming a film on a semiconductor substrate by a chemical vapor deposition method, a film is formed on the semiconductor substrate at least once using an organic silicon compound and an oxidizing agent. When performing the above, the solution is to plasma-treat the surface of the object to be processed in advance before the film formation.

According to a seventeenth aspect of the present invention, in a method for forming a film on a semiconductor substrate by a chemical vapor deposition method, the film is formed on the semiconductor substrate at least once using an organic silicon compound and an oxidizing agent. When performing the above, the solution is to include at least a step of applying an organic solvent to the surface of the object to be processed in advance, prior to the film formation.

The invention of claim 18 is characterized in that, in claim 16 or 17, at least H ₂ O is used as the oxidizing agent.

[0035]

In the invention according to claim 1 of this application, at least one of the film-forming raw material gases is introduced into the reaction chamber through a gas supply port different from that of the reaction catalyst gas, so that the catalytic action occurs before the reaction chamber. Is not done. Therefore, it is possible to prevent particles from being generated due to the reaction occurring before the portion requiring the film forming reaction. Further, the reaction catalyst exhibits its catalytic action for the first time in the reaction chamber, so that a good film formation reaction is performed.

Further, in the second aspect of the present invention, in addition to the upper action, the raw material gas contains at least an organic silicon compound, so that the reaction catalyst gas has an action of improving the speed of the dehydration condensation reaction.

Further, in the invention according to claim 3,
Since the reaction catalyst is a basic reaction catalyst, the dehydration condensation reaction rate can be significantly improved. Therefore, a film made of a reaction product having a high molecular weight can be formed, and step coverage due to self-flow can be improved.

In the invention according to claim 4 of this application, at least one of the film-forming raw material gases is introduced into the reaction chamber from a gas supply port different from the reaction catalyst gas, and therefore is introduced into the reaction chamber. Until then, no catalytic action is established and no reaction product is formed. Therefore, the reaction products are not introduced into the reaction chamber as particles, and the reaction catalyst exhibits its catalytic action for the first time in the reaction chamber, and a good film formation reaction is performed.

Further, in the invention according to claims 5 and 6, in addition to the action of the invention according to claim 4,
It has the effect of promoting the strength of the dehydration condensation reaction.
A reaction product film having a high molecular weight can be formed. Such films have improved self-flow step coverage.

In the invention according to claim 7 of this application, at least one of the film-forming raw material gases is introduced into the reaction chamber through a gas supply port different from the reaction catalyst gas, so that it is introduced into the reaction chamber. Until then, no catalytic action is established and no reaction product is formed. Therefore, the reaction products are not introduced into the reaction chamber as particles, and the reaction catalyst exhibits its catalytic action only in the reaction chamber, and a good interlayer insulating film is formed.

In the invention according to claim 8 of this application, by adding a basic reaction catalyst to the introduced gas in the CVD method, the dehydration condensation reaction rate is improved as compared with the hydrolysis reaction rate, and It is possible to reduce the hydroxyl group concentration in the insulating film and improve the film quality. By thus reducing the concentration of hydroxyl groups in the film, it is possible to prevent the shrinkage rate and the hygroscopicity in the heat treatment from increasing. Also,
As described above, since the dehydration condensation rate is improved as compared with the hydrolysis rate, the molecular weight of the reaction product forming the interlayer insulating film can be increased. Therefore, the self-flowing shape of the interlayer insulating film is easily obtained, and the interlayer insulating film of the semiconductor device can be flattened.

Further, in the invention according to claim 9, by using the hydrazine derivative as the basic reaction catalyst, the same effect as that of the invention according to claim 8 can be obtained.

Further, in the invention according to claim 10, even if the basic reaction catalyst is introduced in the form of an aqueous solution by using, for example, the bubbling method, the same effect as that of the invention according to claim 8 can be obtained.

Furthermore, in the invention according to the eleventh aspect, it is possible to improve the rate of the dehydration condensation reaction as compared with the rate of the hydrolysis reaction and to reduce the concentration of hydroxyl groups in the film. Therefore, it is possible to prevent the shrinkage rate and hygroscopicity of the interlayer insulating film from increasing due to the heat treatment.

In the invention according to the twelfth aspect, the basic catalyst having an amino group improves the rate of the dehydration condensation reaction, achieves the polymerization of the reaction product, and obtains a flat surface having a self-flow shape. The shape of the interlayer insulating film becomes possible. For this reason, it is possible to manufacture a highly reliable semiconductor device in which the wiring is miniaturized and multilayered.

In the invention according to claims 13 to 15 of this application, the upper and lower insulating films are formed by CVD with a raw material gas containing no water.
Since the film is formed by the method, for example, the concentration of hydroxyl groups in the film and the concentration of alcohol as a side reaction product are low, so that the thermal shrinkage rate during annealing is small and the occurrence of cracks can be suppressed. Further, since the middle-layer insulating film is formed by the CVD method using the raw material containing the organic silicon compound gas and the oxidizing agent (for example, water), a flat insulating film can be formed. With such an upper / middle / lower laminated structure, the film quality of the middle-layer insulating film is not supplemented by the upper / lower-layer insulating film, and an effect of suppressing degassing from the middle-layer insulating film is exhibited.

The invention according to claim 16 of this application is
Using an organosilicon chemical and an oxidizer, especially in a system with a basic catalyst added to improve flatness and film quality,
A film having a self-flowing shape can be stably formed regardless of the underlying layer.

In the inventions according to claims 17 and 18 of this application, as apparent from the system of O ₃ / TEOSCVD under normal pressure system, the organic solvent is applied to the surface of the substrate to be treated before film formation. Although there are various theories about the principle mechanism, it is not clear that, for example, the entire surface can be made hydrophobic, fluidity can be increased, and dependency on the substrate can be eliminated. This principle is also effective for an oxidizer / TEOS system using plasma and a system to which a basic catalyst is added. Also, by exposing the film to an atmosphere of an organic solvent before film formation, for example, the entire surface can be made hydrophobic, the fluidity can be increased, and the dependency on the base can be eliminated. Similarly, this principle is also effective for an oxidizer / TEOS system using plasma and a system to which a basic catalyst is further added.

[0049]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. However, it should be understood that the present invention is not limited to the illustrated embodiments.

Example 1 In this example, when an organic silicon compound, particularly Si alkoxide is used as one of the source gases and a CVD film is formed using a basic reaction catalyst, a semiconductor device is formed. The invention of the present application is applied.

That is, in this embodiment, Si is formed at the time of forming an insulating film.
Reaction of the film formation reaction when a reaction catalyst is added to the alkoxide to cause the catalyst reaction to occur on the surface of the wafer that is the film formation substrate, and in the case of a process using a commonly used parallel plate plasma CVD apparatus. The present invention is embodied such that the catalyst and the material gas to be used are separated and introduced into the reactor.

FIG. 1 shows the CVD apparatus used in this embodiment. It should be noted that there is no particular limitation on the configuration of the substrate wafer mounting and the devising of the usage method.

In FIG. 1, an introduction pipe 12 for introducing an organic Si compound (for example, TEOS) and oxygen gas as an oxidant in the direction of arrow B1 is provided above the reaction chamber 11. The reaction chamber 11 is provided with a dispersion plate 13 and a shower head 14 capable of uniformly dispersing the introduced gas so as to ensure high in-plane uniformity.

Further, inside the reaction chamber 11, a wafer mounting table 16 on which a wafer 15 as a substrate to be processed is mounted is accommodated. Further, a heater 17 for keeping the wafer 15 at a predetermined reaction temperature is embedded.

In this example, ammonia (NH ₃ ) serving as a basic reaction catalyst that enables the reaction product of TEOS having a high molecular weight to be formed on the wafer surface in the H ₂ O-TEOS plasma CVD apparatus is used. , Reaction chamber 11 as shown in FIG. 1 so that it can be mixed on the wafer surface.
A gas introduction ring 18 is provided inside.

In this embodiment, the reaction catalyst can be added on the surface of the wafer, the dehydration condensation reaction of H ₂ O-TEOS system can effectively proceed, and a good insulating film can be formed. .

The interlayer insulating film was formed under the following conditions.

Gas flow rate TEOS / O ₂ / H ₂ O / NH ₃ = 150/150/100/10 (sccm) Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W Particle generation was suppressed by this example. Film formation was achieved. The particle generation situation in the case of the present embodiment and in the case of using the comparative apparatus of FIG. 6 in which the reaction catalyst gas is not separated (in FIG. 6, the same reference numerals as those in FIG. 1 indicate the corresponding components) are described below. It shows in Table 2. This is indicated by the number of particles having a diameter of 0.3 μm or more generated in the film forming portion on the wafer having a diameter of 125 nm when the film thickness of SiO ₂ film was 200 nm.

[0059]

[Table 2]

(Embodiment 2) Like Embodiment 1, this embodiment is an application of the present invention to the case of forming an interlayer insulating film in H ₂ O-TEOS plasma CVD. As shown in FIG. A double pipe 12a is used as an introduction pipe for the hydrolysis catalyst and the raw material gas, and these are added. From the inside of the double pipe 12a, T which is a raw material gas for film formation is
EOS and O ₂ are introduced by an arrow B1, and methylamine (CH ₃ N ₃₎ as a reaction catalyst is introduced from the outside of the double tube 12b.
H ₂ ) aqueous solution is introduced.

In this embodiment, the dehydration condensation reaction effectively proceeds, and a good insulating film can be formed.

The layer tube insulating film was formed under the following conditions.

Pressure 1330 Pa (10 Torr) Temperature 200 ° C. RF 300 W In this example, methylamine was used as the organic base.
Any organic base soluble in water can be appropriately changed. For example, ethylamine, isopropylamine and the like can be used.

(Embodiment 3) In this embodiment, the apparatus shown in FIG. 3 was used. That is, the reaction gas TEOS and the catalyst gas N
In order to mix H ₃ as close to the wafer as possible, two gas introduction rings were installed so that the polymer could be effectively formed.

In FIG. 3, two gas introduction rings 18a and 18b are shown, and TEOS is connected to the ring 1 from the ring 18a.
NH ₃ was introduced from 8b. As a result, the two gases are mixed in the film formation reaction section between the shower head 14 and the wafer 15, and an efficient, particle-free reaction proceeds.

(Embodiment 4) This embodiment is an example in which the present invention is applied to flatten the Al wiring layers. Figure 4 (a)
As shown in FIG. 2, an interlayer insulating film 22 made of silicon oxide and an Al wiring layer 2 are formed on a semiconductor substrate 21 made of silicon.
A wafer on which No. 3 was formed was prepared.

Next, as shown in FIG. 4B, a lower layer insulating film 24 was formed on the exposed surface of the interlayer insulating film 22 and the surface of the Al wiring layer 23. This lower insulating film 24 was formed for the purpose of compensating for the film quality of the plasma CVD film by the addition of the alkaline aqueous solution in the next step.

The lower insulating film 24 is formed by using an organic Si compound (here, tetraethoxysilane is used). The interlayer insulating film was formed by using the polishing apparatus shown in FIG. 1 under the following conditions.

Gas and its flow rate TEOS / O ₂ = 350/350 sccm Pressure: 1330 Pa (10 [torr]) Temperature: 390 ° C. RF: 350 w Next, as shown in FIG. 25 was formed under the following conditions to which an alkaline aqueous solution was added.

Gas and its flow rate TEOS / O ₂ / H ₂ O / NH ₃ = 350/350/10
sccm ◯ pressure ... 1330 Pa (10 [torr]) ◯ temperature ... 120 ° C. ◯ RF ... 350 w Note that the ammonia water concentration was 5% under the above conditions.

The organic silane and the inorganic base are used for the wafer 15
Separate inlet tubes (TE
OS / O ₂ is supplied to the reaction chamber through the introduction pipe 12 and ammonia water is supplied through the gas introduction ring 18). In this embodiment, the amount of water added is TEOS with respect to TEOS:
Although H ₂ O is set to 350: 10, it is not limited to this mixing ratio and may be about 10/1 ≦ TEOS / H ₂ O ≦ 100/1.

Although ammonia water was used in this example, the ammonia concentration is a reaction catalyst for the dehydration condensation reaction, so there is no particular problem if the concentration is 0.1% or more with respect to the added water.

By setting the mixing ratio of TEOS and the inorganic base in this way, the inorganic base does not remain in the intermediate insulating film 25 in an unreacted state, and the base allows the film quality of the intermediate insulating film 25 to be improved. Is prevented from decreasing.

Next, as shown in FIG. 4D, the upper insulating film 26 is formed under the same conditions as the lower insulating film 24 is formed so as to have a required film thickness, and the interlayer flattening is completed.

The lower limit of the reaction temperature is 100 ° C. or higher from the viewpoint of removing the added ammonia water, and the upper limit is 500 ° C. or lower from the viewpoint of reliability of the aluminum wiring layer, and particularly 200 ° C. or lower. 100 ° C. to 200 ° C. is most desirable because a self-flow shape can be obtained at low temperature.

Although tetraethoxysilane was used for forming the interlayer film, it can be appropriately changed to an organic Si compound capable of forming an insulating film, for example, OMCTS (octa).
methyl cycletera siloxa
ne), TPOS (tetra propoxy si)
lane), TMCTS (Tetra methyl)
It is also possible to use y clo tetra siloxane) or the like.

(Embodiment 5) In this embodiment, the gap between Al wiring layers is flattened. In particular, the etching back process is performed in order to leave the middle-layer insulating film formed by adding an inorganic base in addition to Example 4 only in the Al wiring gap. As a result, the interlayer insulating film having a high reliability is formed by removing as much as possible the middle-layer insulating film whose film quality is slightly inferior to that of the interlayer insulating film formed by the conventional method.
As shown in FIG. 5A, after an interlayer insulating film 32 made of silicon oxide or the like is formed on a semiconductor substrate 31 made of silicon or the like, and an Al wiring layer 33 is formed thereon, an Al wiring layer 33 is formed by a resist process. A wafer processed by etching was prepared.

Next, as in Example 1, after forming the lower insulating film 34 as shown in FIG. 5B, an organic alkaline aqueous solution (CH ₃ NH ₂ ) was added by the bubbling method under the following conditions. The middle insulating film 35 was formed.

Next, by etching under the following conditions, the extra middle-layer insulating film 35 was removed and left in the Al wiring gap as shown in FIG. 5C.

The etch back conditions were as follows.

Gas and its flow rate CF ₄ / O ₂ = 100/8 sccm Pressure ... 339 Pa (300 (mtorr)) RF ... 450 w Then, as shown in FIG. 3 (b), a predetermined film thickness is obtained. The interlayer film 36 is formed under the same conditions as the interlayer film 34 is formed, and the interlayer flattening is completed.

In this embodiment, methylamine was used as the organic base, but any organic base soluble in water can be appropriately changed. For example, ethylamine, isopropylamine and the like can be considered.

(Embodiment 6) In this embodiment, H ₂ O-TEO is used.
It is characterized in that a hydrazine derivative is added as a base catalyst capable of forming a reaction product of TEOS having a high molecular weight on the wafer surface in S plasma CVD. According to this embodiment, H ₂ O-TEO is formed on the wafer surface.
The S-type dehydration condensation reaction effectively proceeds, and a good insulating film can be formed.

The present embodiment is a case where the Al wiring layers are flattened, and the structure is the same as that of FIG. 4 used in the above-mentioned Embodiment 4, so that it will be explained using FIG. As shown in FIG. 4A, a wafer was prepared in which a laminated tube insulating film 22 made of silicon oxide and an Al wiring layer 23 were formed on a semiconductor substrate 21 made of silicon.

Next, as shown in FIG. 4B, a lower insulating film 24 was formed. The interlayer insulating film 24 was formed for the purpose of supplementing the plasma CVD film by adding a basic gas in the next step.

Next, as shown in FIG. 4C, the intermediate insulating film 25 was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / N ₂ H ₄ = / 150/100/10 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W Then, the required film thickness as shown in FIG. 4 (d). As described above, the upper insulating film 26 is formed under the same conditions as those for forming the lower insulating film 24, and planarization between layers is completed.

Although tetraethoxysilane was used for forming the interlayer insulating film, organic S that can form an insulating film is used.
i compound can be appropriately changed, for example, OMCTS (oc
tametyl cycletela silox
ane), TPOS (tetra propoxys)
ilane) or the like is also possible.

Further, with respect to the method of adding the hydrazine derivative, in this embodiment, the raw material gas was mixed and introduced in advance. However, in order to prevent the generation of particles, the hydrazine derivative was prepared by using an apparatus as shown in FIGS. It is also conceivable to separately introduce the above into the reaction chamber.

(Embodiment 7) In this embodiment, an etching back process is carried out in order to leave the middle-layer insulating film formed by adding a hydrazine derivative in addition to Embodiment 6 only in the Al wiring gap. Thereby, the interlayer insulating film having a high reliability is formed by removing as much as possible the middle-layer insulating film whose film quality is slightly inferior to that of the interlayer insulating film formed by the conventional method. Since this embodiment is not applied to the same structure as the above-mentioned fifth embodiment, it will be described with reference to FIG.

As shown in FIG. 5A, after the Al insulating layer 33 is formed on the interlayer insulating film 32 made of silicon oxide or the like on the semiconductor substrate 31 made of silicon or the like, the Al wiring layer 33 is formed by the resist process. A wafer processed by etching was prepared.

Next, as in Example 6, after forming the lower insulating film 34 as shown in FIG. 5 (b), an intermediate insulating film was prepared under the following conditions in which an aqueous solution of methylhydrazine as a hydrazine derivative was previously dissolved in water. 35 was formed.

Gas flow rate TEOS / H ₂ O / CH ₃ N ₂ H ₃ = / 150/100/10 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W Next, by etching back under the following conditions, FIG.
Excessive interlayer insulating film 35 is removed as shown in FIG.
l left in the wiring gap.

The etch back conditions were as follows.

CP ₄ / O ₂ = 100/8 sccm Pressure = 399 Pa (300 mTorr) RF = 450 W Next, as shown in FIG. 5D, the upper insulating film 36 and the lower insulating film 34 are formed to have a predetermined film thickness. The layers are formed under the same conditions as described above, and the planarization between the layers is completed.

In this example, methylhydrazine was used as the hydrazine derivative, but it can be appropriately changed if it is soluble in water. For example, dimethylhydrazine, trimethylhydrazine, ethylhydrazine and the like are considered.

(Embodiment 8) In this embodiment, the Al wiring layers are flattened. This embodiment can also be applied to the same structure as that of the above-mentioned fourth embodiment, and therefore will be described with reference to FIG.

As shown in FIG. 4A, a wafer was prepared in which a layer tube insulating film 22 made of silicon oxide or the like and an Al wiring layer 23 were formed on a semiconductor substrate 21 made of silicon or the like. Next, as shown in FIG. 4B, the lower insulating film 24 was formed. The interlayer insulating film 24 was formed for the purpose of supplementing the basic gas-added plasma CVD film quality in the next step. The lower insulating film 24 was formed by an ordinary method using an organic Si compound (here, tetraethoxysilane).

The intermediate insulating film 25 was formed under the following conditions using the apparatus shown in FIG.

Gas flow rate TEOS / H ₂ O / NH ₃ = 150/100/10 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W Intermediate layer insulation by setting such a mixing ratio of TEOS and inorganic base Since the deterioration of the film quality of the film 25 is prevented, the film quality of the intermediate interlayer insulating film 25 can be improved.

Then, as shown in FIG. 4D, the upper layer film 26 is formed by a conventional method so as to have a required film thickness, and the planarization between the layers is completed.

Although tetraethoxysilane was used for forming the interlayer film, it can be appropriately changed to an organic Si compound capable of forming an insulating film, for example, OMCTS (octa me).
tyl cycletera siloxan
e), TPOS (tetra propoxy sil)
ane), TMCTS (tetra methyl c)
It is also possible to use y clo tetra siloxane) or the like.

In this example, a basic substance was added as a reaction catalyst, but the system to which the basic substance is added is not particularly limited.

(Embodiment 9) In this embodiment, the Al wiring layers are flattened. In particular, an etching process was performed in order to leave the interlayer film formed by adding an inorganic base in addition to Example 8 only in the Al wiring gap. As a result, an interlayer insulating film having a high reliability is formed by removing as much as possible the interlayer film whose film quality is slightly inferior to that of the interlayer insulating film formed by the conventional method. Since this embodiment has the same film structure as that of the above-mentioned embodiment 5, it will be described with reference to FIG.

First, as shown in FIG. 5A, an Al wiring layer 33 is formed on a laminated tube insulating film 32 made of silicon oxide or the like on a semiconductor substrate 31 made of silicon or the like, and then Al is formed by a resist process. The wiring layer 33 was processed by etching to prepare a wafer. Next, as in Example 8, as shown in FIG. 5B, after forming the lower insulating film 34, the upper insulating film 35 was formed under the following conditions in which water and an organic basic gas were added.

Next, etching is carried out by a conventional method to remove an extra middle layer insulating film 35 as shown in FIG.
It was removed and left in the Al wiring gap.

Next, as shown in FIG. 5D, an upper insulating film 36 is formed by a conventional method so as to have a predetermined film thickness, and the planarization between the layers is completed.

The upper and lower insulating films 36 and 34 described above are used.
The film forming conditions (regular method) are as follows.

Gas flow rate TEOS / O ₂ = 350/350 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W In this example, methylamine was used as the organic base.
The organic base can be changed as appropriate. For example, ethylamine, isopropylamine and the like can be considered.

In particular, in this embodiment, the intermediate insulating film 3
By forming 5 with a source gas containing an oxidizing agent (water) and an organic Si compound gas (TEOS), a flat film having a self-flow shape could be obtained. Moreover, since the upper and lower insulating films 36 and 34 are films formed by a conventional method and having good film quality, the film quality of the intermediate insulating film could be supplemented.

(Embodiment 10) This embodiment is a case where the Al wiring layers are flattened by using the film forming apparatus shown in FIG. As shown in FIG. 6, a wafer was prepared in which an interlayer insulating film 42 made of silicon oxide and an Al wiring layer 23 were formed on a semiconductor substrate 41 made of silicon or the like. Therefore, the surface was plasma-treated under the following conditions.

Gas flow rate N ₂ = 300 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 200 W At this time, this plasma treatment formed, for example, a hydrophobic surface on the exposed surface of the substrate. This is indicated by 44 (the same applies hereinafter).
Next, the interlayer film 45 was formed.

The interlayer insulating film 45 was formed using the apparatus shown in FIG. 7 under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ = 150/100/10 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W Here, since plasma treatment is performed in advance, self-flow does not depend on the substrate. The shape was obtained.

By setting such a mixing ratio of TEOS and the inorganic base, the deterioration of the film quality of the interlayer flattening insulating film 45 is prevented, so that the film quality of the interlayer insulating film 45 can be improved. A flattening film can be formed.

Although tetraethoxysilane was used for forming the interlayer film, it can be appropriately changed to an organic silicon compound capable of forming an insulating film.

In this example, a basic substance was added as a reaction catalyst, but the system to which the basic substance is added is not particularly limited.
Also, the base catalyst is not limited to ammonia. For example, it is possible to use methylamine, ethylamine, isopropylamine, or the like as the organic base.

(Embodiment 11) This embodiment is also a case where the Al wiring layers are flattened. In this embodiment, it is applied to CVD in which RF power is intermittently supplied. First, the substrate surface is treated in the same manner as in Example 10. Next, an interlayer film was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ = 150/100/10 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W RF on / off 10 ″ on 5 ″ off Also in this case, plasma treatment is performed in advance. Therefore, the self-flow shape was obtained regardless of the base.

(Embodiment 12) This embodiment is also a case where the Al wiring layers are flattened. This embodiment is applied to LP-CVD that does not use plasma.

First, the substrate surface is treated in the same manner as in the tenth embodiment. Next, an interlayer film was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ = 50/30/3 sccm Pressure 0.6 Pa Temperature 375 ° C. Since plasma treatment is performed in advance, regardless of the substrate,
A self-flow shape was obtained.

(Embodiment 13) This embodiment is also a case where the Al wiring layers are flattened. This embodiment is also applied to atmospheric pressure CVD that does not use plasma.

First, the substrate surface is treated in the same manner as in the tenth embodiment. Next, an interlayer film was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ / He = 300/200/20/100 sccm Pressure normal pressure Temperature 300 ° C. In this case also, since plasma treatment is performed in advance, the self treatment is performed regardless of the substrate. A flow shape was obtained.

Although not shown in the drawings in Examples 12 and 13, ordinary LP-CVD and atmospheric pressure CVD equipment can be used.

(Embodiment 14) This embodiment is a case where the Al wiring layers are flattened by using the film forming apparatus shown in FIG. As shown in FIG. 6, a wafer was prepared in which an interlayer insulating film 42 made of silicon oxide and an Al wiring layer 23 were formed on a semiconductor substrate 41 made of silicon or the like. Therefore, prior to the formation of the interlayer film, the surface was coated with an organic solvent under the following conditions. Organic solvent Ethanol Use tool Normal spinner Rotation speed 2000 rpm Temperature room temperature Next, the interlayer film 45 was formed.

The interlayer insulating film 45 was formed using the apparatus shown in FIG. 7 under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ = 150/100/10 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W Here, since the organic solvent treatment is performed in advance, for example, the substrate surface is hydrophobic. And the self-flow shape was obtained regardless of the substrate.

By setting such a mixing ratio of TEOS and the inorganic base, it is possible to prevent the film quality of the interlayer flattening insulating film 45 from being deteriorated, so that the film quality of the interlayer insulating film 45 can be improved. A flattening film can be formed.

Although tetraethoxysilane was used for forming the interlayer film, it can be appropriately changed to an organic silicon compound capable of forming an insulating film.

In this example, a basic substance was added as a reaction catalyst, but the system to which the basic substance is added is not particularly limited.
Also, the base catalyst is not limited to ammonia. For example, it is possible to use methylamine, ethylamine, isopropylamine, or the like as the organic base.

(Embodiment 15) This embodiment is also a case where the Al wiring layers are flattened. In this embodiment, it is applied to CVD in which RF power is intermittently supplied. First, as in Example 14, the surface of the substrate is treated with an organic solvent. Next, an interlayer film was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ = 150/100/10 sccm Pressure 1330 Pa (10 Torr) Temperature 150 ° C. RF 350 W ON / OFF ratio 1: 1 (Example 16) Also in this example, Al wiring layers Is an example of flattening. This example was applied to low pressure CVD without using plasma.

First, the substrate surface is processed in the same manner as in the fourteenth embodiment. Next, an interlayer film was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ = 50/30/3 sccm Pressure 0.6 Pa Temperature 375 ° C. In this case as well, since the organic solvent treatment is performed in advance, the self-flow shape does not depend on the substrate. was gotten.

(Embodiment 17) This embodiment is also an example in which the Al wiring layers are flattened. This embodiment is also applied to atmospheric pressure CVD that does not use plasma.

First, the substrate surface is treated in the same manner as in the fourteenth embodiment. Next, an interlayer film was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ / He = 300/200/20/100 sccm Pressure normal pressure Temperature 300 ° C. Also in this case, since the organic solvent treatment is performed in advance, regardless of the substrate, A self-flow shape was obtained.

(Embodiment 18) This embodiment is also an example in which the Al wiring layers are flattened. In this example, a method of exposing the substrate to be treated to an organic solvent atmosphere was used.

First, there are various methods of exposing the substrate to be treated before forming the interlayer film to the ethanol atmosphere. Here, a normal organic draft is made into a 100% ethanol atmosphere, and the substrate to be treated is placed therein. The simple method of putting in was used. The surface of the substrate is treated for 10 minutes by this method.

Next, an interlayer film was formed under the following conditions.

Gas flow rate TEOS / H ₂ O / NH ₃ = 50/30/3 sccm Pressure 0.6 Pa Temperature 375 ° C. Here again, since the organic solvent treatment is performed in advance, the self-flow shape does not depend on the substrate. Was obtained.

Although not shown in the drawings in Examples 16 and 17, ordinary reduced pressure and normal pressure CVD apparatus can be used.

The typical embodiments of the present invention have been described above. However, the present invention is not limited to these, and various modifications can be made based on the gist of the configuration.

[0146]

According to the inventions according to claims 1 to 7 of the present application, in spite of using a reaction catalyst, generation of particles is prevented to enable a good film formation, and the hydrolysis reaction It is possible to significantly improve the dehydration condensation reaction speed as compared with the speed, and to provide a flattening insulating film having a high molecular weight and a self-flow shape.

Further, according to the inventions according to claims 8 to 12 of this application, there is an effect that a good leveling insulating film having a low hydroxyl group concentration can be formed, and as the film quality becomes better, shrinkage in heat treatment This has the effect of preventing an increase in the rate and an increase in the hygroscopicity. In addition, the dehydration condensation reaction of the organic Si compound can be smoothly progressed, and a good interlayer insulating film can be formed.

Further, according to the inventions according to claims 13 to 15 of this application, the flattening layer between layers is formed by the laminated structure, and the effect of reducing the desorbed gas is exhibited.

Further, according to the invention of claim 16 of this application, an effective silicon compound and an oxidizing agent are used, and in order to improve especially the flatness and the film formation, a system in which a basic catalyst is added is used. Irrespective of the above, a film having a self-flow shape can be stably formed. Therefore, super LS
I can be manufactured with a high yield in a reliable process.

Furthermore, a film in which a self-flow shape is stably obtained by using an organic silicon compound and an oxidizer, in which a basic catalyst is added in order to improve flatness and film formation, regardless of the underlying layer. Can be formed. Therefore, the VLSI can be manufactured with a high yield by a highly reliable process.

[Brief description of drawings]

FIG. 1 is a schematic explanatory diagram of a CVD apparatus used in Example 1 of the present invention.

FIG. 2 is a schematic explanatory diagram of a CVD apparatus used in Example 2 of the present invention.

FIG. 3 is a schematic explanatory diagram of a CVD apparatus used in Example 3 of the present invention.

4A to 4D are process cross-sectional views of a fourth embodiment of the present invention.

5A to 5D are process sectional views of a fifth embodiment of the present invention.

6A to 6D are process cross-sectional views of Example 10 of the present invention.

FIG. 7 is a schematic explanatory view of a conventional CVD apparatus.

[Explanation of symbols]

 11 ... Reaction chamber 12 ... Introduction pipe 12a ... Double pipe 15 ... Wafer 18, 18a, 18b ... Gas introduction ring 24 ... Lower insulating film 25 ... Middle insulating film 26 ... Upper insulating film 44 ... Hydrophobic layer

─────────────────────────────────────────────────── ───

[Procedure amendment]

[Submission date] August 12, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] Figure 6

[Correction method] Change

[Correction content]

FIG. 6 is a process sectional view of a tenth embodiment of the present invention.

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI Technical indication H01L 21/90 P 7514-4M M 7514-4M

Claims (18)

[Claims] 1. A film forming method for forming a film by a chemical vapor deposition method by introducing a source gas and a reaction catalyst gas into a reaction chamber, wherein at least one kind of the source gas is used as the reaction catalyst gas. The film forming method, wherein the gas is introduced into the reaction chamber through a gas supply port different from the gas supply port. 2. The film forming method according to claim 1, wherein the source gas contains at least an organic silicon compound. 3. The film forming method according to claim 1, wherein the reaction catalyst is a basic reaction catalyst. 4. A film forming apparatus for introducing a raw material gas and a reaction catalyst gas into a reaction chamber to form a film by a chemical vapor deposition method, wherein the reaction chamber has a plurality of gas supply ports. At least one kind of gas is introduced into the reaction chamber from a gas supply port different from the gas supply port of the reaction catalyst gas. 5. The film forming apparatus according to claim 4, wherein the source gas contains at least an organic silicon compound. 6. The film forming apparatus according to claim 4, wherein the reaction catalyst is a basic reaction catalyst. 7. A method for manufacturing a semiconductor device, which comprises a step of introducing a source gas and a reaction catalyst gas into a reaction chamber to form an interlayer insulating film on a semiconductor substrate by a chemical vapor deposition method. A method of manufacturing a semiconductor device, wherein at least one kind of gas is introduced into the reaction chamber through a gas supply port different from a gas supply port for the reaction catalyst gas. 8. A step of forming an interlayer insulating film on a semiconductor substrate by performing a chemical vapor deposition method using an introduction gas containing at least an organic silicon compound gas, water and a basic reaction catalyst. And a method for manufacturing a semiconductor device. 9. The method for manufacturing a semiconductor device according to claim 8, wherein the basic reaction catalyst is a hydrazine derivative. 10. The method of manufacturing a semiconductor device according to claim 8, wherein the water and the basic reaction catalyst are an aqueous solution in which the reaction catalyst is dissolved in the water. 11. The method of manufacturing a semiconductor device according to claim 8, wherein the introduced gas contains an oxidizing gas. 12. The method for manufacturing a semiconductor device according to claim 8, wherein the basic reaction catalyst has at least an amino group. 13. A lower insulating film is formed on a semiconductor substrate by a chemical vapor deposition method using a raw material gas containing no water, and then an organic silicon compound gas and an oxidant are formed on the surface of the lower insulating film. After forming the middle-layer insulating film by a chemical vapor deposition method using a source gas containing water, an upper insulating film is formed on the surface of the middle-layer insulating film by a chemical vapor deposition method using a source gas containing no water. A method of manufacturing a semiconductor device, comprising the step of forming. 14. The method of manufacturing a semiconductor device according to claim 13, wherein the oxidizing agent is water. 15. The method of manufacturing a semiconductor device according to claim 13, wherein the source gas of the intermediate insulating film contains a basic reaction catalyst. 16. A method for forming a film on a semiconductor substrate by a chemical vapor deposition method, wherein the film formation is performed on the semiconductor substrate at least once using an organic silicon compound and an oxidant. A film forming method characterized in that the surface of the object to be processed is subjected to plasma treatment prior to film formation. 17. A method of forming a film on a semiconductor substrate by a chemical vapor deposition method, wherein the film formation is performed on the semiconductor substrate at least once using an organic silicon compound and an oxidizing agent. A film forming method comprising at least a step of applying an organic solvent to the surface of the object to be processed in advance prior to the film formation. 18. The film forming method according to claim 16, wherein at least H ₂ O is used as the oxidizing agent.