JPH0629665A - Multilayer circuit board and manufacturing method thereof - Google Patents
Multilayer circuit board and manufacturing method thereofInfo
- Publication number
- JPH0629665A JPH0629665A JP20748192A JP20748192A JPH0629665A JP H0629665 A JPH0629665 A JP H0629665A JP 20748192 A JP20748192 A JP 20748192A JP 20748192 A JP20748192 A JP 20748192A JP H0629665 A JPH0629665 A JP H0629665A
- Authority
- JP
- Japan
- Prior art keywords
- wiring pattern
- insulating layer
- conductive
- circuit board
- columnar body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
(57)【要約】
【目的】 配線パターン間を接続する導通部の電気的導
通の信頼性を向上させ、多層回路基板の製造を効率的に
行うことを目的とする。
【構成】 層間に電気的絶縁層を介在させて配線パター
ンを多層に形成するとともに、層間に配線パターンを電
気的に接続する導通部を設けた多層回路基板において、
前記導通部が絶縁層16上に柱状に立設した絶縁体の表
面に導体金属膜22が被覆されて形成され、該導通部の
柱状体20の頂部の導体金属膜22が一方の配線パター
ン28に接続され、柱状体の外壁基部の前記導体金属膜
22が他方の配線パターン24に接続されたことを特徴
とする。
(57) [Abstract] [Purpose] An object of the present invention is to improve the reliability of electrical continuity of a conductive portion that connects wiring patterns and to efficiently manufacture a multilayer circuit board. A multi-layer circuit board in which a wiring pattern is formed in multiple layers with an electrically insulating layer interposed between the layers, and a conductive portion electrically connecting the wiring patterns is provided between the layers,
The conductive portion is formed by covering the surface of an insulator standing in a columnar shape on the insulating layer 16 with a conductor metal film 22. The conductor metal film 22 on the top of the columnar body 20 of the conductive portion is one wiring pattern 28. And the conductor metal film 22 on the outer wall base of the columnar body is connected to the other wiring pattern 24.
Description
【0001】[0001]
【産業上の利用分野】本発明は多層回路基板及びその製
造方法に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a multilayer circuit board and a method for manufacturing the same.
【0002】[0002]
【従来の技術】半導体素子を搭載する回路基板にはポリ
イミド等の電気的絶縁性を有する絶縁層を層間に介在さ
せて複数の配線パターンを層状に形成した、いわゆる薄
膜多層回路基板がある。この回路基板は微細な配線パタ
ーンを多層に形成することによって高速信号の伝播等を
可能にすること等を目的とするものである。図4は薄膜
形成によって多層に配線パターンを形成した状態を示
す。図で2は支持基板、3は絶縁層、4は配線パターン
である。絶縁層3をはさんだ配線パターン4間の電気的
接続は導通部5によってとられる。このような薄膜多層
回路基板を製造するには、支持基板2に所定パターンで
配線パターン4を形成し、その上にポリイミド等の電気
的絶縁体を薄膜状に形成して絶縁層を形成し、その絶縁
層上に導体薄膜を設けて配線パターンを形成するという
方法を順次続けていくことによって形成することができ
る。2. Description of the Related Art As a circuit board on which a semiconductor element is mounted, there is a so-called thin film multi-layer circuit board in which a plurality of wiring patterns are formed in layers with an insulating layer having electrical insulation such as polyimide interposed between layers. This circuit board is intended to enable propagation of high-speed signals and the like by forming fine wiring patterns in multiple layers. FIG. 4 shows a state in which wiring patterns are formed in multiple layers by thin film formation. In the figure, 2 is a support substrate, 3 is an insulating layer, and 4 is a wiring pattern. Electrical connection between the wiring patterns 4 sandwiching the insulating layer 3 is established by the conducting portion 5. In order to manufacture such a thin film multilayer circuit board, the wiring pattern 4 is formed on the support substrate 2 in a predetermined pattern, and an electrical insulator such as polyimide is formed in a thin film thereon to form an insulating layer, It can be formed by sequentially continuing the method of forming a wiring pattern by providing a conductive thin film on the insulating layer.
【0003】[0003]
【発明が解決しようとする課題】ところで、配線パター
ン4間は上記のように導通部5によって接続している
が、この導通部5を形成する場合、従来は絶縁層3に導
通孔をあけ、この導通孔内にアディティブ法によってめ
っきを盛り上げる方法や、導通孔内壁にスパッタ法によ
って導体金属膜を形成する方法が知られている。しかし
ながら、導通孔のアスペクト比が大きくなると、上記の
方法では配線パターンと導通部との接続の点で信頼性に
欠けるという問題点があった。これは、アスペクト比が
大きくなると絶縁層3をエッチングして導通孔を形成す
る際に絶縁体が導通孔内底面の配線パターン上面に残留
したり、後の加熱処理で下地金属が酸化すること等によ
ってめっきがつきにくくなることによる。また、スパッ
タ法では導通孔内壁あるいは導通孔の開口部近傍で断線
したり部分的に亀裂を生じることによる。By the way, the wiring patterns 4 are connected by the conducting portions 5 as described above. When the conducting portions 5 are formed, conventionally, a conducting hole is formed in the insulating layer 3, There are known a method of swelling plating in the conductive hole by an additive method and a method of forming a conductive metal film on the inner wall of the conductive hole by a sputtering method. However, when the aspect ratio of the conductive hole becomes large, the above method has a problem in that the connection between the wiring pattern and the conductive portion lacks reliability. This is because when the aspect ratio increases, the insulator remains on the wiring pattern upper surface on the inner bottom surface of the conductive hole when the insulating layer 3 is etched to form the conductive hole, or the underlying metal is oxidized by the subsequent heat treatment. This makes it difficult for plating to adhere. Further, in the sputtering method, wire breakage or partial cracking occurs in the inner wall of the conduction hole or in the vicinity of the opening of the conduction hole.
【0004】また、めっきによって導通部を形成する場
合には、めっき部分をめっき電極に導通させる必要があ
るが、従来は実装用のリードピンを介して導通をとって
いるため、この導通をとる作業が煩雑で製造工程が非効
率になるという問題点があった。そこで、本発明は上記
問題点を解消すべくなされたものであり、その目的とす
るところは、配線パターン間の電気的接続を確実にとる
ことができ、製造も容易な多層回路基板及びその製造方
法を提供するにある。Further, when the conductive portion is formed by plating, it is necessary to make the plated portion conductive to the plating electrode. However, since the conductive portion is conventionally made through the lead pin for mounting, the work for obtaining this conduction is performed. However, there is a problem in that the manufacturing process is inefficient and the manufacturing process becomes inefficient. Therefore, the present invention has been made to solve the above problems, and an object of the present invention is to provide a multilayer circuit board and its manufacture, which can ensure electrical connection between wiring patterns and are easy to manufacture. There is a way to provide.
【0005】[0005]
【課題を解決するための手段】本発明は上記目的を達成
するため次の構成を備える。すなわち、層間に電気的絶
縁層を介在させて配線パターンを多層に形成するととも
に、層間に配線パターンを電気的に接続する導通部を設
けた多層回路基板において、前記導通部が絶縁層上に柱
状に立設した絶縁体の表面に導体金属の膜が被覆されて
形成され、該導通部の柱状体の頂部の導体金属膜が一方
の配線パターンに接続され、柱状体の外壁基部の前記導
体金属膜が他方の配線パターンに接続されたことを特徴
とする。また、前記導通部が対向する配線パターンの層
間に介在する絶縁層を厚み方向に連絡する導通孔に形成
されるとともに、該導通孔の一方の配線パターンに面す
る内底面と該導通孔の内壁に導体金属膜が被覆されて形
成され、前記一方の配線パターンには前記内底面の導体
金属膜が接続され、他方の配線パターンには前記内壁に
設けた導体金属膜が接続され、前記導通孔内部が前記絶
縁層によって充填されたことを特徴とする。また、層間
に電気的絶縁層を介在させて配線パターンを多層に形成
するとともに、層間に配線パターンを電気的に接続する
導通部を設ける多層回路基板の製造方法において、第一
の配線パターン上に絶縁層を形成し、該絶縁層をエッチ
ングして前記配線パターンまで通じる導通孔を形成する
とともに、絶縁層上に絶縁体による柱状体を立設し、前
記絶縁層と柱状体の表面及び導通孔の内底面と内壁に導
体金属を形成して前記内底面、内壁および柱状体の頂
部、外壁に導体金属膜を形成するとともに前記絶縁層上
に第二の配線パターンを形成し、次いで、前記絶縁層上
にさらに絶縁層を形成し、該絶縁層上に導体金属で第三
の配線パターンを形成することによって、前記導通孔お
よび柱状体部分を導通部として配線パターンを多層に形
成することを特徴とする。The present invention has the following constitution in order to achieve the above object. That is, in a multi-layer circuit board in which a wiring pattern is formed in multiple layers with an electrically insulating layer interposed between layers, and a conductive portion electrically connecting the wiring patterns is provided between layers, the conductive portion is pillar-shaped on the insulating layer. A conductor metal film is formed on the surface of an insulator standing upright, and the conductor metal film on the top of the columnar body of the conducting portion is connected to one wiring pattern, and the conductor metal of the outer wall base of the columnar body is connected. The film is connected to the other wiring pattern. In addition, the conductive portion is formed in a conductive hole that connects an insulating layer interposed between the opposing wiring patterns in the thickness direction, and an inner bottom surface of the conductive hole facing one wiring pattern and an inner wall of the conductive hole. And a conductor metal film formed on the inner wall is connected to the one wiring pattern, and a conductor metal film provided on the inner wall is connected to the other wiring pattern. The inside is filled with the insulating layer. In addition, in the method for manufacturing a multilayer circuit board, in which a wiring pattern is formed in multiple layers with an electrically insulating layer interposed between the layers, and a conductive portion that electrically connects the wiring patterns is provided between the layers, a wiring pattern is formed on the first wiring pattern. An insulating layer is formed, the insulating layer is etched to form a conductive hole reaching the wiring pattern, and a columnar body made of an insulator is erected on the insulating layer. The insulating layer, the surface of the columnar body, and the conductive hole are formed. Forming a conductor metal on the inner bottom surface and the inner wall of the inner conductor, forming a conductor metal film on the inner bottom surface, the inner wall and the top of the columnar body, and the outer wall, and forming a second wiring pattern on the insulating layer, An insulating layer is further formed on the layer, and a third wiring pattern is formed on the insulating layer with a conductive metal, whereby a wiring pattern can be formed in multiple layers with the conduction holes and the columnar body portions as conduction portions. The features.
【0006】[0006]
【作用】配線パターン間で導通をとる場合に、絶縁層上
に絶縁体の柱状体を設け、絶縁層と柱状体を導体金属膜
で被覆することによって、柱状体に設けた導体金属膜が
導通部となって配線パターン間が接続される。導通孔を
設けたものでは導通孔の内底面および内壁に設けた導体
金属膜によって配線パターンが接続される。絶縁層に導
通孔を形成するとともに絶縁層上に柱状体を形成して導
体金属膜を形成することにより、当該絶縁層に配線パタ
ーンが形成されるとともに、この配線パターンの両側に
絶縁層を挟んで隣接する下層の配線パターンと上層の配
線パターンとを電気的に接続する導通部が容易に形成さ
れ、多層回路基板の効率的な製造が可能になる。When the conductive patterns are provided between the wiring patterns, a columnar body of an insulator is provided on the insulating layer, and the insulating layer and the columnar body are covered with the conductor metal film, so that the conductor metal film provided on the columnar body is electrically connected. As a part, the wiring patterns are connected. In the case where the conductive hole is provided, the wiring patterns are connected by the conductive metal film provided on the inner bottom surface and the inner wall of the conductive hole. By forming a conductive hole in the insulating layer and forming a columnar body on the insulating layer to form a conductor metal film, a wiring pattern is formed in the insulating layer and the insulating layer is sandwiched on both sides of this wiring pattern. Thus, the conductive portion that electrically connects the lower layer wiring pattern and the upper layer wiring pattern adjacent to each other can be easily formed, and the multilayer circuit board can be efficiently manufactured.
【0007】[0007]
【実施例】以下、本発明の好適な実施例を添付図面に基
づいて詳細に説明する。まず、図1に従って本発明に係
る多層回路基板の製造方法について説明する。図1で1
0は多層回路基板の支持基体で、はじめに、この支持基
体10上に第1層の配線パターン12を形成する。実施
例では支持基体10としてセラミック基板を用いている
が、配線パターン12は支持基体10にあらかじめメタ
ライズを施してめっきする方法、あるいは支持基体10
に導体金属を薄膜形成し、エッチングしてパターン形成
する方法等によって形成する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of the present invention will be described in detail below with reference to the accompanying drawings. First, a method for manufacturing a multilayer circuit board according to the present invention will be described with reference to FIG. 1 in FIG.
Reference numeral 0 is a support base for the multilayer circuit board. First, the wiring pattern 12 of the first layer is formed on the support base 10. Although a ceramic substrate is used as the support base 10 in the embodiment, the wiring pattern 12 is formed by metallizing the support base 10 in advance, or by plating the support base 10.
It is formed by a method of forming a thin film of a conductive metal on the substrate and forming a pattern by etching.
【0008】配線パターン12を形成することによって
その厚み分の段差が生じるから、配線パターン12と同
厚にポリイミド等の耐熱高分子からなる絶縁体パターン
14を施して配線パターン12による段差を解消する。
絶縁体パターン14を施した後、上層にポリイミドをコ
ーティングして絶縁層16を形成する。厚膜形成によっ
て配線パターンを何層にも形成していく場合には、各層
の表面にうねりが生じやすくなる。上記の絶縁体パター
ン14は絶縁層16の表面を平坦面に形成するために行
うものである。図1(a) は配線パターン12を形成し絶
縁体パターン14を施して絶縁層16を形成した状態で
ある。Since the wiring pattern 12 is formed with a step corresponding to the thickness thereof, the step due to the wiring pattern 12 is eliminated by applying an insulating pattern 14 made of a heat-resistant polymer such as polyimide to the same thickness as the wiring pattern 12. .
After applying the insulating pattern 14, the upper layer is coated with polyimide to form an insulating layer 16. When a wiring pattern is formed in multiple layers by forming a thick film, undulations are likely to occur on the surface of each layer. The insulating pattern 14 is used to form the surface of the insulating layer 16 into a flat surface. FIG. 1A shows a state in which the wiring pattern 12 is formed, the insulating pattern 14 is applied, and the insulating layer 16 is formed.
【0009】次に、上記絶縁層16をエッチングして第
1層の配線パターンの導通をとるための導通孔18を形
成する(図1(b) )。この導通孔18は従来の導通部形
成の場合と同様に、絶縁層16の下層の配線パターン1
2を露出させるまで絶縁層16をエッチングして形成す
る。導通孔18を形成した後、絶縁層16をキュアして
完全な絶縁層16を形成する。次に、絶縁層16上にポ
リイミドの柱状体20を形成する(図1(c) )。柱状体
20は絶縁層16にポリイミドを塗布すると共にエッチ
ングでパターン形成し、柱状体20を残すことによって
形成する。柱状体20は絶縁層16に形成する第2層の
配線パターン24と上層の第3層の配線パターン28と
を接続するためのものである。実施例では層間距離を大
きくとるため柱状体20は比較的厚く形成している。導
通孔18および柱状体20は配線パターンのパターニン
グに合わせて平面内の適宜位置に設けるもので、もちろ
ん複数個所に設けてよい。Next, the insulating layer 16 is etched to form a conductive hole 18 for conducting the wiring pattern of the first layer (FIG. 1 (b)). The conductive hole 18 is formed in the wiring pattern 1 under the insulating layer 16 as in the case of forming a conventional conductive portion.
The insulating layer 16 is formed by etching until 2 is exposed. After forming the conduction hole 18, the insulating layer 16 is cured to form the complete insulating layer 16. Next, a polyimide columnar body 20 is formed on the insulating layer 16 (FIG. 1 (c)). The columnar body 20 is formed by applying polyimide to the insulating layer 16 and forming a pattern by etching and leaving the columnar body 20. The columnar body 20 is for connecting the wiring pattern 24 of the second layer formed on the insulating layer 16 and the wiring pattern 28 of the upper third layer. In the embodiment, the columnar body 20 is formed relatively thick in order to increase the interlayer distance. The conduction hole 18 and the columnar body 20 are provided at appropriate positions in the plane according to the patterning of the wiring pattern, and of course, may be provided at a plurality of places.
【0010】柱状体20を形成した後、導体金属をスパ
ッタリングして絶縁層16の上面と導通孔18、柱状体
20の全面に導体金属膜22を形成する。図1(d) は導
体金属膜22を形成した後、導体金属膜22をパターニ
ングして第2層の配線パターン24を形成した状態であ
る。導通孔18部分では導体金属膜22は導通孔18の
内底面および内壁を被覆し、下層の配線パターン12と
絶縁層16を挟んだ上層の配線パターン24とを電気的
に接続している。導体金属膜22によって配線パターン
間を接続する導通部が形成される。柱状体20部分では
その頂部および外壁が導体金属膜22によって被覆され
る。この導体金属膜22も第2層の配線パターン24と
上層の第3層の配線パターン間とを接続する導通部とな
る。なお、ポリイミドの絶縁層16、柱状体20に導体
金属膜22を形成する場合は、はじめにCr等のポリイ
ミドとの密着性の良い金属をスパッタし、後に導電性に
優れるCu等をスパッタするのがよい。After the columnar body 20 is formed, a conductor metal is sputtered to form a conductor metal film 22 on the upper surface of the insulating layer 16, the conductive hole 18, and the entire surface of the columnar body 20. FIG. 1D shows a state in which the conductor metal film 22 is formed and then the conductor metal film 22 is patterned to form the second layer wiring pattern 24. In the portion of the conduction hole 18, the conductor metal film 22 covers the inner bottom surface and the inner wall of the conduction hole 18, and electrically connects the wiring pattern 12 in the lower layer and the wiring pattern 24 in the upper layer sandwiching the insulating layer 16. The conductor metal film 22 forms a conductive portion that connects the wiring patterns. The top and outer wall of the columnar body 20 are covered with the conductor metal film 22. The conductor metal film 22 also serves as a conductive portion that connects the wiring pattern 24 of the second layer and the wiring pattern of the upper third layer. When forming the conductor metal film 22 on the insulating layer 16 of polyimide and the columnar body 20, it is preferable to first sputter a metal such as Cr having good adhesion to the polyimide and then sputter Cu or the like having excellent conductivity. Good.
【0011】第2層の配線パターン24を形成した後、
絶縁層16に重ねて絶縁層26を形成し、さらに絶縁層
26上面に導体金属をスパッタリングし、導体金属膜を
所定パターンでエッチングして第3層の配線パターン2
8を形成する(図1(e))。なお、絶縁層26は絶縁層1
6上面にポリイミドをスピンコーティングして形成す
る。このとき、絶縁層26の表面位置と柱状体20の高
さとを一致させるようにする。導体金属をスパッタリン
グすることによって柱状体20の上面の導体金属膜22
と第3層の配線パターン28とが接続され、第2層の配
線パターン24と第3層の配線パターン28とが電気的
に接続される。こうして、第1層の配線パターン12と
第2層の配線パターン24、第3層の配線パターン28
が、導通孔18部分および柱状体20部分を介して相互
に電気的に接続される。After forming the wiring pattern 24 of the second layer,
The insulating layer 26 is formed on the insulating layer 16, and a conductor metal is sputtered on the upper surface of the insulating layer 26, and the conductor metal film is etched in a predetermined pattern to form a wiring pattern 2 of the third layer.
8 is formed (FIG. 1 (e)). The insulating layer 26 is the insulating layer 1.
6 The upper surface is formed by spin coating with polyimide. At this time, the surface position of the insulating layer 26 and the height of the columnar body 20 are made to coincide with each other. The conductor metal film 22 on the upper surface of the columnar body 20 is formed by sputtering the conductor metal.
And the wiring pattern 28 of the third layer are connected, and the wiring pattern 24 of the second layer and the wiring pattern 28 of the third layer are electrically connected. Thus, the wiring pattern 12 of the first layer, the wiring pattern 24 of the second layer, and the wiring pattern 28 of the third layer
Are electrically connected to each other through the conduction hole 18 portion and the columnar body 20 portion.
【0012】上記実施例は配線パターンを3層設けた例
について説明しているが、第3層の配線パターン28の
上にも同様な方法によって続けて配線パターンを形成す
ることができる。こうして多層の配線パターンを有する
多層回路基板を得ることができる。なお、本実施例では
上述したように、第2層の配線パターン24を形成する
際に、下層の配線パターン12に接続する導通部と上層
の配線パターン28に接続する導通部を同時に形成する
から、下層から順に積み上げて形成していく方法にくら
べて効率的な製造が可能である。とくに、柱状体を利用
することによって柱状体の厚みが利用でき、層間距離を
大きくとる場合にも容易に導通をとることができるとい
う特徴があるAlthough the above-mentioned embodiment describes an example in which three layers of wiring patterns are provided, wiring patterns can be continuously formed on the wiring pattern 28 of the third layer by a similar method. In this way, a multilayer circuit board having a multilayer wiring pattern can be obtained. In the present embodiment, as described above, when forming the wiring pattern 24 of the second layer, the conductive portion connected to the wiring pattern 12 of the lower layer and the conductive portion connected to the wiring pattern 28 of the upper layer are simultaneously formed. It is possible to manufacture more efficiently than the method of stacking and forming from the lower layer in order. In particular, by using the columnar body, the thickness of the columnar body can be utilized, and even if the interlayer distance is large, it is possible to easily establish conduction.
【0013】なお、上記例のように導通孔と柱状体を組
み合わせるようにして形成して配線パターンを積み重ね
ていってもよいが、単に柱状体を形成して順次配線パタ
ーンを積み重ねる方法ももちろん利用することができ
る。図2は柱状体を利用して配線パターンを多層に形成
する方法を示す。図2(a)は上記例と同様にして支持基
板10に柱状体30を形成したところで、これに対し導
体金属をスパッタリングして導体金属膜32を形成する
と共にパターン形成して、第1層の配線パターン34を
形成する(図2(b) )。次に、柱状体30と同厚に絶縁
層36を形成し(図2(c) )、絶縁層36上にさらに柱
状体30を形成する(図2(d) )。そして、絶縁層36
および柱状体30に導体金属をスパッタリングすること
によって第2層の配線パターン38を形成する。Although the wiring patterns may be stacked by forming the conductive holes and the pillars in combination as in the above example, a method of simply forming the pillars and sequentially stacking the wiring patterns may also be used. can do. FIG. 2 shows a method of forming a wiring pattern in multiple layers using a columnar body. 2A, when the columnar body 30 is formed on the supporting substrate 10 in the same manner as the above example, a conductor metal is sputtered on the columnar body 30 to form a conductor metal film 32 and a pattern is formed. A wiring pattern 34 is formed (FIG. 2 (b)). Next, the insulating layer 36 is formed to the same thickness as the columnar body 30 (FIG. 2C), and the columnar body 30 is further formed on the insulating layer 36 (FIG. 2D). Then, the insulating layer 36
A conductive metal is sputtered on the columnar body 30 to form the second layer wiring pattern 38.
【0014】第1層の配線パターン34と第2層の配線
パターン38は柱状体30に設けた導体金属膜32によ
って導通がとられ、配線パターン間の電気的接続がとら
れる。こうして、絶縁層および柱状体を設けて導体金属
をスパッタリングする方法を続けることによって多層回
路基板を形成することができる。この方法の場合は、柱
状体30を介して配線パターン間の電気的接続をとるこ
とから、前述したようにかなり層間距離が離れている場
合にも確実な電気的接続をとることが可能になる。ま
た、柱状体30と同厚に絶縁層を形成して積み重ねてい
くことによって各層の膜厚が均一となり配線パターンの
平坦度が良好となって電気的特性等に優れた多層回路基
板を得ることができるという特徴がある。The wiring pattern 34 of the first layer and the wiring pattern 38 of the second layer are electrically connected by the conductor metal film 32 provided on the columnar body 30 to electrically connect the wiring patterns. Thus, the multilayer circuit board can be formed by continuing the method of providing the insulating layer and the columnar body and sputtering the conductive metal. In this method, since the wiring patterns are electrically connected via the columnar body 30, it is possible to make a reliable electrical connection even when the interlayer distance is considerably large as described above. . Further, by forming an insulating layer having the same thickness as the columnar body 30 and stacking the insulating layers, the film thickness of each layer becomes uniform, the flatness of the wiring pattern becomes good, and a multilayer circuit board having excellent electrical characteristics and the like is obtained. There is a feature that you can
【0015】図3は絶縁層に導通孔をエッチング形成し
て配線パターンを多層に形成する方法を示す。図3(a)
は支持基体10に第1層の配線パターン40を形成し、
絶縁層42を形成した状態である。ここで、配線パター
ン間の導通部を形成するため絶縁層42をエッチングし
て導通孔44を形成し(図3(b) )、さらに導体金属を
スパッタリングすると共に第2層の配線パターン46を
形成し、導通孔44に導体金属膜48を形成する(図3
(c) )。導通孔44部分の導体金属膜48によって第1
層の配線パターン40と第2層の配線パターン46とが
電気的に接続される。次いで、図3(d) に示すように第
2層の配線パターン46上に絶縁層50を形成する。そ
して、第2層の配線パターン46と絶縁層50表面に形
成される配線パターンとを接続するため絶縁層50に導
通孔52を形成し、上層との導通部の形成に進む(図3
(e))。FIG. 3 shows a method for forming a wiring pattern in multiple layers by etching conductive holes in an insulating layer. Figure 3 (a)
Forms a first layer wiring pattern 40 on the support base 10,
This is a state in which the insulating layer 42 is formed. Here, in order to form a conductive portion between the wiring patterns, the insulating layer 42 is etched to form a conductive hole 44 (FIG. 3B), and a conductive metal is further sputtered and a second layer wiring pattern 46 is formed. Then, a conductor metal film 48 is formed in the conduction hole 44 (see FIG. 3).
(c)). By the conductor metal film 48 in the conduction hole 44, the first
The wiring pattern 40 of the layer and the wiring pattern 46 of the second layer are electrically connected. Next, as shown in FIG. 3D, the insulating layer 50 is formed on the second-layer wiring pattern 46. Then, in order to connect the wiring pattern 46 of the second layer and the wiring pattern formed on the surface of the insulating layer 50, a conductive hole 52 is formed in the insulating layer 50, and the formation of a conductive portion with the upper layer is performed (FIG. 3).
(e)).
【0016】こうして、絶縁層に導通孔を形成し、導体
金属をスパッタリングする方法を続けていくことによっ
て多層に配線パターンを形成して、かつ配線パターン間
の電気的接続をとった多層回路基板が得られる。なお、
この方法の場合は、導通孔をエッチング形成する必要が
あることとスパッタリングによって導通孔の内底面およ
び内壁に導体金属膜を形成する必要があることから、絶
縁層42、50の厚さは薄いほうがよく、配線パターン
を接近させて多層に形成する場合に好適である。In this way, a multi-layer circuit board in which a conductive hole is formed in the insulating layer and a conductive metal is sputtered to form a multi-layered wiring pattern and the wiring patterns are electrically connected to each other is obtained. can get. In addition,
In the case of this method, since it is necessary to form the conductive holes by etching and it is necessary to form the conductive metal film on the inner bottom surface and the inner wall of the conductive holes by sputtering, the insulating layers 42 and 50 should be thinner. Of course, it is suitable when the wiring patterns are formed close to each other to form a multilayer structure.
【0017】以上、本発明方法によって薄膜形成による
多層回路基板の製造方法を説明したが、上記導通孔ある
いは柱状体を利用した導通部によって配線パターン間の
導通をとる方法は種々パターンの多層回路基板に適用で
きるものであり、配線パターンの層数等、適宜設定でき
るものである。また、上記例では支持基板10としてセ
ラミック基板を利用した例について述べたが、支持基板
は配線パターンを多層に形成する際の支持体として利用
するもので種々の利用形態が可能である。たとえば、T
AB(Tape Automated Bonding)製品などではポリイミ
ド等の絶縁フィルム面上に配線パターンを形成するが、
絶縁フィルムの表裏面に配線パターンを形成して表裏面
を導通部で接続する場合や、さらに絶縁フィルムの一方
の面に多層に配線パターンを形成する場合等に同様に適
用することが可能である。The method of manufacturing a multi-layer circuit board by forming a thin film by the method of the present invention has been described above. The method of establishing continuity between wiring patterns by the above-mentioned conduction hole or columnar conductive portion is a multi-layer circuit board of various patterns. The number of layers of the wiring pattern and the like can be appropriately set. Further, in the above example, the example in which the ceramic substrate is used as the support substrate 10 is described, but the support substrate is used as a support when forming the wiring patterns in multiple layers, and various usage forms are possible. For example, T
In AB (Tape Automated Bonding) products, etc., a wiring pattern is formed on the surface of an insulating film such as polyimide.
It can be similarly applied to the case where wiring patterns are formed on the front and back surfaces of the insulating film and the front and back surfaces are connected by a conductive portion, or when the wiring pattern is formed in multiple layers on one surface of the insulating film. .
【0018】[0018]
【発明の効果】本発明に係る多層回路基板及びその製造
方法によれば、上述したように、配線パターン間を接続
する導通部の電気的導通の信頼性を向上させることがで
きる。また、絶縁層に導通孔と柱状体を形成し、絶縁層
と柱状体及び導通孔の内底面と内壁に導体金属を形成す
ることによって配線パターン間の導通部が容易に形成で
き、効率的な多層回路基板の製造が可能になる等の著効
を奏する。As described above, according to the multilayer circuit board and the method of manufacturing the same of the present invention, it is possible to improve the reliability of the electrical continuity of the conductive portion connecting the wiring patterns. Further, by forming the conductive hole and the columnar body in the insulating layer, and forming the conductive metal on the inner bottom surface and the inner wall of the insulating layer and the columnar body and the conductive hole, it is possible to easily form the conductive portion between the wiring patterns, which is efficient. It is possible to produce a multi-layer circuit board, which is very effective.
【図1】多層回路基板の製造方法の一実施例を示す説明
図である。FIG. 1 is an explanatory view showing an embodiment of a method for manufacturing a multilayer circuit board.
【図2】多層回路基板の製造方法の他の実施例を示す説
明図である。FIG. 2 is an explanatory view showing another embodiment of the method for manufacturing a multilayer circuit board.
【図3】多層回路基板の製造方法のさらに他の実施例を
示す説明図である。FIG. 3 is an explanatory view showing still another embodiment of the method for manufacturing a multilayer circuit board.
【図4】多層回路基板の従来の配線パターンの形成例を
示す説明図である。FIG. 4 is an explanatory diagram showing an example of forming a conventional wiring pattern on a multilayer circuit board.
3 絶縁層 4 配線パターン 5 導通部 10 支持基板 12、34、40 第1層の配線パターン 16、26、36、42、50 絶縁層 18、44 導通孔 20、30 柱状体 22、32、48 スパッタ膜 24、38、46 第2層の配線パターン 28 第3層の配線パターン 3 Insulating layer 4 Wiring pattern 5 Conducting part 10 Support substrate 12, 34, 40 First layer wiring pattern 16, 26, 36, 42, 50 Insulating layer 18, 44 Conducting hole 20, 30 Columnar body 22, 32, 48 Sputter Films 24, 38, 46 Second layer wiring pattern 28 Third layer wiring pattern
Claims (3)
ターンを多層に形成するとともに、層間に配線パターン
を電気的に接続する導通部を設けた多層回路基板におい
て、 前記導通部が絶縁層上に柱状に立設した絶縁体の表面に
導体金属の膜が被覆されて形成され、 該導通部の柱状体の頂部の導体金属膜が一方の配線パタ
ーンに接続され、柱状体の外壁基部の前記導体金属膜が
他方の配線パターンに接続されたことを特徴とする多層
回路基板。1. A multi-layer circuit board in which wiring patterns are formed in multiple layers with an electrically insulating layer interposed between the layers, and a conductive portion electrically connecting the wiring patterns is provided between the layers, wherein the conductive portion is an insulating layer. A conductor metal film is formed on the surface of an insulator standing upright in a columnar shape, and the conductor metal film on the top of the columnar body of the conducting portion is connected to one wiring pattern, and the outer wall base of the columnar body is formed. A multilayer circuit board, wherein the conductor metal film is connected to the other wiring pattern.
ターンを多層に形成するとともに、層間に配線パターン
を電気的に接続する導通部を設けた多層回路基板におい
て、 前記導通部が対向する配線パターンの層間に介在する絶
縁層を厚み方向に連絡する導通孔に形成されるととも
に、該導通孔の一方の配線パターンに面する内底面と該
導通孔の内壁に導体金属膜が被覆されて形成され、 前記一方の配線パターンには前記内底面の導体金属膜が
接続され、他方の配線パターンには前記内壁に設けた導
体金属膜が接続され、 前記導通孔内部が前記絶縁層によって充填されたことを
特徴とする多層回路基板。2. In a multi-layer circuit board, wherein a wiring pattern is formed in multiple layers with an electrically insulating layer interposed between the layers, and a conductive portion electrically connecting the wiring patterns is provided between the layers, the conductive portions face each other. An insulating layer interposed between layers of the wiring pattern is formed in a conductive hole that connects in the thickness direction, and an inner bottom surface of the conductive hole facing the wiring pattern and an inner wall of the conductive hole are covered with a conductive metal film. Formed, the conductor metal film on the inner bottom surface is connected to the one wiring pattern, the conductor metal film provided on the inner wall is connected to the other wiring pattern, and the inside of the conduction hole is filled with the insulating layer. A multilayer circuit board characterized by the above.
ターンを多層に形成するとともに、層間に配線パターン
を電気的に接続する導通部を設ける多層回路基板の製造
方法において、 第一の配線パターン上に絶縁層を形成し、 該絶縁層をエッチングして前記配線パターンまで通じる
導通孔を形成するとともに、絶縁層上に絶縁体による柱
状体を立設し、 前記絶縁層と柱状体の表面及び導通孔の内底面と内壁に
導体金属を形成して前記内底面、内壁および柱状体の頂
部、外壁に導体金属膜を形成するとともに前記絶縁層上
に第二の配線パターンを形成し、 次いで、前記絶縁層上にさらに絶縁層を形成し、該絶縁
層上に導体金属で第三の配線パターンを形成することに
よって、前記導通孔および柱状体部分を導通部として配
線パターンを多層に形成することを特徴とする多層回路
基板の製造方法。3. A method for manufacturing a multilayer circuit board, wherein a wiring pattern is formed in multiple layers with an electrically insulating layer interposed between the layers, and a conductive portion electrically connecting the wiring patterns is provided between the layers. An insulating layer is formed on the pattern, the insulating layer is etched to form a conductive hole reaching the wiring pattern, and a columnar body made of an insulator is erected on the insulating layer, and the surface of the insulating layer and the columnar body is formed. And forming a conductor metal on the inner bottom surface and the inner wall of the conduction hole to form a conductor metal film on the inner bottom surface, the inner wall and the top of the columnar body, and the outer wall, and forming a second wiring pattern on the insulating layer, , Further forming an insulating layer on the insulating layer, and forming a third wiring pattern on the insulating layer with a conductive metal, thereby forming a multilayer wiring pattern with the conductive hole and the columnar body portion as a conductive portion. Method of manufacturing a multilayer circuit board, characterized in that formed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20748192A JP3171679B2 (en) | 1992-07-11 | 1992-07-11 | Multilayer circuit board and method of manufacturing the same |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20748192A JP3171679B2 (en) | 1992-07-11 | 1992-07-11 | Multilayer circuit board and method of manufacturing the same |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0629665A true JPH0629665A (en) | 1994-02-04 |
| JP3171679B2 JP3171679B2 (en) | 2001-05-28 |
Family
ID=16540466
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20748192A Expired - Fee Related JP3171679B2 (en) | 1992-07-11 | 1992-07-11 | Multilayer circuit board and method of manufacturing the same |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3171679B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0849845A (en) * | 1994-08-04 | 1996-02-20 | Kawasaki Heavy Ind Ltd | Combustion judgment / control method and judgment / control device using color image |
-
1992
- 1992-07-11 JP JP20748192A patent/JP3171679B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0849845A (en) * | 1994-08-04 | 1996-02-20 | Kawasaki Heavy Ind Ltd | Combustion judgment / control method and judgment / control device using color image |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3171679B2 (en) | 2001-05-28 |
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