JPH06297734A - Print control circuit of serial dot printer - Google Patents

Abstract

PURPOSE:To prevent a print result from being blurred by a method wherein a basic clock signal or the like having a prescribed frequency is treated by a specific circuit so that a length of a driving pulse from stopping of print to starting thereof is greater than that of continuous printing. CONSTITUTION:An oscillator 1 generates a basic cloak signal having a prescribed frequency and a frequency counter 2 counts the basic clock signals to output a pulse signal at every time of counting up a prescribed value. Two drive counters 3, 4 count the basic clock signals respectively and when the counted values are different from each other, the counting is stopped and a pulse signal having a prescribed width is outputted. Further, a flip-flop 10 stores data of corresponding print pin right after the printing. On the other hand, a selection circuit 6 selects one of the output signals of both of the drive counters 3, 4 based on the output signal of the flip-flop 10. An AND circuit 9 receives the output signal of the selection circuit 6 and print data to output the AND signal of them.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a print control circuit for controlling a print operation of a serial dot printer, and more particularly to a print control circuit for preventing print blur.

[0002]

2. Description of the Related Art A conventional print control circuit for controlling a printing operation of a serial dot printer controls a driving force of a print head pin (printing pin) according to a typeface to be printed, a paper quality of a printing paper, and the like, and a constant amount. By checking the number of print dots of the print data (for example, one line) by the firmware and changing the width of the pulse given to the print head pin according to the total number of print dots, the overall print density can be controlled. There is. However, since the number of print dots of the data actually printed varies for each dot row, the above-described control causes the number of print dots for a specific dot row and the number of print dots for the entire print data to be small. Since there is a discrepancy between the two, the final printed state has a difference in shading.

[0003]

As described above, the conventional print control circuit for controlling the printing operation of the serial dot printer does not control the width of the pulse applied to the print head pin for each dot row. , The final print status may differ in light and shade, but in addition, each print pin prints after the blank, that is, when printing is performed from the time when the print operation is paused, and when the previous print is performed. The printing operation is paused because the driving force required to drive the printing pin is different when printing with the same pulse width, that is, with continuous printing. There is a problem that the printing is faint when the printing is performed from the time when the printing is being performed.

[0004]

A print control circuit for a serial dot printer according to the present invention comprises a clock circuit for transmitting a basic clock signal having a constant period, and a pulse for each time the basic clock signal is counted to reach a predetermined value. A cycle counter which outputs a signal, and which is started by an output signal of the cycle counter, counts the basic clock signal and stops when the respective predetermined values are different, and outputs a pulse signal having a predetermined time width 2 Drive counters, flip-flops provided corresponding to each of the plurality of print pins and storing data immediately after printing of the corresponding print pins, and outputs of the two drive counters according to output signals of the flip-flops. A selection circuit for selecting any one of the signals, an output signal of the selection circuit and print data are input to And a logical product circuit for outputting a signal Riseki.

[0005]

Embodiments of the present invention will now be described with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a timing chart showing the operation of the embodiment of FIG. 1, and FIG. 3 is a waveform diagram showing waveforms of main signals in the embodiment of FIG. Is.

In FIG. 1, a transmission circuit 1 generates a clock signal 13 having a constant cycle. The cycle counter 2 can be set to an arbitrary value by the central processing unit (CPU), and C
The start signal 11 is input from the PU to start the counting operation, the clock signal 13 is counted until the set value is reached, and the periodic signal 14 is output. Drive counter 3
Any of different values can be set to 4 and 4, depending on the CPU, the periodic signal 14 is input to start the counting operation, and the clock signal 1 is set until the set value is reached.
3 is counted, and the drive signal 15 is counted during the counting period.
And 16 are output. The flip-flop 5 is a CPU
The data write signal 12 is input from the above, and is output as the pre-print data 17 at the timing next to the periodic signal 14. The flip-flop 7 is reset by the start signal 11, latches the pre-print data 17 at the timing of the periodic signal 14, and outputs the print data 19. The flip-flop 10 is released from reset by the start signal 11, latches the print data 19 at the timing of the periodic signal 14, and outputs the post-print data 20. The selection circuit 6 inputs the drive signals 15 and 16 and outputs the data 20 after printing.
Then, one of them is selected and output as the drive signal 18. The logical product circuit 9 outputs a logical product signal of the drive signal 18 and the print data 19 to the print signal 22.
Output as. The flip-flop 8 has a periodic signal 14
Is set by, the interrupt signal 21 is output to the CPU, and it is released by the data write signal 12.

Next, the operation of the print control circuit configured as described above will be described with reference to FIGS. 2 and 3.

In this embodiment, the data write signal 1
2 and the periodic signal 14 are negative logic signals and the other signals are positive logic signals. Further, the selection circuit 6 drives the drive signal 15 when the data 20 after printing is at "0" level.
Is selected, and the drive signal 16 is selected when the data 20 after printing is at "1" level. The following description is for the operation of one print pin.

Before the start signal 11 rises, the cycle counter 2 is set to the value "5" by the cycle write signal 23, and the drive counter 4 is set to the value "2" as the normal drive time by the drive time write signal 25. Is set and the drive counter 3 is set to the value "3" as the drive time when printing is performed from the time when the printing operation is stopped by the drive time write signal 24, and the flip-flop 5 is set to 1 cycle. "1" is set as the eye print data (point A in FIG. 2).

When the start signal 11 becomes "1" level, the reset of the flip-flops 7 and 10 is released, and the periodic counter 2 starts counting from the next rising edge of the clock signal 13. The drive counters 3 and 4 start counting from the next rising edge of the clock signal 13 at the time when the periodic signal 14 rises. The interrupt signal 21 is set at the rising edge of the periodic signal 14 (point B in FIG. 2).

The flip-flops 7 and 10 latch the input signal state at the rising edge of the periodic signal 14 and output it.
The selection circuit 6 selects and outputs the drive signal 15 because the data 20 after printing is at the "0" level. The AND circuit 9 outputs "1" when both the drive signal 18 and the print data 19 become "1" level (point C in FIG. 2).

When the interrupt signal 21 is output, the CPU outputs the next print data to the flip-flop 5 at the timing next to the data write signal 12 to cause the flip-flop 5 to be latched and reset the flip-flop 8 (point in FIG. 2). D).

The drive counters 3 and 4 are reset after counting the set value, the drive signals 15 and 16 are also reset, and the print signal 22 is "0".
It becomes a level (point E in FIG. 2).

The operation of the second cycle is the same as the operation of the first cycle, but the selection circuit 6 selects and outputs the drive signal 16 because the data 20 after printing is at the "1" level. The drive signal 18 is a signal shorter than that in the first cycle (point F in FIG. 2).

Thereafter, the above operation is continued until the start signal 11 becomes "0" level. As a result, the waveforms of the periodic signal 14, the post-print data 20 and the print signal 22 have the waveforms shown in FIG.

As described above, the print signal 22 becomes a long signal when the post-print data 20 is at "0" level and becomes "0".
At the level, the signal becomes short.

[0018]

As described above, the print control circuit of the serial dot printer of the present invention continuously prints the length of the driving pulse when printing is performed from the time when the printing operation is stopped. By making the length of the drive pulse longer than that, it is possible to prevent blurring of printing and to perform printing with excellent quality.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a timing chart showing the operation of the embodiment shown in FIG.

FIG. 3 is a waveform diagram showing waveforms of main signals in the embodiment of FIG.

[Explanation of symbols]

 1 Transmitter Circuit 2 Cycle Counter 3/4 Drive Counter 5/7/8/10 Flip-Flop 6 Selection Circuit 9 AND Circuit 11 Start Signal 12 Data Write Signal 13 Clock Signal 14 Cycle Signal 15/16 Drive Signal 17 Pre-Print Data 18 Drive signal 19 Print data 20 Data after printing 21 Interrupt signal 22 Print signal 23 Cycle write signal 24 Drive time write signal 25 Drive time write signal

Claims (1)

[Claims] 1. A clock circuit for transmitting a basic clock signal having a constant cycle, and a cycle counter for counting the basic clock signal and outputting a pulse signal each time a predetermined value is reached,
A plurality of drive counters that are activated by the output signal of the cycle counter, count the basic clock signals, and stop them when they have different predetermined values, and output pulse signals of a predetermined time width; A flip-flop which is provided corresponding to each of the print pins and which stores the data immediately after printing of the corresponding print pin, and one of the output signals of the two drive counters depending on the output signal of the flip-flop. A selection circuit to select,
A print control circuit for a serial dot printer, comprising: a logical product circuit which receives an output signal of the selection circuit and print data and outputs a signal of a logical product of them.