JPH06302790A - Manufacture of insulating isolating substrate - Google Patents

Abstract

PURPOSE:To manufacture an ultrathin-film insulating isolating substrate having a large area, excellent crystallizability and film thickness of 1mum or less with superior controllability in the manufacture of the insulating isolating substrate using wafer junction. CONSTITUTION:A buried oxide film 3 is formed onto an N-type silicon wafer 2, and a P-type silicon wafer 1 is joined on the oxide film 3 through laminating. The silicon wafer 1 is polished, and an N-type diffusion region 5 in high concentration is formed to a part of the silicon wafer 1. An electrode 7 for fixing potential is shaped to the N-type diffusion region 5 and the P-type silicon wafer 1. Positive electric charges are generated in the buried oxide film 3 by X-rays, and an N-type inversion layer 8 and a depletion layer 9 are formed on the interface of the P-type silicon wafer 1 and the buried oxide film 3. Potential is applied to the N-type inversion layer 8 and the depletion layer 9 so that the N-type inversion layer 8 and the P-type silicon wafer 1 are reverse-biased, and electrochemical etching is conducted by a KOH solution. The electrode 7 and the N-type diffusion region 5 are removed, and heat treatment is carried out, thus eliminating positive electric charges stored in the buried oxide film 3.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing an ultra thin film SOI (Silicon On Insulator) substrate used for ULSI, particularly high speed and low power consumption ULSI and environment resistant elements, and more particularly, it uses a wafer direct bonding technique The present invention relates to a method for manufacturing an ultra thin film SOI substrate.

[0002]

2. Description of the Related Art In recent years, as a device, a thin SOI layer such as a fully depleted MOS in which a semiconductor layer under a gate serves as a channel is required. In the past, as a method for manufacturing an ultrathin film SOI substrate having an SOI layer of this thin film, for example, an SOI film thickness of 1 μm or less, Japanese Patent Application Laid-Open No. Hei 3
Japanese Patent Application Laid-Open No. 2-22 / 1998, a method of utilizing a difference in etch rate due to a difference in impurity concentration, as disclosed in
As disclosed in 8049, a method is known that utilizes the fact that electrochemical etching stops at the PN junction interface. These will be described below.

In the method of utilizing the difference in etch rate due to the difference in impurity concentration, first, a boron doping layer is formed on the surface of a first Si wafer, and then a wafer having a Si epitaxial layer formed thereon is used. Side with a _second Si wafer via SiO ₂ .
Next, after performing alkali etching with the boron doping layer as a stopper, the boron doping layer is removed by polishing or another selective etching solution to obtain a desired thin film SOI.

However, in this method, the process is complicated and the cost is high as described above, and the temperature at the time of growth is required to be high in order to improve the crystallinity of the epitaxial growth layer. There is a problem that the boundary of the boron doping layer is diffused and liable to sag, a high concentration of boron is mixed in the SOI layer, the etching surface is roughened, and in extreme cases, uniform stop etching cannot be performed on the entire surface of the wafer. there were.

On the other hand, in the method of using the PN junction interface and stopping the electrochemical etching at the interface, in addition to the need for a diffusion step with good controllability in order to form a shallow and steep PN junction, Due to the high temperature heat treatment at the time of wafer bonding, sagging occurs at the PN junction interface. Furthermore, in order to fix the potentials of the P layer and the N layer to appropriate values during electrochemical etching, a take-out electrode is provided on the end face of the wafer. Even if such take-out electrode is provided,
Due to the influence of the resistance component of the diffusion layer, a voltage drop occurs depending on the distance from the electrode, so that there is a problem in that the area over the entire surface of the wafer cannot be increased.

In view of this problem, SiO ₂ / S
When the i interface is irradiated with ionizing radiation such as X-rays, γ-rays or SR radiation, or charged particles such as electron beams or ion beams,
Using the phenomenon that a positive charge is accumulated in SiO ₂ and a negative charge accumulation layer is induced on the Si side near the interface, a positive charge is generated by irradiating the buried oxide film with X-rays, thereby generating an interface. A PN formed between the substrate and a high concentration layer of negative charges induced in a nearby SOI layer (P type)
It has been proposed to use the junction interface to perform electrochemical stop etching. (T.Abe et al., Semicondu
ctor Wafer Bonding: Science, Technology and Applicat
ions, eds.U.Goesele et al., (Electrochem.Soc., Pennin
gton 1991), p.331, or IEICE Technical Report SDM92-137 ~ 149 1993.1.21 p.57. In this method, a positive charge is generated in the buried oxide film by irradiating X-rays, and a depletion layer and an inversion layer are formed on the P-type substrate to be the SOI layer to form a shallow and sharp PN junction. Therefore, the diffusion process is not required. And SO
Since the thickness of the I layer is determined by the depletion layer width, the ultrathin film S
An OI substrate is obtained. Furthermore, since positive charges having a uniform density are accumulated in the SiO ₂ layer by X-ray irradiation, the widths of the inversion layer and the depletion layer are uniform over the entire surface of the wafer. As a result, it can be said that there is a possibility that an ultrathin film SOI substrate having a desired thickness can be manufactured over the entire surface of the wafer with good control.

We have considered the same method completely independently and have conducted various experiments so far.

[0008]

However, as a result, it was found that the buried oxide film was irradiated with X-rays.
This means that the etching cannot be terminated at the PN junction interface even if the / SiO ₂ / Si structure is simply immersed in an alkaline solution or the like for etching. This is because even if a positive charge is generated in the buried oxide film to form a depletion layer and an inversion layer on the P-type substrate that will become the SOI layer, the potential of the inversion layer must be fixed to the etching solution in etching. This is because the depletion layer does not act as a stopper.

Therefore, the present invention has been made in view of the above problems, and in the production of an insulating separation substrate using wafer bonding, an ultrathin film insulating separation substrate having a large area and good crystallinity and a film thickness of 1 μm or less is provided. It is intended to provide a method of manufacturing with good controllability.

[0010]

In a method for manufacturing an insulating separation substrate according to the present invention, a step of bonding a first and a second semiconductor substrate through an insulating film to manufacture a bonded substrate, and A step of forming a high concentration region having a conductivity type opposite to that of the first semiconductor substrate formed so as to reach the insulating film from the surface of the first semiconductor substrate; and radiation or charged particles on the bonding substrate. Irradiating to form an inversion layer and a depletion layer at the junction interface between the insulating film and the first semiconductor substrate, and the inversion layer with the electrode in the etching solution of the first semiconductor substrate by electrochemical etching. And a step of etching while fixing the potential of the depletion layer with respect to the first semiconductor substrate.

[0011]

According to the present invention, the first semiconductor substrate and the second semiconductor substrate are bonded to each other through the insulating film, and at least a part of the first semiconductor substrate is covered with the insulating film from the surface thereof. Since the high-concentration region having a conductivity type opposite to that of the first silicon wafer formed so as to reach the first silicon wafer is formed, the first and second semiconductor substrates and the insulating film interposed therebetween are formed. The bonded substrate obtained by bonding is irradiated with radiation or charged particles to accumulate charges in the insulating film, and as a result, the first semiconductor substrate and the insulating film near the interface between the first semiconductor substrate and the insulating film are charged.
When the first semiconductor substrate in which the inversion layer and the depletion layer are induced in the semiconductor substrate and the PN junction is formed is electrochemically etched in the etching solution, the potential of the depletion layer is passed through the high concentration region. Can be fixed to the first semiconductor substrate.

[0012]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a sectional view showing a first embodiment of the present invention. First, a P-type conductive first silicon wafer 1 having at least one surface mirror-polished and an N-type conductive second silicon wafer 2 having at least one surface mirror-polished.
A buried oxide film 3 having a predetermined thickness (for example, about 100 nm) is formed on both or either of them by, for example, thermal oxidation. After that, as shown in FIG. 1A, the mirror surfaces of the two silicon wafers are directly bonded via the buried oxide film 3. This is a wafer 12. This joint is made of, for example, R
After normal washing with CA solution, 90 ° C ± 10
1 in a solution of H ₂ SO 4: H ₂ O ₂ = 4: 1 kept at ° C.
This is done by immersing for about 0 minutes to perform hydrophilic treatment, adhering at room temperature and then heat-treating at 1100 ° C. in N ₂ for 1 hour, but other methods such as electrostatic adhesion may be used.

Next, as shown in FIG. 1B, the first silicon wafer on the element forming side is thinned by grinding and polishing from the bonding surface to a thickness of about 4 μm. Next, FIG.
As shown in (c), after covering the area other than the peripheral portion of the wafer 12 with the resist 4, N-type dopant such as As or P is ion-implanted and heat treatment is performed, and surface impurities reaching the buried oxide film 3 in the peripheral portion. An N-type high concentration region 5 having a concentration of 10 ¹⁸ cm ^-3 or more is formed. As a method of forming the N-type high-concentration region 5, a method of vapor phase diffusion using an oxide film as a mask may be used in addition to the above. The N-type high-concentration region 5 functions as a source of electrons to be supplied to the inversion layer that is formed at the P-Si / SiO ₂ interface later. Next, a thin insulating film 6 is formed on the surface of the bonded body. The insulating film may be, for example, a Si film such as a thermal oxide film of about 50 nm formed in a dry oxygen atmosphere.
It is desirable to have a good film quality with few -H bonds and dangling bonds. This oxide film is an insulating film for making electrical contact only with predetermined portions of the N-type high concentration region 6 and the P-type region, and it is a contact region and a future thin film SO.
It is removed from the area to be I in advance. Thereafter, as shown in FIG. 1D, an electrode 7 is formed of Al or the like at a predetermined position of the N-type high concentration region 6 and the P-type region by ordinary vapor deposition, patterning and sintering. Also, FIG.
A wafer top view corresponding to (d) is shown in FIG. The contact portion 7N for the N-type high-concentration region 5 and the contact portion 7P for the silicon wafer 1 which is the P-type substrate are present only at one place around the wafer, and the area occupied by them is small, and most of the silicon wafer 1 is a future SOI region. Become.

Next, in this state, X-rays are irradiated from the silicon wafer 1 side. The X-ray used for this purpose may have a broad spectrum containing a relatively long-wavelength soft X-ray component generated from an electron impact type anticathode (W, Rh, etc.), or CuKα ray, etc. The characteristic X-ray may be used. The total irradiation dose is preferably about 10 ⁴ rad or more. The total irradiation dose is r (ra
d), the positive charge amount n generated in the buried oxide film
(Cm ⁻³ ) is n = 1.4 × 10 ¹³ · r if the buried oxide film is oxidized in a H ₂ / O ₂ mixed atmosphere.
It is about (cm ⁻³ ). At this time, assuming that the thickness of the buried oxide film 3 is t _box , the number N of positive charges accumulated in the buried oxide film 3 per unit area is N = n × t _box (cm ⁻² ). The width of the depletion layer spreading at the interface between the buried oxide film 3 and the silicon wafer 1 is determined by the number N of positive charges and the P-type impurity concentration. Now, r = 10 ⁶ rad, t _box
= 1 μm, the carrier concentration of the silicon wafer 1 is 10
Assuming ¹⁶ (cm ⁻³ ), the total width of the N-type inversion layer 8 and the depletion layer 9 formed is about 0.3 μm as shown in FIG.
m.

FIG. 4 shows a band diagram for explaining how the N-type inversion layer 8 and the depletion layer 9 are formed by the positive charges accumulated in the buried oxide film 3. FIG. 4A shows a band diagram in a thermal equilibrium state before X-ray irradiation, and FIG. 4B shows a band diagram in a thermal equilibrium state after X-ray irradiation. In order to terminate the lines of electric force generated from the positive charges generated in the oxide film by the X-ray irradiation, more negative charges than those in the case of FIG. 4A are formed at the interface between the silicon wafer 1 and the buried oxide film 3. Must be induced, which increases the electron density on the silicon wafer 1 side at the interface between the P-type silicon wafer 1 and the buried oxide film layer, and forms the N-type inversion layer 8 and the depletion layer 9. It The width d1 of the depletion layer 9 is proportional to the amount of positive charges generated in the oxide film by X-ray irradiation.

After performing X-ray irradiation so that a depletion layer having a desired width is formed according to the impurity concentration and the film thickness of the buried oxide film 3, the wafer 12 is subjected to a solution such as KOH or ethylenediaminepyrocatechol. It is dipped in and electrochemically etched. FIG. 2 shows an example of the above etching method, and shows a case where KOH is used as an etchant. Here, a case is shown in which a predetermined voltage is applied to the potential fixing electrode provided on the bonded wafer pair in order to stably perform the electrochemical selective etching. That is, the electrode 7P provided in the P-type region of the silicon wafer 1 is used as a reference potential, and a positive potential difference, for example, 1 V, is set to N as a reference potential.
It is applied to the electrode 7N provided on the mold high concentration layer 5. Further, the same reference potential as that of the P-type region is applied to the reference electrode 13 made of platinum immersed in the solution. If the etching is performed in this way, the P-type substrate is gradually etched, but when the depletion layer is reached, the etching ends there. Figure 1 (f)
In the figure, the wafer 12 after etching is shown.

After the etching is completed in this way, FIG.
As shown in (g), the electrodes 7N and 7P and the insulating film 6 on the surface are removed, and unnecessary portions around the wafer 12 are removed by means such as etching or edge grinding.

Then, the wafer 12 is heat-treated at a high temperature of about 800 ° C. or higher in an inert gas atmosphere to remove the positive charges accumulated in the buried oxide film. If radiation damage has been introduced into the wafer 12 by irradiation with X-rays, it is also completely removed by this heat treatment. Then, a thin film SOI substrate as shown in FIG.

As described above, the P-type silicon wafer and the N-type silicon wafer are bonded to each other via the buried oxide film made of SiO ₂ , and at least a part of the polishing surface of the P-type silicon wafer is exposed from the surface thereof. Since the N-type high-concentration diffusion region is formed so as to reach the buried oxide film,
-Type silicon wafer, N-type silicon wafer, and Si / SiO ₂ composed of a buried oxide film interposed therebetween
/ Si structure is irradiated with X-rays or the like to accumulate charges in the buried oxide film. As a result, an inversion layer and a depletion layer are formed in the P-type silicon wafer near the interface between the P-type silicon wafer and the buried oxide film. Fixing the potential of the depletion layer to the P-type silicon wafer through the N-type high-concentration diffusion region when electrochemically etching the P-type silicon wafer in which the induced PN junction is formed in an alkaline solution. You can Therefore, in this etching, the etching can be terminated when the tip of the etching reaches the depletion layer.
As a result, the thin film S in which the thickness of the SOI layer is determined by the width of the depletion layer
The OI substrate can be manufactured with good controllability. Moreover, since the width of the depletion layer is determined by the impurity concentration of the silicon wafer 1 and the X-ray irradiation amount, the thin film SO having an arbitrary film thickness is formed.
I substrate can be produced. Furthermore, since the conductivity type of the SOI layer can reduce the impurity concentration of the original semiconductor substrate, it is possible to easily and widely control the conductivity type by means such as ion implantation after the thin film SOI substrate is manufactured. Is possible. On the other hand, the ultra-thin SOI substrate required for producing a fully depleted MOS LSI, which is promising as a high-speed and low-power consumption LSI, is required to have a wide depletion layer width and a wide range of impurity concentrations. It Therefore, the present method provides a method for producing an ultrathin film SOI substrate having an arbitrary impurity concentration of a necessary and sufficient thickness with good controllability.

In the above embodiment, X-rays were irradiated to accumulate positive charges in the buried oxide film. Instead of X-rays, ionizing radiation such as γ-rays or synchrotron radiation, or electron rays or ion rays are used. Similar effects can be obtained by irradiating charged particle beams such as.

In the above embodiment, the thin film SO will be used in the future.
Although the first semiconductor on the side to be I is P-type and the second semiconductor is N-type, the same effect can be obtained even if the conductivity type of the second semiconductor is P-type.

In the above embodiment, the potential of the silicon wafer 2 is not fixed when performing the electrochemical etching, but electrodes may be provided to fix the potential of the silicon wafer 2. In this case, the width d1 of the depletion layer formed at the interface between the silicon wafer 1 and the buried oxide film 3 can be controlled in a wider range by setting this potential to an appropriate value. This is because the positive charges in the buried oxide film 3 can be equivalently increased by applying an appropriate potential to the silicon wafer 2, and thereby the depletion layer width can be controlled.

Further, in the above embodiment, the charges accumulated in the buried oxide film 3 are positive charges, but the negative charges may be accumulated by some means. In this case, unlike the above embodiment, the conductivity type of the silicon wafer 1 is N type, and the P-type inversion layer (hole accumulation) and the depletion layer (donor positive ion accumulation) are formed at the interface with the buried oxide film 3 in which negative charges are accumulated. ) Is desired to be formed.

As a method of accumulating negative charges in the buried oxide film, as shown in FIG. 5, a floating state which is provided inside the buried oxide film 3 between the N-type substrate 17 and the N ⁺ -type substrate 18 and has no continuity with the outside is provided. Conductor layer 15 in a state (for example, a conductor layer made of polysilicon doped with a high concentration)
Then, electrons are injected by tunnel injection or avalanche injection through the tunnel oxide film 16 provided in a part of the buried oxide film 3. The thin film S
After fabrication of the OI substrate, this floating conductor layer 15
Can be used as a shield layer for electrical noise.

If holes are injected into the floating conductor layer 15 by tunnel injection or avalanche injection, positive charges are accumulated in the buried oxide film by irradiation with X-rays in the above embodiment. The same effect as can be obtained.

Although the etching surface of the thin film SOI substrate thus prepared is not polished in the above-mentioned embodiment, the smoothness of the surface may be improved by performing mechanochemical polishing of the etching surface, if necessary.

Further, the thin film SO produced by the above embodiment
It is also possible to use an I substrate and epitaxially grow silicon to a predetermined thickness thereon.

[0028]

As described above, according to the present invention, the potentials of the inversion layer and the depletion layer formed at the interface between the insulating film and the first semiconductor substrate during the electrochemical etching of the first semiconductor substrate. Since it can be fixed to the first semiconductor substrate, the etching can be finished when the tip of the etching in the first semiconductor substrate reaches the depletion layer. As a result, an ultra-thin SOI substrate whose film thickness is determined by the width of the depletion layer is obtained. Moreover, since the charges of uniform density are accumulated in the insulating film due to the irradiation of the radiation or charged particles, the widths of the inversion layer and the depletion layer are uniform over the entire surface of the silicon wafer. Moreover, since the resistance component of the inversion layer is small, the potential can be made constant over the entire surface of the silicon wafer. As a result, a thin film SOI substrate having a desired thickness can be manufactured with good controllability.

[Brief description of drawings]

FIG. 1 is a diagram illustrating a manufacturing process of an insulating separation substrate which is an embodiment of the present invention.

FIG. 2 is a diagram illustrating an electrochemical etching method that is an embodiment of the present invention.

FIG. 3 is a wafer top view corresponding to FIG.

FIG. 4A is a band diagram of a thermal equilibrium state before and after X-ray irradiation of the first semiconductor / buried oxide film / second semiconductor structure before X-ray irradiation. (B) is a figure showing a thing after X-ray irradiation.

FIG. 5 is a diagram showing means for accumulating negative charges in a buried oxide film.

[Explanation of symbols]

 1 P-type silicon wafer 2 N-type silicon wafer 3 Buried oxide film 4 Resist 5 N-type high concentration diffusion region 6 Insulating film 7 Electrode 8 Inversion layer 9 Depletion layer 12 Bonded wafer

Claims (1)

[Claims] 1. A step of manufacturing a bonded substrate by bonding a first and a second semiconductor substrate through an insulating film, and a step of forming the bonded substrate from the surface of the first semiconductor substrate to reach the insulating film. Forming a high concentration region having a conductivity type opposite to that of the first semiconductor substrate, irradiating the bonding substrate with radiation or charged particles, and inverting the bonding interface between the insulating film and the first semiconductor substrate. A step of forming a layer and a depletion layer, and etching the first semiconductor substrate by electrochemical etching in an etching solution while fixing the potentials of the inversion layer and the depletion layer with respect to the first semiconductor substrate by the electrodes. A method of manufacturing an insulating separation substrate, comprising: