JPH06308568A - Stroboscopic exposure photometric device - Google Patents

Abstract

PURPOSE:To detect a difference between an optimum exposure level and a stroboscopic exposure level on an APEX calculation when it is impossible to control light at stroboscopic photographing. CONSTITUTION:In a single-lens reflex camera capable of using a stroboscopic device which can emit flash light, reflected light from a film surface, or the front curtain of a shutter is received by a photoelectric conversion part 1. The output from the photoelectric conversion part 1 is integrated by an integration part 2, and the integrated output is compressed and transformed logarithmically by a logarithmical compression and transformation part 3 functioning as a 1st transformation part. A prescribed level is set by a decision level generating part 4 based on a film sensitivity, and the output from the decision level generating part 4 is compressed and transformed logarithmically by a logarithmically compression and transformation part 5 functioning as a 2nd transformation part. The subtraction of the output from the logarithmical compression and transformation part 3 and the output from the logarithmical compression and transformation part 5 is executed by a subtraction part 6 so as to obtain an output showing a deviation from the optimum exposure when the flash light is emitted by the stroboscopic device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flash exposure amount photometric device, and more particularly to a flash exposure amount photometric device for a camera having a photocurrent integrating circuit.

[0002]

2. Description of the Related Art Conventionally, there has been used an apparatus for performing preliminary irradiation at the time of distance measurement, receiving light applied to an object, and measuring the object distance based on the brightness thereof. For example, JP-A-58
In Japanese Patent Laid-Open No. 63927, test light emission is performed prior to stroboscopic photography, photocurrent obtained by receiving reflected light of strobe light is integrated, and a dimmable display is made by comparing the level of the integrated output with a predetermined value. Techniques for performing are disclosed.

[0003]

However, in the known example according to Japanese Patent Laid-Open No. 58-63927, the photographer of the camera can only know whether or not the light control is possible. For example, even in a scene where dimming is possible by bringing the set aperture close to the full aperture, the photographer cannot know how many steps the amount of light is insufficient at the aperture.

The present invention has been made in view of the above problems, and when the dimming cannot be performed in stroboscopic photography, it is possible to detect the step amount of the strobe exposure amount level with respect to the proper exposure amount level, and the photographer obtains the proper exposure. It is an object of the present invention to provide a strobe exposure amount photometric device capable of knowing information for the purpose.

[0005]

That is, the present invention provides a photoelectric conversion means for receiving light reflected from a film surface or a shutter front curtain surface in a single-lens reflex camera capable of using a flash device capable of emitting flash light, Integrating means for integrating the output of the photoelectric converting means, first converting means for performing logarithmic compression conversion of the integrated output of the integrating means, judgment level generating means for setting a predetermined level based on the sensitivity of the film, and Second conversion means for performing logarithmic compression conversion on the output from the determination level generating means, and subtraction of the outputs of the first conversion means and the second conversion means to obtain a deviation from the proper exposure when the strobe device emits a flash light. And subtraction means for obtaining an output indicating the quantity.

[0006]

According to the present invention, in a single-lens reflex camera capable of using a flash device capable of emitting flash light, the light reflected from the film surface or the shutter front curtain surface is received by the photoelectric conversion means. The output of the photoelectric conversion means is integrated by the integration means, and the integrated output is logarithmically compressed and converted by the first conversion means. Further, a predetermined level is set by the judgment level generating means based on the sensitivity of the film, and the output from the judgment level generating means is logarithmically compressed and converted by the second converting means. Then, the output of the first conversion means and the output of the second conversion means are subtracted by the subtraction means, and an output indicating the deviation amount from the proper exposure is obtained when the strobe device emits a flash light.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing a concept of a strobe exposure amount photometric device according to a first embodiment of the present invention. In the figure, the output of the photoelectric conversion unit 1 is supplied to the integration unit 2, and the output of the integration unit 2 is supplied to the logarithmic compression conversion unit 3. On the other hand, the judgment level generating section 4 takes in the sensitivity information of the film and supplies the output to the logarithmic compression converting section 5. Then, the outputs of the logarithmic compression conversion unit 3 and the logarithmic compression conversion unit 5 are supplied to the subtraction unit 6, and the result is obtained as an output.

In such a structure, the reflected light of the strobe light (not shown) from the subject is received by the photoelectric conversion unit 1. Then, the output from the photoelectric conversion unit 1 is integrated by the integration unit 2, and the integrated output is further added to the logarithmic compression conversion unit 3.
Is logarithmically compressed and converted by.

On the other hand, when the film sensitivity information is input to the judgment level generating section 4 from a film sensitivity reading means (not shown) or the like, the judgment level generating section 4 detects the flash exposure amount along with the film sensitivity information. A determination level that is a standard for determining the appropriateness is generated. This judgment level is
It is input to the logarithmic compression conversion unit 5 and subjected to logarithmic compression conversion.

Then, the output of the logarithmic compression conversion unit 3 and the output of the logarithmic compression conversion unit 5 are input to the subtraction unit 6 where they are subtracted. The result subtracted by the subtraction unit 6 is A
It can be obtained as an amount corresponding to the step amount in the PEX calculation.

Next, a second embodiment of the present invention will be described. FIG. 2 is a schematic sectional view of a camera to which the strobe exposure amount photometric device is applied. FIG. 7A is a sectional view of the camera when observing an object, and FIG. 8B is a sectional view of the camera during film exposure.

In FIG. 2A, half of the light from the subject that has passed through the taking lens 9 and the diaphragm 10 is reflected upward by the quick return mirror 11, half of which is transmitted, and the focal plane is transmitted. It goes to the shutter front curtain 12 of the shutter. The film 13 is held immediately after the shutter front curtain 12.

The light reflected upward by the quick return mirror 11 forms an image on the screen focusing screen 14,
Diffused, penta roof prism 15 and eyepiece lens 16
It is observed as a field image through. Reference numeral 17 is a strobe device clipped on to the upper part of the camera.

On the other hand, the light beam transmitted through the quick return mirror 11 is almost imaged on the surface of the shutter front curtain 12. The surface of the shutter front curtain 12 on the side of the quick return mirror 11 is processed to have substantially the same reflectance as the film 13.

Further, the light receiving element 7 which is a silicon photodiode as the photoelectric conversion means and the condenser lens 8 are arranged below the quick return mirror 11. Then, an image almost conjugate with the image formed on the shutter front curtain 12 is
The condenser lens 8 is positioned so as to be guided onto the light receiving surface of the light receiving element 7. Therefore, a photocurrent I _P proportional to the average level of the illuminance on the film surface is generated in the silicon photodiode 7.

During film exposure, the quick return mirror 11 is flipped up to the screen focusing screen 14 side. Further, in this case, the shutter front curtain 12 is the film 1
Evacuate from the 3rd side.

Next, the structure of the electric circuits shown in FIGS. 3 to 6 will be described. As shown in FIG. 3, the silicon photodiode (light receiving element) 7 is connected between the + (plus) and- (minus) terminals of the operational amplifier 20. A reference voltage Vr generated by a circuit described later is input to the + input terminal of the operational amplifier 20. Furthermore, the operational amplifier 20
Between the output terminal and the-input terminal of the capacitor 21 (C
1) and the switch circuit 22 are connected in parallel.

Signal TRG input to switch circuit 22
Is a control signal. This TRG signal is "H
(High level), the switch circuit 22 is the operational amplifier 20
A non-conduction state is established between the − input terminal and the output, and a conduction state is established at “L (low level)”. As described above, the operational amplifier 20, the capacitor 21, and the switch circuit 22 constitute an integrating circuit that integrates the photocurrent output from the silicon photodiode 7 in proportion to the amount of received light.

The output of the operational amplifier 20 is the resistor 24 of R4.
Is input to the negative input terminal of the operational amplifier 23. The reference voltage Vr is input to the + input terminal of the operational amplifier 23. Therefore, the resistor 24 converts the integrated output voltage of the integrating circuit into a current, and the converted current flows through the diode 25 connected between the negative input terminal and the output of the operational amplifier 23.

Transistors 29 to 31 are PNP transistors, each of which has its emitter connected to the power supply voltage Vcc and constitutes a current mirror with its base short-circuited. Further, the transistor 31 is diode-connected by short-circuiting the collector and the base, and the collector and the base are connected to the current source 32 that generates the current value I _COMP set by the film sensitivity or the like. Therefore, the transistor 2
In the collectors of 9 and 30, almost the same current as that of I _COMP is generated.

The collector of the transistor 30 is connected to the anode of the diode 26 and the diode 2
The cathode of 6 is connected to the output of the operational amplifier 23.
The operational amplifier 27 is a buffer amplifier for the anode voltage of the diode 26 and obtains the output OUT1.

The collector of the transistor 29 is connected to the reference voltage Vr via the resistor 28 of R5. The resistance values R4 and R5 of the resistors 24 and 28 are set so that R4 = R5. Further, the collector of the transistor 29 is connected to the-input terminal of the comparator 33. The output of the operational amplifier 20 is input to the + input terminal of the comparator 33.

FIG. 4 shows a circuit for generating a reference voltage. In the figure, a forward voltage obtained by flowing a current I ₀ generated by a constant current source 34 through a diode 35 whose cathode is grounded is input to the + input terminal of an operational amplifier 38. For feedback, a diode 37 is connected with the anode on the −input terminal side, and the current I ₁ generated by the constant current source 36 is input to the anode. Therefore, the output voltage of the operational amplifier 38 is the diode 35,
Assuming that the forward voltage of 37 is V _F1 and V _F2 , it is V _F1 −V _F2, which is represented by the equation (1).

[0024]

[Equation 1]

The operational amplifier 41, the resistor 39 of R0, and the resistor 40 of R1 form a non-inverting amplifier. That +
Since the output of the operational amplifier 38 is input to the input terminal, the output voltage Vr of the operational amplifier 41 is as shown in equation (2).

[0026]

[Equation 2]

Similarly, the operational amplifier 44, the resistor 4 of R2
Since the resistor 43 of 2 and R3 constitutes a non-inverting amplifier, and the output of the operational amplifier 38 is input to the + input terminal,
The output voltage V _ADR of the operational amplifier 44 is as shown in equation (3).

[0028]

[Equation 3] However, Vr = (1/2) · V ADR and so as, R0~R
3 is set.

FIG. 5 shows a current source 32 that produces a current I _COMP .
Shows the configuration of. The NPN transistors 68 to 76 form a current mirror. The reference constant current source 88 is connected to the transistor 76 whose collector and base are short-circuited.
Since the current Ir generated in 1 is supplied, a current substantially the same as Ir is generated in the collectors of the transistors 68 to 75.

In the NPN transistors 77 to 84, the bases and the emitters are short-circuited, and the base line has its voltage clamped by the current I ₂ generated by the constant current source 87 and the diodes 85 and 86 connected in series. Electric current is supplied. The shorted emitter is connected to the collector of the transistor 75. Since the currents generated in the collectors of the transistors 77 to 84 are the same, a current substantially equal to (1/8) Ir is generated in the collectors of the transistors 77 to 84.

Further, since the transistors 68 to 71 that generate a collector current substantially the same as Ir are connected to the point a in the figure, a current of 4 Ir is generated, and similarly, 2Ir is shown in the point b and c in the figure. An Ir current is generated at the point. Further, at the point d in the figure, (4 × 1/8) Ir, that is, (1 /
2) Ir current is generated. Similarly, the point e in the figure is (1
/ 4) Ir, and (1/8) Ir at points f and g in the figure
Is generated.

The switch circuits 50 to 61 select the output of the respective currents generated at the points a to f to the current output terminal I _OUT . An on / off control signal S1 is input to the switch circuit 51, and the switch circuit 5
The inverted signal S1 bar via the inverter 62 is input to 0 as the control signal S1. Switch circuits 50-6
1 is conductive when the input control signal is "H", and is non-conductive when "L".

Therefore, when the control signal S1 is "H", the switch circuit 51 is in the conductive state and the switch circuit 51 is in the non-conductive state, and the current generated at the point a is output to I _OUT . The same applies to the switch circuits 52 to 61. When the control signals S2 to S6 are input "H", the currents generated at the points b to f are output terminals I, respectively.
_It is output to _OUT .

Next, the current Ir generated by the constant current source 88
For the setting of, the known APEX calculation BV + SV = TV
A description will be given based on + AV. Now, the subject brightness is BV x _B
And the AV value corresponding to the aperture of the shooting lens is x _A
2B, the photocurrent generated in the silicon photodiode 7 is I in the film exposure state shown in FIG.
_Suppose it was _P0 . Since the basis of the ISO100 film speed, Applying 5 to SV value, TV value corresponding to the shutter speed for a proper exposure, x _B -x _A
It becomes +5. Therefore, at this time, in the state shown in FIG. 2B, the photocurrent generated from the silicon photodiode 7 is integrated by the integrating circuit (the operational amplifier 20, the capacitor 21, the switch circuit 22) shown in FIG. The integrated voltage level V _INT0 when the film of the voltage V _INT between the output of the operational amplifier 20 and the reference voltage Vr is properly exposed is
It becomes as shown in the equation (4).

[0035]

[Equation 4] Here, V _INT0 does not change even if x _B which is BV and x _A which is AV changes, because I _P0 changes exponentially by 2 correspondingly.

Collector of transistor 29 and reference voltage V
the voltage between r and V _COMP, sets the magnitude V _COMP of V _COMP o'clock film sensitivity ISO100 a _(ISO100) and _{V COMP (ISO100) = V INT0} . On the other hand, I generated by V _COMP and the current source 32
Since between the _COMP has relation of _{I COMP = V COMP / R4,} ISO100 o'clock I _COMP size I _{COMP (ISO100)} is as equation (5).

[0037]

[Equation 5] Here, Ir is set equal to I _{COMP (ISO100)} . In other words, it becomes like the formula (6).

[0038]

[Equation 6]

With the above configuration, in FIG. 5, for example, when the control signal S3 is "H" and the control signals S1, S2, S4, S5, S6 are "L", it is output from the current output terminal I _OUT. I _COMP becomes equal to Ir, and a current corresponding to the film sensitivity ISO100 is output.

Further, for example, when the film sensitivity is ISO 200, the exposure amount which is ½ of the proper exposure amount when ISO 100 is set is the proper exposure amount. Therefore, the magnitude V _{COMP (ISO200)} of V _COMP at this time may be set to V _{COMP (ISO200)} = 1/2 × V _{COMP (ISO100)} . If the current I _COMP generated by the current source 32 is _½ × I _{COMP (ISO100)} , the above V _COMP value can be set, and the magnitude of I _{COMP (ISO100)} is almost equal to the current Ir. / 2) The current of Ir is the current output terminal I of FIG.
It should be generated at _OUT . This is the control signal S
This can be set by supplying "H" to No. 4 and supplying "L" to S1 to S3 and S5 and S6. Table 1 shows the relationship between the film sensitivity and the corresponding setting value of the current I _COMP generated by the current source 32, and the control signals S1 to S6.
Shown in.

[0041]

[Table 1]

FIG. 6 is a block diagram showing the control system of the camera. In the figure, the CPU 90 stores a program for controlling the operation of this camera in an internal ROM (not shown).

To the input port PI1, SV information corresponding to the ISO of film sensitivity taken in by the film sensitivity information section 91 is inputted by manual manual input or film DX code. The number of aperture steps ΔAV from the full aperture to the set aperture is input to the input port PI2 from the aperture setting unit 92 that sets the aperture of the taking lens 9 at the time of shooting. Further, the information F • DT indicating whether or not the flash device 17 can emit a flash light is input to the input port PI3 from the flash control unit 97.

The output port PO1 outputs to the display unit 93 the amount of deviation ΔEV of the EV value with respect to whether or not strobe light control is possible and proper exposure. From the output port PO2, an instruction signal for instructing to start traveling of the shutter front curtain and the rear curtain is output to the shutter control unit 94 which controls the drive of the front curtain and the rear curtain of the focal plane shutter. Furthermore, the output port P
A diaphragm control signal is output from O3 to a diaphragm driving unit 95 that drives the diaphragm 10 of the taking lens 9. In addition, the output port PO4 outputs a mirror control signal to the mirror drive unit 96 that drives the mirror of the quick return mirror 11 to move up and down.

The switch circuit 22 is connected from the output terminal BO0.
"H" or "L" control signal TRG is output. When the TRG signal is "H", the integrating circuit 2
0, 21, and 22 perform integration operation. Output terminals BO1-B
From O6, control signals S1 to S6 for setting the current I _COMP generated by the current source 32 are output.
Further, from the output terminal BO7 to the strobe control unit 97,
FTR to instruct to start flash emission of strobe device 17
The G signal is output. The strobe control unit 97 is an FTR
The strobe device 17 starts emitting light at the rising edge of the G signal from "L" to "H", and the strobe device 17 emits light at the rising edge of "L" to "H" of the OUT2 signal input from the comparator 33. Stop.

To the terminal BI0, the release signal of the release section 98 which normally outputs "L" and outputs a signal which becomes "H" by pressing a release button (not shown) is input. The analog output signal OUT1 from the operational amplifier 27 is input to ADIN. For ADREF,
The reference voltage V _ADR output from the operational amplifier 44 is input. The analog voltage of OUT1 input to ADIN is, for example, a successive approximation type A / in the CPU 90 with reference to V _ADR input to ADREF with respect to GND.
D conversion is performed and converted into a digital value D _IN . A / D
If the conversion is 8 bits, D _IN is given by equation (7).

[0047]

[Equation 7] (Where INT (x) is a function of rounding down to the decimal point of x or less) The output signal OUT2 of the comparator 33 is input to the input terminal BI1.

Next, the operation of the embodiment will be described with reference to the program flow chart of the CPU 90 shown in FIG.
First, in step S1, "L" is applied to the output terminal BO0.
Is output and the TRG signal is set to "L" to initialize the integrating circuits 20, 21, and 22. In this state, regardless of the photocurrent generated in the silicon photodiode 7 which is the light receiving element, the integrated voltage output V _INT
Is equal to the reference voltage Vr. At this time, the output terminal BO
By outputting "L" to 7, the strobe device 17 is in a non-light emitting state and the diaphragm 10 is in an open state.

In step S2, the SV value in the APEX calculation corresponding to the film sensitivity is fetched from the film sensitivity information section 91 through the input port PI1 and stored in the variable SV in the CPU 90. For example, at ISO100, 5 is stored in the variable SV. Succeedingly, in a step S3, the CPU 9 determines the amount of the step difference from the aperture stop to the set aperture by the aperture setting unit 92 via the input port PI2.
Stored in the variable ΔAV within 0. For example, the open aperture F2.
If it is 0 and the aperture is F4.0, 2 is stored in the variable ΔAV.

In step S4, the result of subtracting the stored value of the variable ΔAV from the stored value of the variable SV is stored in the variable SV '. The calculation is performed by the strobe device 17 before photographing, which will be described later.
This is for correcting the difference in the illuminance of the film surface due to the difference in the aperture value of the diaphragm 10 between the test light emission and the main light emission during shooting, and further the difference in the photocurrent I _P generated in the silicon photodiode 7.

Next, in step S5, "1" is added to the stored value of the variable SV ', and the calculated value is stored again in the variable SV'. The calculation is performed by the presence / absence of the quick return mirror 11 in the light beam path from the subject passing through the photographing lens 9 at the time of test light emission and main light emission, which will be described later, and the photocurrent generated in the silicon photodiode 7. This is to correct the difference in I _P. When the quick return mirror 11 is in the light beam path from the subject,
That is, in the mirror-down state, 50% of the light rays are reflected toward the screen focusing screen. Therefore, when the quick return mirror 11 is not in the light path, that is, when the mirror is up, the film surface illuminance and the photocurrent I _P generated in the silicon photodiode 7 are about 1 /
It becomes 2.

In step S6, BO1 to BO are referred to in accordance with the stored value of the variable SV 'by referring to the table corresponding to the contents shown in Table 1 of the ROM in the CPU 90.
6 outputs control signals AS1 to S6. For example, if the variable SV 'is "4", S1 has "L" and S2.
To "H" and S3 to S6 to "L". By the above operation, I _COMP is set in the current source 32, and V
_COMP voltage is set. The corresponding V _COMP voltage is V _COMP1 .

In steps S7 and S8, whether or not the strobe device 17 is capable of emitting light is detected, and the process waits until a state where light emission is possible is achieved. Next, in step S9, the release unit 98 waits for the release operation. If "H" is input to the BI0 input which is the release signal, the process proceeds to step S10.

FIG. 8 is a timing chart showing the operation of test light emission when the process proceeds to steps S10, S11 and S12. In step S10, when the BO0 output becomes "H" and the BO7 output becomes "H", both the TRG signal and the F.TRG signal become "H", and the strobe device 17
Starts emitting light. Further, the integrator circuits 20, 21, 22 start the integration operation to generate V _INT . At this time, when the photocurrent generated in the silicon photodiode 7 is I _P1 , the formula (8) is obtained.

[0055]

[Equation 8] Here, t is time and is a unit of second.

At the same time, since the voltage V _INT is applied to both ends of the resistor 24, a current of V _INT / R4 flows,
The current flows in the forward direction of the diode 25. Therefore, the output voltage V _LOG of the operational amplifier 23 is as shown in the equation (9).

[0057]

[Equation 9] OUT1 output voltage is diode 2 against V _LOG voltage
Since it is a voltage higher than the forward voltage by flowing the current I _COMP to 6, the equation is as shown in equation (10).

[0058]

[Equation 10]

When the voltage of the OUT1 output TRG signal "L" is V ₀ , V _LOG is equal to Vr because no current is generated in the resistor 24. Assuming that the OUT1 voltage value at this time is V ₀ , it becomes as shown in equation (11).

[0060]

[Equation 11]

When the V _INT voltage rises and reaches the V _COMP voltage, the output of the comparator 33 is inverted, and when the OUT2 output “L” rises to “H”, the strobe control unit 97 causes the strobe device 17 to emit light. Stop. V at this time
_{If the COMP} voltage value is V _COMP1 , then V _INT = V _COMP1
Therefore, the OUT1 output is obtained by the equation (12) and becomes substantially equal to the reference voltage Vr.

[0062]

[Equation 12]

In step S11, when "H" of OUT2 output input to BI1 is detected, step S1
Branch to 2. In this step S12, the TRG signal and the F.TRG signal are set to "L", and V _INT and OU
T1 and OUT2 are initialized. Further, the time from the rising of the TRG signal to the rising of the OUT2 signal is t ₁ .

Next, in step S13, the control signals S1 to S6 are re-outputted from BO1 to BO6 by referring to the table corresponding to the above table 1 in the same manner as in step S6, according to the stored value of the variable SV.

Next, in steps S14 and S15, the state of the strobe device 17 is detected as in steps S7 and S8, and the process waits until light emission becomes possible. Then, in step S16, a control signal is output from the output port PO4 to the mirror driving unit 96 so as to bring the quick return mirror 11 into the mirror-up state (see FIG. 2B).

In step S17, the narrowing step difference information Δ
Based on AV, the aperture 10 is output to the aperture drive unit 95 so that the aperture 10 has the aperture value set by the aperture setting unit 92.
A control signal is output from O3. Then, step S18
At, the control signal for driving the shutter front curtain is output from the output port PO2 to the shutter controller 94.

Next, the operation in steps S19 and S20 will be described with reference to the timing chart of FIG.
As shown in FIG. 2B, after the film exposure is started, T
By "H" of RG signal and "H" of F · TRG signal,
The strobe device 17 starts main light emission, and the integration circuits 20, 2
1, 22 start the integration operation. At this time, if the photocurrent generated in the silicon photodiode 7 is I _P2 , the integrated voltage V _INT output from the integrating circuit is: V _INT = (I _P2 / C1) · t (t: time is in seconds ). Therefore, V _INT rises with time and V _{INT
When the COMP} voltage is reached, the comparator 33 outputs OUT2
Output "H" to the output. As a result, the flash control unit 97 stops the flash device 17 from emitting light.

The V _COMP voltage is set to V _COMP2 . Here, since the V _COMP voltage is set equal to the V _INT voltage when the film is properly exposed by the ISO information of the film sensitivity, the strobe device 17 emits light as much as the film is properly exposed. .

Here, the test light emission is compared with the main light emission. Looking at the photocurrent generated in the silicon photodiode 7, the relationship of the equation (13) is established between I _P1 and I _P2 due to the difference in the diaphragm 10 and the difference in the up state and the down state of the quick return mirror 11. .

[0070]

[Equation 13] Further, since the V _COMP voltage values V _COMP1 and V _COMP2 differ by a multiple of 2 of the difference between the variables SV and SV ′,
The relationship of equation (14) holds.

[0071]

[Equation 14] On the other hand, the flash time t ₂ of the strobe device 17 during the main flash is
It becomes like the formula (15).

[0072]

[Equation 15] As a result, t ₁ = t ₂ .

From the above, the relationship between the photocurrent I _P generated in the silicon photodiode 7 during the test light emission and the main light emission and the set V _COMP voltage value is as follows.
It can be said that the relative ratios are equal.

The CPU 90 outputs OUT2 in step S20.
When the signal "H" is detected from the BI1 input, step S
At 21, the control signal is output to the shutter control section 94 from the output port PO2 so that the shutter rear curtain travels. Then, in step S22, the output port PO is output to the diaphragm drive unit 95.
A control signal is output from 3 to open the diaphragm 10.
Then, in step S23, a control signal is output to the mirror driving unit 96 from the output port PO4 so that the quick return mirror 11 is mirrored down. Then, in step S28, the terminals BO0 and BO7 that output the TRG signal and the F.TRG signal are initialized to "L", and this processing ends.

Next, in steps S10, S11, S24,
The operation when proceeding to S25 and S26 will be described with reference to the timing chart of FIG. In step S10, when “H” is output as the TRG signal and the F · TRG signal from the output terminals BO0 and BO7, the strobe device 17 starts emitting light, and the integrating circuits 20, 21, 22 start the integrating operation. As I did.

Although the integrated voltage output V _INT rises, the photocurrent generated in the silicon photodiode 7 is small with respect to the voltage level of V _COMP1 set in step S6, depending on the subject condition and the like. Therefore, the V _INT voltage does not reach the voltage value of V _COMP1 even if the flash device 17 fully uses all the light emission energy inside, and the “H” signal of OUT2 is not output at this time.
The photocurrent at this time is I _P1 ′, and the time required for the strobe device 17 to fully emit light is t ₃ . Further, the V _INT voltage value when the strobe device 17 fully emits light is defined as V _INT1 .

In steps S11 and S24, the full light emission time t ₃ has sufficiently elapsed from the start of strobe light emission, and the CP
During the time t ₄ stored in the ROM in U90, BI1
The OUT2 signal is monitored by the input. Time t ₄
Is generally measured using, for example, a timer circuit built in the CPU 90. When this time t ₄ has elapsed, the CPU 90 sets to generate an overflow signal, operates the timer circuit at the same time as the F · TRG signal “H”, and subsequently determines whether or not there is an overflow signal in step S24.

Then, after t ₄ hours have elapsed from the start of strobe light emission, OUT input to ADIN in step S25
A / D conversion of one voltage. This OUT1 voltage is (1
It is expressed by the equation 6).

[0079]

[Equation 16] The digital value DIN of the A / D conversion result is (1
It becomes like the formula 7).

[0080]

[Equation 17]

Since the photocurrent I _P generated in the silicon photodiode 7 and the V _COMP voltage set by the film sensitivity have the same relative ratio during the test light emission of the strobe device 17 and during the main light emission, V _INT1 Corresponds to the exposure amount of the film during main light emission, and V _COMP1 corresponds to the proper exposure amount of the film. Therefore, log2 (V _INT1 / V
_COMP1 ) is the APE of film exposure amount for proper exposure
It is the amount of excess or deficiency of the EV value in the X calculation, which corresponds to the number of deficient stages in the EV value of the actual exposure from DIN.
V is calculated in step S26.

Next, in step S27, display data and control signals are output from the output port PO1 to the display section 93 so that the calculated ΔEV is displayed on a display member (not shown). After that, in step S28, the TRG signal and the F / TRG signal are initialized, and the present process ends.

In FIGS. 8 to 10, the light emission waveform by the flash light emission of the strobe device 17 is approximated to a rectangular wave for convenience. In the second embodiment, the underexposure is detected by the test light emission performed prior to the film exposure, but it is also possible to detect the excess or deficiency of the film exposure amount with respect to the appropriate amount as a post-confirmation after stroboscopic photography. It is valid.

As described above, according to the second embodiment, since the mirror up and the lens diaphragm are not narrowed down during the test light emission, the object is confirmed by the viewfinder.
Test light emission can be performed, and time loss due to mirror driving and diaphragm driving does not occur. Further, the finally detected ΔEV has an advantage that it has no temperature dependence.

Next, a third embodiment of the present invention will be described. FIG. 11 is an electric circuit diagram of a third embodiment obtained by modifying the circuit shown in FIG. 3 in the second embodiment described above.

In FIG. 11, the silicon photodiode 7, which is a light receiving element, is connected between the + and − input terminals of the operational amplifier 103. The switch circuit 101 and the capacitor 102 (C1) are connected between the + input terminal of the operational amplifier 103 and the reference voltage Vr. The switch circuit 101 is turned on and off by the input of the control signal TRG, and normally becomes conductive when "L" and non-conductive when "H". The output of the operational amplifier 103 is the NPN transistor 1
Feedback is applied to the-input terminal via the base and emitter of 04, and the feedback path is connected to the reference voltage Vr via the resistor 107 of R4.

The PNP transistors 105 and 106 are current mirrors for folding back the collector current of the transistor 104, and the folded current is input to the diode 108. The anode voltage of the diode 108 is input to the + input terminal of the operational amplifier 112. The operational amplifier 112 is fed back between the output and the-input terminal by the diode 109, and the current I _COMP generated from the current source 110 is flown into the output of the operational amplifier 112 via the diode 109. Further, the operational amplifier 112
Is set to OUT1.

The emitter voltage of the transistor 104 is input to the + input terminal of the comparator 111, and the V _COMP voltage is input to the − input terminal from a voltage source (not shown). Then, the output of this comparator 111 is output to OUT2
And

The circuit for generating the reference voltages Vr and V _COMP and the current source 110 for generating I _COMP are in accordance with the second embodiment described above. Further, the arrangement of the silicon photodiode 7, the peripheral circuit for setting the control I _COMP and V _COMP of the TRG signal, and the fetching of OUT1, OUT2, etc. are also in accordance with the above-described second embodiment, and therefore the description will be given here. Omit it.

Next, the operation of the third embodiment will be described. When “H” is input to the TRG signal, the photocurrent I _P generated in the silicon photodiode 7 is transferred to the capacitor 10
The voltage charged to 2 is generated. This charging voltage is equal to the voltage V _INT with respect to Vr of the emitter of the transistor 104 due to the imaginary short circuit of the operational amplifier 103.

Here, V _INT = (I _P / C1) t (t: unit of time in seconds), the voltage V _INT is applied across the resistor 107, and the current of V _INT / R4 is a transistor. It flows as an emitter current of 104.

The emitter current and the collector current of the transistor 104 are almost the same when h _FE is sufficiently large, so that they are looped back by the transistors 105 and 106 and the diode 108 has almost the same V _INT / R4. An electric current flows. Therefore, the + input voltage V _LOG of the operational amplifier 112 is expressed by the equation (18).

[0093]

[Equation 18] From this, the voltage of OUT1 becomes as shown by the equation (19).

[0094]

[Formula 19]

Here, when setting is made so that I _COMP = V _COMP / R4, OUT1 is expressed by the equation (20), and an output equivalent to that of the second embodiment (FIG. 3) described above is obtained. Can be obtained.

[0096]

[Equation 20] According to the third embodiment, the number of circuit components can be reduced as compared with the second embodiment described above.

[0097]

As described above, according to the present invention, since the step information in the EV value of the exposure amount of the film with respect to the proper exposure amount can be easily detected by using the integrated output for strobe light control, the photographer can easily detect it. Can know how to change the setting conditions such as the diaphragm in order to obtain appropriate exposure from the step information for the appropriate level.

[Brief description of drawings]

FIG. 1 is a block diagram showing a concept of a strobe exposure amount photometric device in a first embodiment of the present invention.

FIG. 2 is a schematic sectional view of a camera to which a flash exposure amount metering device is applied according to a second embodiment of the present invention, in which (a) is a sectional view of the camera when observing an object, (B)
FIG. 3 is a sectional view of the camera during film exposure.

FIG. 3 is an electric circuit diagram of a strobe exposure amount photometric device according to a second embodiment.

FIG. 4 is an electric circuit diagram showing a circuit for generating a reference voltage.

FIG. 5 is an electric circuit diagram showing a configuration of a current source 32 that generates a current I _COMP .

6 is a block diagram showing a control system of the camera of FIG.

FIG. 7 is a flow chart illustrating the operation of a program of CPU 90 in the second embodiment.

FIG. 8 is a timing chart showing an operation of test light emission when the process proceeds to steps S10, S11, and S12 of FIG.

9 is a timing chart showing the operation in steps S19 and S20 of FIG.

FIG. 10 shows steps S10, S11, S24 and S of FIG.
25 is a timing chart showing an operation when proceeding to S25 and S26.

FIG. 11 is an electric circuit diagram of a strobe exposure amount photometric device according to a third embodiment.

[Explanation of symbols]

DESCRIPTION OF SYMBOLS 1 ... Photoelectric conversion part, 2 ... Integration part, 3, 5 ... Logarithmic compression conversion part, 4 ... Judgment level generation part, 6 ... Subtraction part, 7 ... Silicon photodiode (light receiving element), 8 ... Condensing lens, 9 ...
Shooting lens, 10 ... Aperture, 11 ... Quick return mirror, 12 ... Shutter front curtain, 13 ... Film, 14 ... Screen focusing plate, 15 ... Penta-Dach prism, 16 ... Eyepiece, 17 ... Strobe device.

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[Procedure amendment]

[Submission date] January 19, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

The collector of the transistor 30 is connected to the anode of the diode 26, the diode 2
The cathode of 6 is connected to the output of the operational amplifier 23.
The operational amplifier 27 is a buffer amplifier for the anode voltage of the diode 26 and obtains the output OUT1.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Name of item to be corrected] 0083

[Correction method] Change

[Correction content]

In FIGS. 8 to 10, the light emission waveform by the flash light emission of the strobe device 17 is approximated to a rectangular wave for convenience. In the second embodiment, the underexposure is detected by the test light emission performed prior to the film exposure, but it is also possible to detect the excess or deficiency of the film exposure amount with respect to the appropriate amount as a post-confirmation after stroboscopic photography. It is valid. Further, in the second embodiment, the subtraction unit 6 in the first embodiment is operated by the configuration of the electric circuit.
Even if the forward voltages obtained by passing the currents corresponding to I _COMP and V _INT / R4 through the diodes are respectively A / D converted and taken into the CPU 90, and the respective digital values are subtracted in the CPU 90, the same result is obtained. The effect is obtained.

Claims (1)

[Claims] 1. A photoelectric conversion means for receiving reflected light from a film surface or a shutter front curtain surface in a single-lens reflex camera capable of using a flash device capable of emitting flash light, and integrating the output of this photoelectric conversion means. Integrating means, first converting means for performing logarithmic compression conversion of the integrated output of the integrating means, decision level generating means for setting a predetermined level based on the sensitivity of the film, and output from the determining level generating means Second converting means for compressing and converting, and subtracting means for subtracting the output of the first converting means and the output of the second converting means to obtain an output indicating a deviation amount from the proper exposure when the strobe device emits a flash light. A strobe exposure amount photometric device comprising: