JPH06326098A - Method for manufacturing semiconductor device - Google Patents

Abstract

(57) [Abstract] [Purpose] To improve the reliability of the upper layer wiring by eliminating the step due to the lower layer wiring at the location where the lower layer wiring and the upper layer wiring intersect with each other through the oxide film. A method for manufacturing a semiconductor device is provided. [Steps] By forming a recess in an oxide film, depositing a wiring layer, and then etching back the entire wiring layer so that the wiring pattern is embedded in the oxide film, a step difference can be suppressed. It is possible to suppress the step difference of the wiring formed thereon via the oxide film and improve the reliability thereof.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a planarization technique for multilayer wiring.

[0002]

2. Description of the Related Art FIG. 3 shows an essential part of a conventional method of manufacturing a semiconductor device. After depositing the first oxide film 22 and the first metal wiring layer 23 on the semiconductor substrate 21 made of silicon,
The wiring pattern 24 is formed with photoresist (FIG. 3).
(A)). Thereafter, anisotropic etching by RIE and resist removal were performed to form the first metal wiring pattern 25 shown in FIG. 3B.

[0003]

However, after forming the first metal wiring pattern 25, the second oxide film 2 is formed.
6 is deposited and a second metal wiring pattern 27 which is orthogonal to the first metal wiring pattern 25 is formed, in the conventional technique, as shown in FIG. 3C, the second metal wiring pattern 27 is formed. Is the first metal wiring pattern 2
There is a problem that the pattern width becomes narrow due to the problem of the step difference caused by No. 5 and the depth of focus at the time of photoresist formation, especially in the high step difference portion A (FIG. 4), and the reliability of the wiring deteriorates.

The present invention has been made in view of the above-mentioned problems of the prior art, and its main purpose is to provide a wiring at the lower layer side and a wiring at the upper layer side where an oxide film intersects.
It is an object of the present invention to provide a method for manufacturing a semiconductor device, which can eliminate the step due to the wiring on the lower layer side and improve the reliability of the wiring on the upper layer side.

[0005]

According to the present invention, there is provided a method for manufacturing a semiconductor device having an oxide film on a substrate and a wiring pattern embedded in the oxide film.
A process of depositing an oxide film on the substrate, a process of selectively etching the oxide film to an intermediate portion thereof to form recesses having the wiring pattern shape, and a wiring layer deposited on the oxide film. And a step of forming a buried wiring layer in the recess by etching back. Then, the present invention is achieved by providing a method for manufacturing a semiconductor device.

[0006]

A step can be suppressed by depositing a wiring layer on the oxide film in which the concave portion is formed and then etching back the entire wiring layer to embed the wiring pattern in the oxide film.

[0007]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT A preferred embodiment of a method for manufacturing a semiconductor device of the present invention will be described in detail below with reference to the accompanying drawings.

1 (a) to 1 (e) are sectional views showing an essential part of a method of manufacturing a semiconductor device to which the present invention is applied. First, a first oxide film 2 is deposited on a semiconductor substrate 1 made of silicon, and a resist 3 for forming a first metal wiring pattern is formed (FIG. 1A). next,
Anisotropic etching by RIE and subsequent resist removal are performed to form a recess pattern 4 which will become a first metal wiring pattern in the first oxide film 2 (FIG. 1).
(B)). Further, by depositing the first metal wiring material 6 (FIG. 1C) and performing etch back on the entire surface,
The recessed pattern 4 is formed so as to embed the first metal wiring pattern 7 (FIG. 1D). As a result, the step due to the first metal wiring pattern 7 does not occur.

Next, a second oxide film 8 is deposited on the first oxide film 2 and the first metal wiring pattern 7 to form a second metal wiring pattern 9 (FIG. 1 (e)). At this time, since the lower layer of the second metal wiring pattern 9 is flat, there is no concern that the portion of the second metal wiring pattern 9 on the first metal wiring pattern 7 becomes thin, and the design It can be formed according to the dimensions (Fig. 2).

[0010]

As described above, according to the present invention, the recess is formed in the oxide film, the wiring layer is deposited, and then the entire wiring layer is etched back to fill the wiring pattern in the oxide film. By doing so, it is possible to suppress the step,
That is, it is possible to suppress the step difference of the wiring formed thereon via the oxide film and improve the reliability thereof.

[Brief description of drawings]

1A to 1E are cross-sectional views showing a main part of a method for manufacturing a semiconductor device to which the present invention is applied.

FIG. 2 is a schematic surface view of a semiconductor device manufactured by a manufacturing method to which the present invention is applied.

3A to 3C are cross-sectional views showing a main part of a conventional method for manufacturing a semiconductor device.

FIG. 4 is a schematic surface view of a semiconductor device manufactured by a conventional manufacturing method.

[Explanation of symbols]

 1 Semiconductor Substrate 2 First Oxide Film 3 Resist 4 Recessed Pattern 6 First Metal Wiring Material 7 First Metal Wiring Pattern 8 Second Oxide Film 9 Second Metal Wiring Pattern 21 Semiconductor Substrate 22 First Oxide Film 23 first metal wiring layer 24 wiring pattern 25 first metal wiring pattern 26 second oxide film 27 second metal wiring pattern

Claims (1)

[Claims] 1. A method of manufacturing a semiconductor device having an oxide film on a substrate and a wiring pattern embedded in the oxide film, the process comprising depositing the oxide film on the substrate, A step of selectively etching up to an intermediate portion to form a recess having the wiring pattern, and a step of depositing a wiring layer on the oxide film and then etching back to form a buried wiring layer in the recess. A method of manufacturing a semiconductor device, comprising: