JPH06334256A - Method for manufacturing semiconductor light reflecting layer - Google Patents

Method for manufacturing semiconductor light reflecting layer

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Publication number
JPH06334256A
JPH06334256A JP11613893A JP11613893A JPH06334256A JP H06334256 A JPH06334256 A JP H06334256A JP 11613893 A JP11613893 A JP 11613893A JP 11613893 A JP11613893 A JP 11613893A JP H06334256 A JPH06334256 A JP H06334256A
Authority
JP
Japan
Prior art keywords
semiconductor light
reflecting layer
layer
light reflecting
growth temperature
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11613893A
Other languages
Japanese (ja)
Inventor
Taketaka Kohama
剛孝 小濱
Yoshitaka Ooiso
義孝 大礒
Yoshiaki Kadota
好晃 門田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NTT Inc
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP11613893A priority Critical patent/JPH06334256A/en
Publication of JPH06334256A publication Critical patent/JPH06334256A/en
Pending legal-status Critical Current

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Abstract

(57)【要約】 【目的】 MOCVD法を用いて、高反射率を維持で
き、しかも低抵抗な半導体光反射層を製造し得る方法を
提供する。 【構成】 MOCVD法によりZnをp型ドーパントと
して用いてAlX Ga1-X As/AlY Ga1-Y As
(X>Y,0≦X,Y≦1)からなる半導体光反射層を
形成する際、成長温度をn型のAlX Ga1-X As/A
Y Ga1-Y Asからなる半導体光反射層12を形成す
る際の成長温度より少なくとも150 ℃下げるとともに、
AlY Ga1-Y Asに比べてAlX Ga1-X Asの方に
より多くのZnをドーピングすることにより、高反射率
で且つ極めて低抵抗な半導体光反射層14を得る。
(57) [Summary] [Object] To provide a method capable of producing a semiconductor light-reflecting layer capable of maintaining high reflectance and having low resistance by using the MOCVD method. [Structure] Al X Ga 1-X As / Al Y Ga 1-Y As using Zn as a p-type dopant by the MOCVD method.
When the semiconductor light reflection layer composed of (X> Y, 0 ≦ X, Y ≦ 1) is formed, the growth temperature is set to n-type Al X Ga 1 -X As / A.
The temperature is lowered by at least 150 ° C. from the growth temperature when forming the semiconductor light reflecting layer 12 made of l Y Ga 1 -Y As, and
By doping more Zn in Al X Ga 1-X As than in Al Y Ga 1-Y As, a semiconductor light-reflecting layer 14 having high reflectance and extremely low resistance is obtained.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、MOCVD法によりZ
nをp型ドーパントとして用いてAlX Ga1-X As/
AlY Ga1-Y Asからなる半導体光反射層を製造する
方法に関するものである。
BACKGROUND OF THE INVENTION The present invention is based on the MOCVD method.
Al x Ga 1-x As / using n as a p-type dopant
The present invention relates to a method for producing a semiconductor light reflection layer made of Al Y Ga 1 -Y As.

【0002】[0002]

【従来の技術】面発光レーザは、結晶成長等の技術によ
り、光共振器を基板主面に対して垂直に形成し、レーザ
光を前記基板主面に対して垂直方向に取り出すようにし
たものであり、その構造から基板上に容易に高密度二次
元集積することが可能である。該面発光レーザは、最近
では0.78μmから1.55μmまでの発振波長に対応した様
々な材料系で試みられており、しかも通常のレーザと比
較してその体積が小さいため、1mAを下回る極めて低
い閾値電流を有するレーザが実現可能となっている。
2. Description of the Related Art A surface emitting laser is one in which an optical resonator is formed perpendicularly to the main surface of a substrate by a technique such as crystal growth, and laser light is extracted in a direction perpendicular to the main surface of the substrate. Therefore, it is possible to easily perform high-density two-dimensional integration on the substrate due to the structure. Recently, the surface emitting laser has been tried with various material systems corresponding to the oscillation wavelength from 0.78 μm to 1.55 μm, and its volume is smaller than that of a normal laser, so that the threshold value is extremely low below 1 mA. Lasers with an electric current have become feasible.

【0003】前記面発光レーザにおいてレーザ発振させ
るためには、該面発光レーザを構成するエタロンのQ
値、即ち第1及び第2の半導体光反射層の反射率を極め
て高いものにしなければならない。このため、通常、半
導体光反射層は格子定数が整合する条件で第1の屈折率
1 、第2の屈折率n2 (n1 >n2 )を有する半導体
を、発振波長の1/4光学波長の膜厚で交互に分布させ
て構成していた。具体的には、例えばAl0.2 Ga0.8
As/GaAs量子井戸層(QWs)を活性層に有する
発振波長0.85μm面発光レーザにおいては、高い反射率
(99%以上)を実現するため、反射層は発振波長にお
いて吸収がほとんど無視でき、可能な限り屈折率差を大
きくとったAl0.15Ga0.85As(屈折率3.58)とAl
As(屈折率2.98)とから構成していた。
In order to oscillate the surface emitting laser, the Q of the etalon that constitutes the surface emitting laser is used.
The value, that is, the reflectance of the first and second semiconductor light-reflecting layers must be extremely high. Therefore, in the semiconductor light reflecting layer, normally, a semiconductor having a first refractive index n 1 and a second refractive index n 2 (n 1 > n 2 ) is ¼ of the oscillation wavelength under the condition that the lattice constants are matched. It is configured such that the film thicknesses of the optical wavelengths are alternately distributed. Specifically, for example, Al 0.2 Ga 0.8
In a surface emission laser with an oscillation wavelength of 0.85 μm, which has an As / GaAs quantum well layer (QWs) as an active layer, a high reflectance (99% or more) is realized. Al 0.15 Ga 0.85 As (refractive index 3.58) and Al with a large refractive index difference
And As (refractive index 2.98).

【0004】[0004]

【発明が解決しようとする課題】ところで、前記半導体
光反射層を通して電流を注入する場合、半導体光反射層
を構成する第1及び第2の半導体の禁制帯幅が大きく異
なった(ΔEg〜0.7 eV)20〜30対のヘテロ接合
により形成されているため、特にp型ではバンド不連続
性からメサ径20〜30μmサイズで数kΩと極めて高
抵抗になることが知られている。このため、MBE法で
製造する場合は前記第1及び第2の半導体の間にAl組
成中間層あるいはAl組成傾斜層を導入することによっ
て、低抵抗化を図っていた。
By the way, when a current is injected through the semiconductor light reflecting layer, the forbidden band widths of the first and second semiconductors constituting the semiconductor light reflecting layer are largely different (ΔEg to 0.7 eV). Since it is formed by 20 to 30 pairs of heterojunctions, it is known that the p-type has a very high resistance of several kΩ at a mesa diameter of 20 to 30 μm due to band discontinuity. For this reason, in the case of manufacturing by the MBE method, the resistance is reduced by introducing an Al composition intermediate layer or an Al composition gradient layer between the first and second semiconductors.

【0005】しかしながら、前記MBE法と比較して量
産性に富んでいるMOCVD法の場合、MBE法とは成
長機構(あるいは成長条件)が異なり、また、一般的に
用いられるドーパント種が比較的拡散しやすいZnであ
るため、前記半導体光反射層の構造を変化させても、ほ
とんど低抵抗化することができないという問題があっ
た。
However, the MOCVD method, which is more producible in mass production than the MBE method, has a different growth mechanism (or growth condition) from the MBE method, and the commonly used dopant species are relatively diffused. Since Zn is easy to perform, there has been a problem that even if the structure of the semiconductor light reflection layer is changed, the resistance cannot be lowered almost.

【0006】本発明は前記従来の問題点に鑑み、MOC
VD法を用いて、高反射率を維持でき、しかも低抵抗な
半導体光反射層を製造し得る方法を提供することを目的
とする。
In view of the above conventional problems, the present invention provides an MOC.
It is an object of the present invention to provide a method capable of maintaining a high reflectance and manufacturing a semiconductor light reflection layer having a low resistance by using the VD method.

【0007】[0007]

【課題を解決するための手段】本発明では前記目的を達
成するため、MOCVD法によりZnをp型ドーパント
として用いてAlX Ga1-X As/AlY Ga1-Y As
(X>Y,0≦X,Y≦1)からなる半導体光反射層を
形成する半導体光反射層の製造方法において、成長温度
をn型のAlX Ga1-X As/AlY Ga1-Y Asから
なる半導体光反射層を形成する際の成長温度より少なく
とも150 ℃下げるとともに、AlY Ga1-Y Asに比べ
てAlX Ga1-X Asの方により多くのZnをドーピン
グするようになした半導体光反射層の製造方法を提案す
る。
In order to achieve the above object, the present invention uses Al x Ga 1 -x As / Al y Ga 1 -y As as a p-type dopant using Zn by the MOCVD method.
In a method of manufacturing a semiconductor light-reflecting layer for forming a semiconductor light-reflecting layer consisting of (X> Y, 0 ≦ X, Y ≦ 1), a growth temperature is n type Al X Ga 1-X As / Al Y Ga 1- At least 150 ° C. lower than the growth temperature at the time of forming the semiconductor light reflection layer made of Y As, and more Zn is doped in Al X Ga 1-X As than Al Y Ga 1-Y As. A method of manufacturing the semiconductor light reflection layer is proposed.

【0008】[0008]

【作用】本発明によれば、量産に適したMOCVD法に
より、従来のものと比べて高反射率を維持でき且つ極め
て低抵抗な半導体光反射層を得ることができる。
According to the present invention, it is possible to obtain a semiconductor light-reflecting layer which can maintain a high reflectance and has an extremely low resistance as compared with the conventional one by the MOCVD method suitable for mass production.

【0009】[0009]

【実施例】以下、本発明による半導体光反射層を用いた
実施例として、AlGaAs/GaAs超格子を活性層
として用いた発振波長0.85μm面発光レーザの場合につ
いて説明する。なお、実施例は一つの例示であって、本
発明の精神を逸脱しない範囲で種々の変更あるいは改良
を行い得ることは言うまでもない。
EXAMPLE As an example using the semiconductor light reflecting layer according to the present invention, a case of an oscillation wavelength 0.85 μm surface emitting laser using an AlGaAs / GaAs superlattice as an active layer will be described below. Needless to say, the embodiment is merely an example, and various modifications and improvements can be made without departing from the spirit of the present invention.

【0010】図1はp型半導体光反射層の成長温度に対
する抵抗依存性をチェックするための素子の一例を示す
もので、p型GaAs基板1上にp型Al0.15Ga0.85
As/AlAs10対からなる半導体光反射層2を形成
し、その後、GaAs基板1までエッチオフし、さらに
構造表面及び裏面にそれぞれ、AuZnNi/Auから
なるオーミック電極3及び4を形成したものである。
FIG. 1 shows an example of an element for checking the resistance dependence of the p-type semiconductor light reflection layer on the growth temperature. A p-type Al 0.15 Ga 0.85 is formed on a p-type GaAs substrate 1.
A semiconductor light reflection layer 2 made of As / AlAs10 pairs is formed, and then the GaAs substrate 1 is etched off, and ohmic electrodes 3 and 4 made of AuZnNi / Au are formed on the front and back surfaces of the structure, respectively.

【0011】図2は図1の素子の抵抗値をI−V測定に
より評価し、成長温度に対する依存性を表したもので、
横軸は素子のメサ半径、縦軸は抵抗値である。同図よ
り、成長温度が750 ℃の場合は抵抗値が高すぎて測定で
きなかったが、成長温度を下げるにつれて素子抵抗がl
ogスケールで下がることがわかる。そして、成長温度
をn型半導体光反射層を形成する際の温度(750 ℃)か
ら120 ℃下げたところ(630 ℃)で、MBE法で報告さ
れている値とほぼ等しくなり、素子抵抗が飽和した。な
お、図中の「Graded」とはAl0.15Ga0.85As
層とAlAs層との間の組成変化がなだらかである場合
を、また、また、「Abrupt」とは前記組成変化が
急である場合をそれぞれ示す。
FIG. 2 shows the dependence of the resistance of the device of FIG. 1 on the growth temperature, which was evaluated by IV measurement.
The horizontal axis is the mesa radius of the element, and the vertical axis is the resistance value. From the figure, when the growth temperature was 750 ° C, the resistance value was too high to measure, but as the growth temperature was lowered, the device resistance was
You can see that it goes down on the og scale. Then, when the growth temperature was lowered by 120 ° C (630 ° C) from the temperature at which the n-type semiconductor light-reflecting layer was formed (750 ° C), it was almost equal to the value reported by the MBE method, and the element resistance saturated. did. In addition, "Graded" in the figure means Al 0.15 Ga 0.85 As
The case where the composition change between the layer and the AlAs layer is gentle, and "Abrupt" indicates the case where the composition change is abrupt.

【0012】この際、Al0.15Ga0.85Asのドーピン
グ濃度が1×1019cm-3以上となり、発振波長850 n
mにおけるフリーキャリア吸収が1000cm-3程度になっ
てしまうため、1%程度の反射率の低下が生じた。そこ
で、成長温度を前記n型半導体光反射層を形成する際の
温度(750 ℃)から150 ℃下げ(600 ℃)、Al0.15
0.85Asに比べてAlAsの方により多くのZnを導
入する変調ドーピングを行ったところ、同様の抵抗値を
得た。
At this time, the doping concentration of Al 0.15 Ga 0.85 As becomes 1 × 10 19 cm −3 or more, and the oscillation wavelength is 850 n.
Since the free carrier absorption at m was about 1000 cm −3 , the reflectance was reduced by about 1%. Therefore, the growth temperature is lowered by 150 ° C. (600 ° C.) from the temperature (750 ° C.) at the time of forming the n-type semiconductor light reflection layer, and Al 0.15 G
When modulation doping was performed to introduce more Zn into AlAs than with a 0.85 As, the same resistance value was obtained.

【0013】以上のことからも明らかなように、少なく
ともp型半導体光反射層の形成時の成長温度をn型半導
体光反射層を形成する際の温度から150 ℃下げ、且つ、
前記Al0.15Ga0.85Asに比べてAlAsの方により
多くのZnをドーピングすることが必要である。
As is clear from the above, at least the growth temperature at the time of forming the p-type semiconductor light reflecting layer is lowered by 150 ° C. from the temperature at the time of forming the n-type semiconductor light reflecting layer, and
It is necessary to dope more Zn in AlAs than in Al 0.15 Ga 0.85 As.

【0014】図3は本発明方法により製造した半導体光
反射層を備えた面発光レーザの一実施例を示すものであ
る。
FIG. 3 shows an embodiment of a surface emitting laser provided with a semiconductor light reflecting layer manufactured by the method of the present invention.

【0015】これを製造するには、まず、厚さ350 μm
のn型GaAs結晶基板11上に、減圧MOCVD法に
よって成長温度750 ℃でn型GaAsバッファ層を成長
させる。次に、同様の成長温度で各層の膜厚がλ/4n
(nは屈折率)からなるドーピング濃度1×1018cm
-3のn型Al0.15Ga0.85As/AlAs34.5対からな
る第1の半導体光反射層12を形成する。
In order to manufacture this, first, the thickness is 350 μm.
An n-type GaAs buffer layer is grown on the n-type GaAs crystal substrate 11 by a low pressure MOCVD method at a growth temperature of 750 ° C. Next, at the same growth temperature, the film thickness of each layer is λ / 4n.
(N is the refractive index) Doping concentration 1 × 10 18 cm
-3 n-type Al 0.15 Ga 0.85 As / AlAs 34.5 pair is formed to form the first semiconductor light reflection layer 12.

【0016】次に、Al0.3 Ga0.7 As層13a,活
性層として6対からなるAl0.2 Ga0.8 As/GaA
s超格子層13b及びAl0.3 Ga0.7 As層13cか
らなる全体が発振波長の光学膜厚であるキャビティー層
13を形成する。その後、成長温度を600 ℃に降温さ
せ、同様に各層の膜厚がλ/4nからなるp型Al0.15
Ga0.85As(p〜1018cm-3)/AlAs(p〜1
19cm-3)27対からなる第2の半導体光反射層14
を、DEZの流量を変調させて形成し、金属(Au)と
の位相マッチング及びコンタクト層を兼ねたp++型Al
0.15Ga0.85Asからなるマッチング層15を形成す
る。
Next, an Al 0.3 Ga 0.7 As layer 13a and 6 pairs of Al 0.2 Ga 0.8 As / GaA as active layers are formed.
The cavity layer 13 composed of the s superlattice layer 13b and the Al 0.3 Ga 0.7 As layer 13c is an optical film having an oscillation wavelength. Thereafter, the growth temperature is lowered to 600 ° C., and similarly, the thickness of each layer is p-type Al 0.15 consisting of λ / 4n.
Ga 0.85 As (p to 10 18 cm -3 ) / AlAs (p to 1)
0 19 cm −3 ) 27 second semiconductor light reflecting layer 14
Is formed by modulating the flow rate of DEZ, and is p + + type Al that also functions as a phase matching with metal (Au) and a contact layer.
The matching layer 15 made of 0.15 Ga 0.85 As is formed.

【0017】次に、こうして得られた結晶に対し、ま
ず、基板11の裏面をブロムメタノールにより研磨す
る。続いて、基板11の裏面にコーティングによりSi
2 からなるAR層16及び蒸着シンターによりAuG
eNi/Auからなるn電極17を形成し、その後、結
晶上部にリフトオフにより補助反射ミラーを兼ねた厚さ
数10nm、5〜40μm径の半透明Auからなるp電
極18を形成する。
Next, with respect to the crystal thus obtained, first, the back surface of the substrate 11 is polished with brommethanol. Then, the back surface of the substrate 11 is coated with Si.
The Au layer is formed by the AR layer 16 made of O 2 and the vapor deposition sinter.
An n-electrode 17 made of eNi / Au is formed, and then a p-electrode 18 made of semitransparent Au having a thickness of 10 nm and a diameter of 5 to 40 μm, which also serves as an auxiliary reflection mirror, is formed on the upper part of the crystal by lift-off.

【0018】最後に、レジストパターニングにより前記
p電極18上にマスクを形成し、マスクされていない部
分を塩素ガスによるECRエッチングにより第1の半導
体光反射層12の途中までドライエッチングし、さらに
ドライエッチングによるダメージを除去するために硫酸
系によるスライトエッチングを行って、製造を完了す
る。
Finally, a mask is formed on the p-electrode 18 by resist patterning, and the unmasked portion is dry-etched to the middle of the first semiconductor light reflection layer 12 by ECR etching with chlorine gas, and further dry-etched. Sulfuric acid-based slight etching is performed to remove the damage due to the above, and the manufacturing is completed.

【0019】なお、エッチングを前記第1の半導体光反
射層12の途中まで行ったのは、光学的導波路ロスを増
やすことなく抵抗値増大を避けるためのものである。
The reason why the etching is performed halfway through the first semiconductor light reflecting layer 12 is to avoid an increase in resistance value without increasing optical waveguide loss.

【0020】前述した面発光レーザに対して電流を注入
し、I−L特性を調べたところ、従来、報告されている
値と同様な低い閾値である2〜10mAにおいてI−L
曲線が立ち上がり、レーザ発振に至ることが確認され
た。また、閾値付近における電圧は2〜2.5Vにな
り、従来のMOCVD法で作成されたものと比較すると
2桁以上改善された。
A current was injected into the above-mentioned surface emitting laser and the IL characteristics were examined. As a result, IL was observed at a low threshold value of 2 to 10 mA, which is similar to the conventionally reported value.
It was confirmed that the curve rose and laser oscillation occurred. Further, the voltage in the vicinity of the threshold value is 2 to 2.5 V, which is improved by two digits or more as compared with the voltage produced by the conventional MOCVD method.

【0021】図4は図3の面発光レーザの抵抗値をI−
V測定により評価し、成長温度に対する依存性を表した
もので、横軸は素子のメサ半径、縦軸は抵抗値である。
同図より、本実施例によれば、従来のMBE法に比べて
高反射率で且つ低抵抗な半導体光反射層が得られること
が分かる。なお、図中の「Modulated A」及
び「Modulated B」とは、両者とも前述した
DEZの流量の変調を行っていることを示しているが、
それぞれ変調量は異なる。
FIG. 4 shows the resistance value of the surface emitting laser of FIG.
It is evaluated by V measurement and shows the dependence on the growth temperature. The horizontal axis is the mesa radius of the device, and the vertical axis is the resistance value.
From the figure, it can be seen that according to this example, a semiconductor light reflection layer having a higher reflectance and a lower resistance than that of the conventional MBE method can be obtained. Note that “Modulated A” and “Modulated B” in the figure both indicate that the DEZ flow rate is modulated as described above.
The amount of modulation is different for each.

【0022】[0022]

【発明の効果】以上説明したように本発明によれば、量
産に適したMOCVD法により、従来のものと比べて高
反射率を維持でき且つ極めて低抵抗な半導体光反射層を
得ることができ、半導体光反射層を用いた面発光レーザ
等の光デバイスを安価に提供でき、多数のレーザ等の光
源を必要とする光交換、光ニューラルネットワーク、光
情報処理の実現に非常に大きな経済的な効果を得ること
ができる。
As described above, according to the present invention, it is possible to obtain a semiconductor light-reflecting layer which can maintain a high reflectance and has an extremely low resistance as compared with the conventional one by the MOCVD method suitable for mass production. , It is possible to provide an optical device such as a surface emitting laser using a semiconductor light reflecting layer at a low cost, and it is very economical to realize optical switching, optical neural network, optical information processing that requires a large number of lasers and other light sources. The effect can be obtained.

【図面の簡単な説明】[Brief description of drawings]

【図1】p型半導体光反射層の成長温度に対する抵抗依
存性をチェックするための素子の一例を示す構造図
FIG. 1 is a structural diagram showing an example of an element for checking the resistance dependence of a p-type semiconductor light reflecting layer on the growth temperature.

【図2】図1の素子の成長温度に対する抵抗値の依存性
を示す図
FIG. 2 is a diagram showing the dependence of the resistance value on the growth temperature of the device of FIG.

【図3】本発明方法により製造した半導体光反射層を備
えた面発光レーザの一実施例を示す構造図
FIG. 3 is a structural diagram showing an embodiment of a surface emitting laser having a semiconductor light reflecting layer manufactured by the method of the present invention.

【図4】図3の素子の成長温度に対する抵抗値の依存性
を示す図
4 is a diagram showing the dependence of the resistance value on the growth temperature of the device of FIG.

【符号の説明】[Explanation of symbols]

1…p型GaAs基板、2…半導体光反射層、3,4…
オーミック電極、11…n型GaAs基板、12…第1
の半導体光反射層、13…キャビティー層、14…第2
の半導体光反射層、15…マッチング層、16…AR
層、17…n電極、18…p電極。
1 ... p-type GaAs substrate, 2 ... semiconductor light reflecting layer, 3, 4 ...
Ohmic electrode, 11 ... N-type GaAs substrate, 12 ... First
Semiconductor light reflecting layer, 13 ... Cavity layer, 14 ... Second
Semiconductor light reflecting layer, 15 ... Matching layer, 16 ... AR
Layer, 17 ... N electrode, 18 ... P electrode.

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 MOCVD法によりZnをp型ドーパン
トとして用いてAlXGa1-X As/AlY Ga1-Y
s(X>Y,0≦X,Y≦1)からなる半導体光反射層
を形成する半導体光反射層の製造方法において、 成長温度をn型のAlX Ga1-X As/AlY Ga1-Y
Asからなる半導体光反射層を形成する際の成長温度よ
り少なくとも150 ℃下げるとともに、 AlY Ga1-Y Asに比べてAlX Ga1-X Asの方に
より多くのZnをドーピングするようになしたことを特
徴とする半導体光反射層の製造方法。
1. An Al X Ga 1-X As / Al Y Ga 1-YA using Zn as a p-type dopant by the MOCVD method.
In the method for manufacturing a semiconductor light-reflecting layer for forming a semiconductor light-reflecting layer made of s (X> Y, 0 ≦ X, Y ≦ 1), a growth temperature is n type Al X Ga 1-X As / Al Y Ga 1 -Y
The growth temperature at the time of forming the semiconductor light-reflecting layer made of As is lowered by at least 150 ° C., and more Zn is doped into Al X Ga 1-X As than Al Y Ga 1-Y As. A method for producing a semiconductor light-reflecting layer, characterized in that.
JP11613893A 1993-05-18 1993-05-18 Method for manufacturing semiconductor light reflecting layer Pending JPH06334256A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11613893A JPH06334256A (en) 1993-05-18 1993-05-18 Method for manufacturing semiconductor light reflecting layer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11613893A JPH06334256A (en) 1993-05-18 1993-05-18 Method for manufacturing semiconductor light reflecting layer

Publications (1)

Publication Number Publication Date
JPH06334256A true JPH06334256A (en) 1994-12-02

Family

ID=14679681

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11613893A Pending JPH06334256A (en) 1993-05-18 1993-05-18 Method for manufacturing semiconductor light reflecting layer

Country Status (1)

Country Link
JP (1) JPH06334256A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100224878B1 (en) * 1996-07-25 1999-10-15 윤종용 Vertical cavity surface emitting laser
KR100224877B1 (en) * 1996-07-18 1999-10-15 윤종용 Vertical cavity surface emitting laser
JP2006351799A (en) * 2005-06-15 2006-12-28 Fuji Xerox Co Ltd Surface emitting semiconductor element array
US9640944B2 (en) 2015-09-08 2017-05-02 Fuji Xerox Co., Ltd. Method of manufacturing optical semiconductor element

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100224877B1 (en) * 1996-07-18 1999-10-15 윤종용 Vertical cavity surface emitting laser
KR100224878B1 (en) * 1996-07-25 1999-10-15 윤종용 Vertical cavity surface emitting laser
JP2006351799A (en) * 2005-06-15 2006-12-28 Fuji Xerox Co Ltd Surface emitting semiconductor element array
US9640944B2 (en) 2015-09-08 2017-05-02 Fuji Xerox Co., Ltd. Method of manufacturing optical semiconductor element

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