JPH06339043A - Horizontal sync signal generator - Google Patents

Abstract

(57) [Summary] [Purpose] The generation of horizontal synchronization signals during mobile reception is stabilized without being affected by external influences such as ghosts and electric field changes, and screen bending and rolling are reduced. A phase shift detection circuit 6 for detecting a phase shift of each horizontal sync signal output from the horizontal sync separation circuit 1 and a frequency divider circuit 4, and an error voltage output from a phase comparison circuit 5 in a period in which no phase shift occurs. The error voltage holding circuit 7 for holding, the changeover switch 9 for switching the feedback path of the control voltage to the voltage controlled crystal oscillator 3 between the phase comparison circuit 5 side and the error voltage holding circuit 7 side, and the phase shift detection circuit 6 are provided. The phase shift period is detected based on the output signal, and the changeover switch 9 detects the phase shift period.
Is set on the side of the error voltage holding circuit 7 and the other period is set to the H error timer circuit 10 which sets the changeover switch 8 on the side of the phase comparison circuit 5 and the case where the phase shift continues for a certain period of one vertical synchronization period or more. And a reset signal generation circuit 11 that outputs a reset signal to the frequency dividing circuit 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a horizontal synchronizing signal generator used in, for example, a television receiver mounted on a vehicle.

[0002]

2. Description of the Related Art In recent years, in-vehicle television receivers have become widespread, and it has become possible to enjoy watching television programs while the vehicle is moving. Further, recently, in this type of television receiver, in order to cope with the change in the radio wave state of television broadcasting during mobile reception, a method for generating a synchronization signal by a countdown method to stabilize synchronization during mobile reception has been proposed. Has been adopted.

However, even in this method, a malfunction may occur in the synchronization processing due to ghost / flutter, fading phenomenon, etc., and the screen may bend or roll.
For example, under a strong electric field ghost area, in the case of a video signal having a poor D / U ratio and a large luminance difference, a positive or negative ghost video component bites into the sync portion, and the sync signal cannot be correctly separated. Further, in a weak electric field region, the jitter component of the sync signal increases in accordance with the deterioration of the S / N ratio of the signal, and the sync signal cannot be correctly separated.

On the other hand, the response characteristic of AFC (automatic phase control) for generating vertical and horizontal synchronizations based on this synchronization signal is set so as to cope with a signal with a lot of jitter such as an external video signal from a VTR. Has been done. For this reason,
As a result of the sync generation based on the sync signal as described above, the deviation of the vertical sync signal is not so noticeable, but the deviation of the horizontal sync signal appears remarkably as a bend or roll in the displayed image and is very difficult to see. It becomes an image.

[0005]

As described above, in the conventional sync generation processing circuit, the horizontal sync separation error occurs particularly due to the influence of the ghost or the like, and the AFC circuit operates so as to match the phase with this horizontal sync signal. Therefore, there is a problem that the display screen bends or rolls, which makes it very difficult to see.

The present invention is intended to solve such a problem, and stabilizes the generation of the horizontal synchronizing signal at the time of vehicle movement reception without being affected by external influences such as ghost and electric field change, thereby preventing the screen from bending. It is an object of the present invention to provide a horizontal synchronizing signal generator capable of reducing lateral vibration and performing phase matching when a long-term phase shift occurs due to channel switching or reception state change.

[0007]

In order to achieve the above-mentioned object, a horizontal synchronizing signal generator of the present invention is a horizontal synchronizing signal generator for generating a horizontal synchronizing signal based on a video signal received by a television tuner, A sync separating means for separating a horizontal synchronizing signal from a video signal, an oscillating means capable of controlling an oscillating frequency according to a control voltage, and a horizontal synchronizing signal to be supplied to a display device by dividing the oscillating frequency of the oscillating means. Phase comparison means for comparing the phase of the synchronizing signal generating means generated with the phase of the horizontal synchronizing signal generated by the synchronizing signal generating means and the horizontal synchronizing signal output by the synchronizing separating means, and outputting an error voltage according to the phase difference. And a phase shift detecting means for detecting a phase shift between the horizontal synchronizing signal generated by the synchronizing signal generating means and the horizontal synchronizing signal output by the synchronizing separating means, and the phase shifting detecting means The error voltage holding means for holding the error voltage output by the phase comparison means during the period when it is not output and the connection destination of the feedback path of the control voltage to the oscillation means can be switched between the phase comparison means and the error voltage holding means. During the period when the phase shift is detected by the switching means and the phase shift detecting means, the error voltage held by the error voltage holding means is applied to the oscillating means as a control voltage, and the phase comparing means outputs the period when the phase shift is not detected. And a switching control means for controlling the switching means so as to apply the error voltage to the oscillation means as a control voltage.

According to the present invention, in addition to the above configuration, when the phase shift detected by the phase shift detecting means continues for a certain period of one vertical synchronizing period or more, the synchronizing signal generating means is reset and the synchronizing signal generating means is reset. It is characterized by comprising reset means for phase-aligning the horizontal synchronizing signal generated by the above and the horizontal synchronizing signal output by the sync separating means.

[0009]

That is, in the present invention, the switching control means applies the error voltage, which is held by the error voltage holding means, before the phase shift is generated to the oscillation means as the control voltage during the period when the phase shift detection means detects the phase shift. During the period in which no phase shift is detected, the switching means is switched so that the error voltage output by the phase comparison means is applied to the oscillation means as a control voltage. As a result, the generation of the horizontal synchronization signal at the time of vehicle movement reception can be stabilized without being affected by external influences such as ghosts and electric field changes, and the bending and rolling of the screen can be reduced.

When the phase shift continues for a certain period of time longer than one vertical synchronizing period, the reset means resets the synchronizing signal generating means and the horizontal synchronizing signal generated by the synchronizing signal generating means and the horizontal synchronizing signal outputted by the synchronizing separating means. Performs phase matching with the synchronization signal. That is, with respect to the occurrence of a long-term phase shift due to channel switching or a change in the reception state, the sync signal generating means is reset in synchronization with the timing of the horizontal sync signal output by the sync separating means, and the sync signal generating means is reset. The phase of the horizontal synchronizing signal generated by the same as the phase of the input video signal.

[0011]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of a synchronization stabilizing circuit according to an embodiment of the present invention. In the figure, 1 is a horizontal sync separation circuit for separating the horizontal sync signal (HD1) from the input video signal, and 2 is a vertical sync signal (V1) from the input video signal.
It is a vertical sync separation circuit for separating D). Reference numeral 3 is a voltage controlled crystal oscillator (VCXO) capable of controlling an oscillation frequency based on a control voltage, and outputs a reference signal of 14.31818 MHz. Reference numeral 4 denotes a frequency dividing circuit for dividing (counting down) the oscillation frequency of the voltage controlled crystal oscillator 3 to obtain a horizontal synchronizing signal (HD2) to be supplied to the display device 12. Reference numeral 5 is a phase comparison circuit that compares the phases of the horizontal synchronizing signals (HD1 and HD2) and outputs a phase error voltage corresponding to the phase difference. Reference numeral 6 denotes a phase shift detection circuit that generates a signal for identifying the period in which the phase shift has occurred by ANDing the horizontal synchronization signals (inversion signals of HD1 and HD2). An error voltage holding circuit 7 holds the error voltage output from the phase comparison circuit 5 before the phase shift occurs. Reference numeral 8 denotes a changeover switch for switching the feedback path of the control voltage to the voltage controlled crystal oscillator 3 between the phase comparison circuit 5 and the error voltage holding circuit 7. Reference numeral 9 is a low-pass filter that leaks a low-frequency component of the control voltage selected by the changeover switch 8.

Reference numeral 10 is an H for switching the changeover switch 8.
It is an error timer circuit. The H error timer circuit 10 detects a phase shift period based on the phase shift detection signal of the phase shift detection circuit 6, and during this period, the changeover switch 8 is turned off.
Is set to the error voltage holding circuit 7 side, and the control voltage feedback path to the voltage controlled crystal oscillator 3 is set to the error voltage holding circuit 7 side. Further, during a period in which no phase shift is detected, the changeover switch 8 is set to the a side and the feedback path of the control voltage to the voltage controlled crystal oscillator 3 is set to the phase comparison circuit 5 side. This H error timer circuit 1
For 0, the timing starts when the output signal of the phase shift detection circuit 6 rises to the “H” level, and the next “H” level signal must be input even after one horizontal synchronization period (about 63 μsec) has elapsed. For example, the timing after the lapse of one horizontal synchronization period is determined to be the beginning of the phase shift period, and from this time until the output signal of the phase shift detection circuit 6 rises to the “H” level is determined as the phase shift period. Has become. Reference numeral 11 detects the case where the phase shift continues for a certain time (for example, about 0.2 seconds) longer than one vertical synchronization period, and the frequency dividing circuit 4
A reset signal generating circuit that outputs a reset signal to the. That is, the reset signal generating circuit 11 is
As shown in, the output signal of the phase shift detection circuit 6 is "H".
When the timing is started at the timing of rising to the level and the phase shift is not eliminated even after a fixed time (one vertical sync period + one horizontal sync period or more) has elapsed (the output signal of the phase shift detection circuit 6 is "H"). Timer circuit 21 that outputs a signal of "H" level when it does not become "level"
And an AND circuit 22 for ANDing the output signal of the timer circuit 21 and the inverted signal of the horizontal sync signal (HD1) output from the horizontal sync separation circuit 1 and outputting the result as a reset signal. Reference numeral 12 denotes a display device, which is a vertical sync signal (V
D) and the horizontal synchronizing signal (HD2) from the frequency dividing circuit 4 are input.

Next, the operation of this embodiment will be described. FIG. 3 is a diagram showing the timing of each signal on the entire circuit.

The horizontal sync signal (HD1) output from the horizontal sync separation circuit 1 and the horizontal sync signal (HD2) output from the frequency divider circuit 4 are input to the phase comparison circuit 5 and the phase shift detection circuit 6, respectively. .

The phase comparison circuit 5 uses a horizontal synchronizing signal (HD1).
And the phase of the horizontal synchronizing signal (HD2) are compared, and a phase error voltage corresponding to the phase difference is output. On the other hand, the phase shift detection circuit 6 ANDs the horizontal synchronization signal (inversion signal of HD1) and the horizontal synchronization signal (inversion signal of HD2) and outputs the result to the H error timer circuit 10 and the reset signal generation circuit 11. .

The H error timer circuit 10 detects the signal level one horizontal sync period after the output signal of the phase shift detection circuit 6 rises to the "H" level. In the Hb period in which there is no phase shift, the signal level after this one horizontal synchronization period has passed is "H". Therefore, during this period, H
The output of the error timer circuit 10 is fixed at "H", the changeover switch 8 is set to the a side, and the voltage controlled crystal oscillator 3
The feedback path of the control voltage to is set to the phase comparison circuit 5 side. As a result, a loop of the phase comparison system is formed. Further, during this period, the output error voltage of the phase comparison circuit 5 is applied to the error voltage holding circuit 7 via the changeover switch 8 to charge the error voltage.

Next, the operation when a ghost occurs will be described. FIG. 4 is a diagram showing a state of synchronization deviation of the horizontal synchronizing signal (HD1) when a ghost occurs. In the figure, 4-1 is a regular video signal. It is assumed that a ghost component is added to this regular video signal and a signal as shown in 4-2 is generated. Here, the level of the horizontal sync signal in the section A is equal to or lower than the pedestal level, so that the horizontal sync signal is in a signal form capable of being synchronously separated in the section C. However, when a signal with a large level difference appears in the video signal in the B section, the video part bites into the horizontal sync signal part due to the influence of ghost, and the rising of the video part is regarded as the rising of the horizontal sync signal, and this is separated by synchronization. Resulting in. As a result, a horizontal sync signal including a sync shift in the D section is generated as shown in 4-3.

The phase comparison circuit 5 compares the phases of the horizontal synchronization signal (HD1) including such a synchronization shift and the horizontal synchronization signal (HD2) output from the frequency dividing circuit 4, and as a result, the period Ha shown in FIG. The phase shift is detected at and an error voltage corresponding to the phase difference is output. On the other hand, the phase shift detection circuit 6 detects a phase shift equal to or more than the pulse width of each horizontal synchronizing signal during this Ha period, and continues to output an "L" level signal.

Therefore, in this case, the H error timer circuit 10 inputs the signal of the "L" level one horizontal synchronization period after the output signal of the phase shift detection circuit 6 rises to the "H" level, and this timing is set. Judging as the beginning of the phase shift period, an “L” level signal is output to the changeover switch 8. As a result, the changeover switch 8 is set to the b side, and the feedback path of the control voltage to the voltage controlled crystal oscillator 3 is switched to the error voltage holding circuit 7 side, and the error voltage held by the error voltage holding circuit 7, that is, the phase shift occurs. The error voltage before being generated is applied to the voltage controlled crystal oscillator 3 through the low pass filter 9. Therefore, the horizontal synchronizing signal (HD2) output from the frequency dividing circuit 4 is maintained in the phase before the horizontal separation error occurs. After that, this state is maintained until the “H” level signal indicating that the phases match is input from the phase shift detection circuit 6 to the H error timer circuit 10.

In this embodiment, the phase pull-in response time of the phase comparison system is set to, for example, 0.5 to 1 sec.
Therefore, the display position shift due to the instantaneous phase shift does not occur.

Further, in the present embodiment, the following processing is performed in order to cope with a phase shift which occurs over a long period of time due to channel switching, reception state change and the like.

The reset signal generation circuit 11 measures the phase shift period, and if the phase shift period is not resolved even after a fixed time (for example, about 0.2 seconds) longer than one vertical synchronization period, the reset signal generation circuit 11 Output a reset signal. The timing of each signal at this time is shown in FIG.

That is, the timer circuit 21 in the reset signal generation circuit 11 starts timing at the timing when the output signal of the phase shift detection circuit 6 rises to the "H" level, and continues for a fixed time (1 vertical synchronization period + 1 horizontal synchronization). If the next "H" level signal is not input even after the elapse of a certain time period or more), the "H" level gate signal (a) is input to the AND circuit 22. On the other hand, the inverted signal of the horizontal synchronizing signal (HD1) from the horizontal synchronizing separation circuit 1 is input to the AND circuit 22, and the AND signal 22 is ANDed with the gate signal to generate and output the reset signal (a). The frequency dividing circuit 4 is reset by this reset signal, and generates horizontal synchronizing signals (HD2) and (c) whose phases match the horizontal synchronizing signal (HD1).

Therefore, according to this embodiment, the phase shift period of each horizontal synchronizing signal (HD1 and HD2) is detected, and the phase error voltage to be input to the voltage controlled crystal oscillator 3 is set to the error voltage before the phase shift occurs. By replacing it, it is possible to prevent malfunction of the voltage controlled crystal oscillator 3 when a sync separation error occurs due to the influence of ghost or the like. As a result, in TV reception while the vehicle is moving, it is possible to eliminate the phenomenon of screen bending or rolling caused by ghost or electric field change.

Further, each horizontal synchronizing signal (HD1 and HD
If the phase shift in 2) continues for a certain time longer than one vertical synchronization period, a reset signal is supplied to the frequency dividing circuit 4 to perform phase alignment of the horizontal synchronization signal (HD2), thereby changing the channel or receiving state. Thus, it is possible to perform phase matching when a long-term phase shift occurs.

[0026]

As described above, according to the horizontal synchronizing signal generator of the present invention, oscillation occurs during the phase shift period between the horizontal synchronizing signal generated by the synchronizing signal generating means and the horizontal synchronizing signal separated by the synchronizing separating means. By changing the input control voltage to the means from the output error voltage of the phase comparison means to the error voltage held in the error voltage holding means before the phase shift occurs, it is possible to give meaningless variation to the oscillation frequency of the oscillation means. Be blocked. Therefore, it is possible to stabilize the generation of the horizontal synchronizing signal at the time of mobile reception without being externally affected by a ghost, a change in the electric field, and the like, and reduce the bending and rolling of the screen, thereby improving the image quality.

When the phase shift continues for a certain period of time longer than one vertical synchronizing period, the synchronizing signal generating means is reset and the horizontal synchronizing signal generated by this synchronizing signal generating means and the horizontal synchronizing signal output by the synchronizing separating means. By performing the phase matching of the above, it is possible to perform the phase matching when a long-term phase shift occurs due to the channel switching or the change of the reception state.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a synchronization stabilizing circuit according to an exemplary embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a reset signal generating circuit in the synchronization stabilizing circuit shown in FIG.

3 is a diagram showing the timing of each signal of the phase comparison system in the synchronization stabilizing circuit of FIG.

FIG. 4 is a diagram showing a state of synchronization deviation of a horizontal synchronization signal (HD1) when a ghost occurs.

5 is a diagram showing the timing of each signal for explaining the operation when a phase shift of the horizontal synchronizing signal occurs for a long period in the synchronization stabilizing circuit of FIG.

[Explanation of symbols]

1 ... Horizontal sync separation circuit, 2 ... Vertical sync separation circuit, 3 ... Voltage controlled crystal oscillator, 4 ... Frequency divider circuit, 5 ... Phase comparison circuit,
6 ... Phase shift detection circuit, 7 ... Error voltage holding circuit, 8 ... Changeover switch, 9 ... Low pass filter, 10 ... H error timer circuit, 11 ... Reset signal generation circuit, 12 ... Display device.

Claims (2)

[Claims] 1. A horizontal sync signal generator for generating a horizontal sync signal based on a video signal received by a television tuner, comprising: a sync separation means for separating the horizontal sync signal from the video signal; and an oscillation frequency according to a control voltage. Control means, a synchronizing signal generating means for dividing the oscillation frequency of the oscillating means to generate a horizontal synchronizing signal to be supplied to the display device, a horizontal synchronizing signal generated by the synchronizing signal generating means, and Compare the phase with the horizontal sync signal output by the sync separation means,
Phase comparison means for outputting an error voltage according to the phase difference, and phase shift detection means for detecting a phase shift between the horizontal sync signal generated by the sync signal generation means and the horizontal sync signal output by the sync separation means. An error voltage holding unit that holds an error voltage output by the phase comparison unit during a period in which the phase shift detection unit does not detect a phase shift; and a connection destination of a feedback path of a control voltage to the oscillation unit, the phase comparison Means for switching between the error voltage holding means and the error voltage holding means, and an error voltage held by the error voltage holding means as a control voltage for the oscillating means during a period in which the phase deviation is detected by the phase deviation detecting means. In addition, the switching means is controlled so that the error voltage output by the phase comparison means is applied as a control voltage to the oscillation means during a period in which no phase shift is detected. A horizontal synchronizing signal generator comprising a switching control means. 2. The horizontal synchronizing signal generator according to claim 1, wherein when the phase shift detected by the phase shift detecting means continues for a certain period of one vertical synchronizing period or more, the synchronizing signal generating means is reset. A horizontal synchronizing signal generator comprising a resetting means for adjusting the phase of the horizontal synchronizing signal generated by the synchronizing signal generating means and the horizontal synchronizing signal output by the synchronizing separating means.