JPH06344607A - Printer controlling apparatus - Google Patents

Abstract

PURPOSE:To reduce the cost of a printer controlling apparatus which develops image data (bit map data) on a memory and outputs the data to a printer to print the data. CONSTITUTION:A temporary memory means such as an FIFO 14 is arranged at a printing interface controlling part 2 of a printer controlling apparatus 1. An image data 6 is transferred from a system memory 5 by way of the DMA transfer to the temporary memory means. Meanwhile, the development of the image data at, the system memory is conducted at a continuous address area. Since the DMA transfer is possible at any time if a bus is vacant, the image data is supplied to the temporary memory means 14 in a manner not to be interrupted to be output to a printer 12. Accordingly, a memory of a large capacity capable of storing image data of the whole printing page is eliminated in the printing interface controlling part 2. Moreover, since the image data of the whole page is continuously supplied, not per line. in the DMA transfer, a table for recording head addresses of lines becomes unnecessary.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a printer controller for developing image data (bitmap data) on a memory and outputting the image data to a printer for printing.

[0002]

[Prior art]

(First Conventional Example) There is a printer control device that develops image data on a memory based on print data from a host computer or the like and outputs the image data to a printer for printing. FIG. 5 is a diagram showing such a conventional printer controller. In FIG. 5, 1 is a printer controller, 2 is a print interface controller, 3 is a bus, and 4 is a CP.
U (Central Processing Unit), 5 is a system memory, 6 is image data, 7 is an image memory, 8 is a line buffer, 9 is a shifter as a data conversion means for converting the unit of data, 10 is a print output control unit, Reference numeral 101 is a left margin control unit, 102 is an upper margin control unit, 11 is an external storage device, and 12 is a printer.

The CPU 4 expands the image data to be printed in the system memory 5, and the expansion of the image data is performed so that the state of being printed on one page of paper appears as it is. Information and data that are supplementarily required when developing (eg font data)
Are provided from the external storage device 11. The image data 6 is the image data thus developed.

D ₁₁ , D _{12 and the} like are image data of an access unit (for example, 8 pixels or 16 pixels) of DMA transfer. D _{11 to} D _1N are the image data of the first line, D
_{21 to} D _2N are image data of the second line, and D _{M1 to} D _MN are image data of the M line which is the final line.

An image memory 7 is provided in the print interface control unit 2, and image data 6 in the system memory 5 is transferred through the bus 3. The line buffer 8 is for taking out one line of data from the image memory 7, and the shifter 9
The data for the access unit of the DMA transfer is sent to.

FIG. 6 is a diagram for explaining the operation of the shifter 9. Assuming that the access unit data in the DMA transfer is the data for 8 pixels, the shifter 9 receives the data for 8 pixels such as D ₁₁ all at once, and the printer 1
Output to 2. The print output control unit 10 controls output from the line buffer 8 to the shifter 9 and output from the shifter 9 to the printer 12. For example, the output timing is controlled based on the page synchronization signal and the line synchronization signal sent from the printer 12 to the print output control unit 10. The left margin and the upper margin are set in the left margin control unit 101 and the upper margin control unit 102 in advance, and are controlled by them. The number of lines and the line width of one page match the number of lines and the line width of the image data 6 developed in the system memory 5 or the image memory 7. The line width is a multiple of the number of pixels of access unit data. If the access unit data D ₁₁ etc. is 8 pixels, the line width is 8 × N pixels in the case of FIG.

FIG. 7 is a diagram showing a print state in which the line width is a multiple of the number of pixels of access unit data for DMA transfer. In FIG. 7, 20 is a sheet, 21 is a printed image, 22 is a line synchronization signal, 23 is an upper margin, 24 is the number of image lines, 25 is a page synchronization signal, 26 is a left margin, and 27 is an image printing line. Width.

(Second Conventional Example) As another conventional technique related to the present invention, there is a "print control system" disclosed in Japanese Patent Laid-Open No. 63-16324. This is provided with a table recording the start address of each line of the expanded image data,
The image data is DMA-transferred while resetting the DMA address (DMA ... Direct memory access) for each line.

(Third Prior Art) Further, as another prior art, there is JP-A-2-48966. This is because the print interface control unit does not have an image memory, but DM from the system memory to the line buffer for each line.
A transfer is performed. This DMA transfer is
It is performed in synchronization with the line synchronization signal from the printer.

[0010]

However, the above-mentioned conventional example has the following problems. The first conventional example has a problem that it is necessary to have not only the system memory 5 but also the image memory 7 as a memory capable of expanding one page of image data, resulting in an increase in cost. . In the second conventional example, since the DMA transfer is performed for each line, it is necessary to prepare a table for recording the start address of each line, which causes a problem that the number of circuits increases. there were. In the third conventional example, when the line synchronization signal comes from the printer, if the bus is used for other processing, the image data of the next line cannot be transferred, and the timing of printing will be delayed. There was a problem that the image data would not be in time. An object of the present invention is to solve the above problems.

[0011]

In order to solve the above problems, according to the present invention, a CPU, a system memory in which image data is expanded, and image data transferred from the system memory are controlled so as to meet printing conditions. However, in a printer control device having a print interface control unit for outputting to a printer, a unit for expanding image data in a continuous address area of the system memory is provided, and the configuration of the print interface control unit is Temporary storage means, means for DMA-transferring the image data expanded in the system memory to the temporary storage means, and data conversion means for outputting the image data input from the temporary storage means to the printer in pixel units. The image data of the set line width is temporarily recorded A temporary storage control means for controlling the time of output from the means to the data conversion unit, and configured to have a print output control means for controlling the output from said data conversion means to the printer.

When the image data is output to a predetermined pixel unit printer from the beginning of the line, the value of the remaining image data of the line width set by the CPU in the temporary storage control means is forcibly changed to a value that cannot be printed. A line width control unit for outputting may be provided in the print output control means.

Further, the temporary storage control means also controls the line width of the image data output from the data conversion means to the printer to a line width different from the line width set by the CPU. You can also say

[0014]

[Operation] The print interface controller of the printer controller is provided with temporary storage means such as a FIFO,
Image data is transferred from the system memory by DMA transfer to the temporary storage means. On the other hand, the image data is expanded in the system memory in the continuous address area. Since the DMA transfer can be performed at any time if the bus is vacant, the image data is supplied to the temporary storage means so that the output to the printer is not interrupted. Therefore, it is not necessary to provide a large-capacity memory that can store image data of the entire print page in the print interface control unit. Further, since the DMA transfer is performed not for each line but for the image data of the entire page continuously, it is not necessary to provide a table for recording the start address of the line. Therefore, the cost is reduced.

[0015]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 is a diagram showing a printer control device according to a first embodiment of the present invention. Reference numerals correspond to those of FIG. 5, 13 is a DMA control unit, 131 is a DMA address control unit, 132 is a DMA count control unit, 14 is a FIFO (First In First Out) as a temporary storage unit, and 15 is a unit.
Is a FIFO control unit as a temporary storage data output control unit, and 103 is a line number control unit. Portions with the same reference numerals as in the conventional example of FIG. 5 perform similar functions.

The first difference from the conventional example shown in FIG. 5 is that the internal structure of the print interface controller 2 is changed. That is, the image memory 7 and the line buffer 8 are eliminated, and instead, the DMA control unit 13
And FI which is a means for temporarily storing image data.
An FO 14 and a FIFO control unit 15 (temporary storage control means) that controls the output from the FIFO 14 to the shifter 9 are provided. The second difference from the conventional example of FIG. 5 is that the way of developing the image data 6 in the system memory 5 is changed. That is, in the conventional example of FIG. 5, the data is expanded in the state of printing on the page, but in the first embodiment, it is expanded in the continuous area of the memory regardless of the state of printing on the page.

Image data is continuously expanded in the system memory 5 in units of access for DMA transfer from the first data D ₁₁ of one line to the last data D _MN of the last line. For example, a line feed is not started even if the final data D _1N of one line has been expanded, but the head data D ₂₁ of two lines is expanded immediately after that. This development is C
Made by PU4. Image data 6 is DMA
By the DMA transfer controlled by the control unit 13, the FIF
It is sequentially transferred to O14. Prior to the control, the CPU 4
Sets the start address of the image data 6 expanded in the system memory 5, that is, the DMA transfer start address in the DMA address control unit 131, and sets the data amount of the image data 6, that is, the transfer size, in the DMA count control unit 13
Set to 2.

The output from the shifter 9 to the printer 12 is performed in synchronization with the line synchronizing signal or the page synchronizing signal from the printer 12. However, F of image data 6
In the DMA transfer to the IFO 14, the bus 3 is vacant and the F
It can be performed at any time as long as there is a free space in the IFO 14. Therefore, the DMA transfer to the FIFO 14 can be performed independently of the transfer operation from the shifter 9 to the printer 12.

The FIFO control unit 15 controls the output from the FIFO 14 to the shifter 9. Line width is CPU4 in advance
Is set in the FIFO control unit 15, and when a line synchronization signal from the printer 12 is received, data starts to be sent to the shifter 9. When the data for the line width has been transmitted, the operation is stopped and the next line synchronization signal is waited for. The output from the shifter 9 to the printer 12 is controlled by the print output control unit 10. Compared with the conventional example of FIG. 5, a line number control unit 103 is newly provided, but this line number control unit 103 monitors how many lines remain to be printed. First, the number of lines to be printed on one page is set by the CPU 4, and every time one line of image data is sent to the printer 12, it is counted down by one.

The line number control unit 103 is not essential, and is provided as needed. This is provided and the operation of the print interface control unit 2 is terminated when the number of lines of one page is output to the printer 12. Depending on the type of printer, there are some that send a line synchronization signal even though the printing of the number of lines to be printed on one page has been completed. In that case, the print interface control unit 2 is still in the normal operating state. In the case of, the shifter 9 and the FIFO 14 have no more data, and therefore, error processing such as displaying an indication that printing is impossible or defective printing and stopping the operation is performed. If the line number control unit 103 is provided and used as described above, it is possible to prevent such error processing.

FIG. 2 is a flow chart for explaining the data transfer operation and printer output operation in the present invention. First, the data transfer operation will be described with reference to the flowchart of FIG. Step 1 ... An area for expanding image data is secured in the system memory 5 at continuous addresses. Step 2 ... Expand the image data there. Step 3 ... The head address of the expanded image data 6 is set in the DMA address control unit 131 as the start address of the DMA transfer. The expanded data amount is set in the DMA count control unit 132 as the transfer size.

Step 4 ... If there is a free area in the FIFO 14 and the bus 3 can be used, the image data 6
DMA transfer to IFO14. Step 5: From the value of the DMA count control unit 132, D
The size of the transferred data is counted down. DM
The new value of the A count control unit 132 indicates the amount of data remaining before being DMA-transferred. Also, the start address of the DMA address control unit 131 is changed to the value of the start address of the image data 6 that remains untransferred. Step 6 ... It is checked whether the DMA transfer is completed. If the value of the DMA count control unit 132 is zero,
The scheduled DMA transfer has ended. Step 7 ... If not, check to see if the FIFO 14 is full. If there is still a space, the process returns to step 4 to continue the DMA transfer.

Next, according to the flow chart of FIG.
The data transfer operation to 2 will be described. Step 1 ... It is checked whether a page sync signal (vertical sync signal) from the printer 12 is received. Step 2 ... If it comes, it is checked whether the line sync signal (horizontal sync signal) is also coming. Step 3 ... If both sync signals are received, the printer 1
The data must be output to the FIFO2, but the FIFO14
Check if there is data in.

Step 4 ... If there is no data in the FIFO 14, it means that there is no data although it should be output, so it is processed as an error. Step 5 ... If there is data in the FIFO 14, shifter 9
Output to the printer 12 via. Step 6: CP from the FIFO 14 to the shifter 9 in advance
The FIFO control unit 15 controls so that the data for the line width set by U4 is sent. It is checked whether or not the data amount has been transferred. When one line is transferred, the value of the line number control unit 103 is decremented by 1. Step 7 ... It is checked whether the set number of lines have been transferred. If the value of the line number control unit 103 is zero, the transfer is completed. If the transfer is completed, the operation of the print interface controller 2 is ended. The state of being printed on the paper is the same as the conventional one, and is as shown in FIG.

(Second Embodiment) FIG. 3 is a diagram showing a printer control apparatus according to the second embodiment of the present invention. Reference numerals correspond to those in FIG. 1, and 104 is a line width control unit. The difference from the first embodiment is that the print output control unit 1
The point is that the line width control unit 104 is added to 0. In the first embodiment, the line width can be set only in the access unit of DMA transfer (for example, in units of 8 pixels), but in the second embodiment, the image data is prepared only in the access unit. However, the line width can be printed with an accuracy of one pixel unit.

FIG. 9 is a diagram showing a printing state according to the second embodiment. Reference numerals correspond to those in FIG. 7, 27 is a print line width of the image, and 28 is a set line width of the image. D _1K, D _2K and D _MK with the suffix K are DMA
The data has the number of pixels (eg, 1 pixel) smaller than the number of pixels of the access unit for transfer (eg, 8 pixels).

For setting the line width on the image data,
Similar to the first embodiment (FIG. 1), the processing is performed by the CPU 4 on the FIFO control unit 15. The setting here is made in units of access unit data, such as how many access unit data are used for one line. If all the image data of the line width set here is sent to the printer 12 and printed, the first line is printed from D ₁₁ to D _1N of FIG. 9, and the image shown in FIG. 9 is displayed. The width of the set line width 28 is printed. This is similar to the first embodiment (see FIG. 7).

On the other hand, in the line width control unit 104, the line width to be actually printed is set in units of one pixel within a range shorter than the line width set in the FIFO control unit 15. The control of the output from the shifter 9 to the printer 12 is performed by the print output control unit 10. At that time, the data of the portion exceeding the line width set by the line width control unit 104 is a data value that does not print (for example, It is forcibly changed to zero) and output. Therefore, the line width actually printed is the print line width 27 of the image shown in FIG. Since the setting in the line width control unit 104 is performed in the unit of one pixel, the line width can be adjusted in the unit of one pixel. The image data value may be forcibly changed when the FIFO 14 outputs it to the shifter 9.

(Third Embodiment) FIG. 4 is a diagram showing a printer control apparatus according to the third embodiment of the present invention. Reference numerals correspond to those in FIG. 1, and 16 is an extended FIFO control unit. The extended FIFO control unit 16 controls the output from the FIFO 14 to the shifter 9 and also controls the output from the shifter 9 to the printer 12. That is, when outputting from the shifter 9 to the printer 12, if the output is for a predetermined line width per pixel, the output is temporarily stopped. Then, when the next line synchronization signal arrives, the output is restarted.

On the other hand, when developing the image data 6 in the system memory 5, the necessary data is developed in accordance with the line width to be actually printed. That is, the second
In the embodiment of the present invention, taking the first line in FIG. 9 as an example, the data from the data next to the data D _1K to the last data D _1N is not printed because it is the data at the position exceeding the line width and is wasted. However, in the third embodiment, such useless data expansion is not performed from the beginning.

System memory 5 of the third embodiment (FIG. 4)
Then, D _{11 to} D _1K are expanded as the data of the first line, but the line width to be printed is DMA.
1 if it is not a multiple of the transfer access unit data
The data D _{1K at} the end of the line is data below the access unit (for example, 3 pixels or 2 pixels). The data size of the data D _{21 in} the first part of the second line is set to be one access unit data together with the data D _{1K at} the end of the first line. The ends and heads of the other lines are similarly expanded.

D _1K and D ₂₁ transferred to the FIFO 14 are
Eventually, the data is output to the shifter 9, but from the shifter 9 to the printer 12 pixel by pixel, and when the data of D _1K has been sent, the extended FIFO control unit 16 knows that the line width has been sent. Therefore, the output to the printer 12 is stopped. The transmission of the data of D ₂₁ is started after the next line synchronization signal comes from the printer 12, and the data is used for printing from the beginning of the second line.

FIG. 8 is a diagram showing a print state according to the third embodiment. The reference numerals correspond to those in FIG. 7.
The operation described above, the first line in the data D ₁₁ to D _1K is printed, the second line in the data D ₂₁ to D _2K are printed. Since D _1K is data equal to or less than the access unit of DMA transfer, the print line width 27 of the image can be set to the length of an arbitrary number of pixels.

FIG. 10 is a diagram showing another configuration example of the DMA control unit 13. The current address detection unit 31 detects the current address during the DMA transfer. Address comparison unit 30
Compares the current address with the address of the comparison address providing unit 32. In the comparison address providing unit 32, D
The MA transfer start address 321 and the DMA transfer end address 322 are set, and the start and end of the transfer are determined by comparing them.

[0035]

As described above, according to the printer control apparatus of the present invention, the image data expanded in the system memory is sent to the temporary storage means (FIFO) in the print interface control section by DMA transfer at any time. This DMA transfer can be performed at any time when the bus is idle, regardless of the printing timing of the printer (for example, line synchronization signal, etc.), so that the image data will not fall behind the printing timing. Therefore,
A memory that can hold one page of image data,
It is not necessary to have it in the print interface control unit.
Further, since the image data is expanded in the continuous address area of the system memory and the DMA transfer is continuously performed instead of each line, it is not necessary to provide a table or the like for recording the head address of each line. Therefore, the cost is reduced.

[Brief description of drawings]

FIG. 1 is a diagram showing a printer control device according to a first embodiment of the present invention.

FIG. 2 is a flowchart illustrating a data transfer operation and a printer output operation according to the present invention.

FIG. 3 is a diagram showing a printer control device according to a second embodiment of the present invention.

FIG. 4 is a diagram showing a printer control device according to a third embodiment of the present invention.

FIG. 5 is a diagram showing a conventional printer control device.

FIG. 6 is a diagram for explaining the operation of the shifter.

FIG. 7 is a diagram showing a print state in which the line width is a multiple of the number of pixels in the access unit of DMA transfer.

FIG. 8 is a diagram showing a print state according to a third embodiment.

FIG. 9 is a diagram showing a print state according to a second embodiment.

FIG. 10 is a diagram showing another configuration example of a DMA control unit.

[Explanation of symbols]

1 ... Printer control device, 2 ... Print interface control unit, 3 ... Bus, 4 ... CPU, 5 ... System memory,
6 ... Image data, 7 ... Image memory, 8 ... Line buffer, 9 ... Shifter, 10 ... Print output control unit, 1
01 ... left margin control unit, 102 ... upper margin control unit,
103 ... Line number control unit, 104 ... Line width control unit, 1
DESCRIPTION OF SYMBOLS 1 ... External storage device, 12 ... Printer, 13 ... DMA control part, 14 ... FIFO, 15 ... FIFO control part, 16 ... Extended FIFO control part, 20 ... Paper, 21 ... Image, 22
... line synchronization signal, 23 ... upper margin, 24 ... image line number, 25 ... page synchronization signal, 26 ... left margin, 27 ... image print line width, 28 ... image setting line width, 30 ... address comparison unit, 31 ... Current address detection unit, 32 ... Comparison address provision unit

Claims (3)

[Claims] 1. A printer comprising a CPU, a system memory in which image data is expanded, and a print interface control unit for outputting the image data transferred from the system memory to a printer while controlling the image data to meet printing conditions. The control device comprises means for expanding image data in a continuous address area of the system memory, and the structure of the print interface control unit includes a temporary storage means for image data and an image data expanded in the system memory. Means for DMA transfer to the temporary storage means, data conversion means for outputting the image data input from the temporary storage means to the printer in units of one pixel, and image data of a set line width from the temporary storage means. Performs control when outputting to data conversion means A printer control device comprising a temporary storage control means and a print output control means for controlling output from the data conversion means to a printer. 2. When the image data is output from a line head to a predetermined pixel unit printer, the temporary storage control means C
The line width control unit for forcibly changing the value of the remaining image data of the line width set by the PU to a value that is not printed and outputting the line width control unit is provided in the print output control means. Printer controller. 3. The temporary storage control means for controlling the temporary storage control means so that the line width of the image data output from the data conversion means to the printer is different from the line width set by the CPU. The printer control device according to claim 1, wherein