JPH0636885A - Strobe control circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] The objective is to obtain a strobe control circuit that does not malfunction when the power is turned on. A strobe control circuit having a strobe drive circuit 4 and a transistor 2 for controlling the strobe drive circuit 4 is provided with a charging circuit 7 for charging a capacitor 6 when the power source 3 rises and a charging current amplification circuit 8 for amplifying the charging current. , Input terminal 1
Since the charging current amplifying circuit 8 is connected to the charging current amplifying circuit 8, it is possible to prevent the stray capacitance 5 from being charged with the current from the charging current amplifying circuit 8 when the power supply 3 rises and the transistor 2 being turned on.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a strobe control circuit, and more particularly to a strobe control circuit capable of preventing the occurrence of malfunction at the time of power-on of the strobe control circuit.

[0002]

2. Description of the Related Art FIG. 9 is a circuit diagram of a conventional strobe control circuit, in which 1 is an input terminal of the control circuit and 2 is a control circuit.
Is a PNP transistor whose base is connected to the input terminal 1, and controls the strobe drive circuit according to whether or not it is conductive. 3 is a power supply connected to the emitter of the PNP transistor 2, 4 is a strobe drive circuit connected between the collector of the PNP transistor 2 and the power supply 3, 5
Is a stray capacitance attached to the input terminal 1 and has a capacitance value of, for example, several tens of PFs. Reference numeral 9 is an emitter-grounded NPN transistor whose collector is connected to the input terminal 1.

FIG. 10 is a waveform diagram of each part showing the operation of this conventional strobe control circuit.
Input waveform, that is, the base voltage of the PNP transistor 2,
And the outputs of the strobe drive circuit 4 are shown respectively.

Next, the operation will be described. As indicated by B in FIG. 10, when the NPN transistor 9 connected to the input terminal 1 is turned on while the power supply 3 is being applied, the base current of the PNP transistor 2 flows to cause the PNP transistor 2 to flow.
The transistor 2 is turned on, and the strobe driving circuit 4 is brought into a driving state. As a result, the strobe emits light, and it is possible to shoot even when the amount of light is insufficient.

On the other hand, when the NPN transistor 9 is turned off, the PNP transistor 2 is turned off and the strobe drive circuit 4 is in a standby state.

Further, the PNP transistor 2 cannot be turned on when the power source 3 is not applied, and the strobe drive circuit 4 does not operate.

[0007]

Since the conventional strobe control circuit is constructed as described above, as shown in FIG.
When the stray capacitance 5 is attached to the input terminal, when the power supply 3 rises, a charging current flows from the base of the PNP transistor to this stray capacitance and the input waveform, that is, P
The base voltage of the NP transistor 2 rises later than the rise of the power supply voltage. For this reason, the base voltage of the PNP transistor 2 is momentarily L even though the power supply voltage has risen.
As a result, as indicated by A in FIG. 10, there is a problem that the strobe drive circuit is brought into a driving state and the strobe emits light although the NPN transistor 9 is not turned on.

The present invention has been made to solve the above-mentioned problems, and an object thereof is to obtain a strobe control circuit capable of preventing malfunctions at the time of power-on.

[0009]

In the strobe control circuit according to the present invention, a PNP transistor having a base connected to an input terminal and an emitter connected to a power source, and an input connected to a collector of the PNP transistor, In a device equipped with a strobe drive circuit that drives a strobe by continuity, a capacitor for preventing malfunction at power supply startup, a charging circuit for charging this capacitor at power supply startup, and a charging current for this charging circuit The charging current amplifying circuit for amplifying is provided, and the charging current amplifying circuit is connected to the input terminal.

[0010]

In the charging current amplifier circuit according to the present invention, the stray capacitance attached to the input terminal is charged when the power source rises. Therefore, when the power source rises, the transistor controlling the strobe drive circuit is turned on to charge the stray capacitance. To prevent

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a strobe control circuit according to an embodiment of the present invention. In the figure, 1 is an input terminal of the input circuit of the strobe control circuit, and 2 is a PNP transistor whose base is connected to the input terminal 1. The PNP transistor controls the strobe drive circuit depending on whether or not it is conductive. 3 is this PN
A power source connected to the emitter of the P-transistor 2 and 4 is P
A strobe drive circuit connected between the collector of the NP transistor 2 and the power supply 3, 5 is a stray capacitance attached to the input terminal 1, 6
Is a capacitance whose one end is grounded for preventing malfunction at the time of power supply rise, and is, for example, several tens of PFs equivalent to the stray capacitance 5.
Has a capacity value of the order. Reference numeral 7 is a charging circuit connected between the other end of the capacitance 6 and the power supply 3, and 8 is connected between the charging circuit 7 and the power supply 3 to charge the stray capacitance 5 parasitic on the input terminal 1 when the power supply 3 rises. A charging current amplifier circuit 9 is a grounded emitter NPN transistor whose collector is connected to the input terminal 1.

FIG. 8 is a waveform diagram of each part showing the operation of the strobe control circuit according to this embodiment. The voltage of the power supply 3, the input waveform, that is, the base voltage of the PNP transistor 2 and the strobe drive circuit 4 are shown. The output is shown respectively.

Next, the operation will be described. As indicated by B in FIG. 8, when the NPN transistor 9 connected to the input terminal 1 is turned on while the power source 3 is applied,
A base current flows through the PNP transistor 2, the PNP transistor 2 is turned on, and the strobe drive circuit 4 is in a drive state. As a result, the strobe emits light, and it is possible to shoot even when the light amount is insufficient.

On the other hand, when the NPN transistor 9 is turned off, the PNP transistor 1 is turned off and the strobe drive circuit 4 is in a standby state.

Further, when the power supply 3 is not applied, the PNP transistor 2 cannot be turned on and the strobe drive circuit 4 does not operate.

When the power supply 3 is changed from the non-applied state to the applied state, the charging circuit 7 charges the capacitor 6 and the charging current is amplified by the charging current amplifying circuit 8 to the input terminal 1. It is charged to the attached stray capacitance 5.

Since the charging current of the stray capacitance 5 is much larger than the charging current of the capacitance 6, it is not possible to flow the charging current from the base of the PNP transistor 2 to the floating capacitance 5 when the power supply 3 starts up. As a result, when the power supply rises, the input waveform immediately follows this and rises, and it does not become L instantly.

Therefore, in the present embodiment, the period shown as A in FIG. 10 disappears, and the PNP transistor 2 is turned on and the strobe drive circuit 4 is driven even though the NPN transistor 9 is not turned on. It is possible to solve the problem of being lost.

Although the capacitor 6 is connected between the charging circuit and the ground in the above embodiment, the power source 3 and the charging circuit 7 are connected as shown in FIG.
May be connected between. Further, FIGS. 3, 5 and 6 are shown in FIG.
4 is a concrete circuit example of the embodiment of FIG. 4, and FIG. 4 is a concrete circuit example of the embodiment of FIG.

FIG. 3 is a circuit diagram in which the charging circuit 7 and the charging current amplifier circuit 8 of FIG. 1 are realized by one transistor, and a PNP in which the emitter is connected to the power supply 3, the collector is connected to the input terminal 1, and the base is connected to the capacitor 6 is shown. The transistor 10 plays a role of both the charging circuit 7 and the charging current amplifier circuit 8.

That is, when the power supply 10 is turned on, PN
In the P-transistor 10, a current flows from its emitter to its base to charge the capacitor 6, and a current obtained by multiplying this charging current by hfe of the transistor 10 flows from its emitter to its collector, causing a parasitic floating in the input terminal 1. Charge the capacity 5.

In FIG. 4, the charging circuit 7 and the charging current amplifying circuit 8 of FIG. 2 are realized by separate transistors, and the PNP transistor 10 having the emitter connected to the power supply 3 and the collector connected to the input terminal 1 is charged. The NPN transistor 11 having a grounded emitter that plays the role of the current amplification circuit 8 and has the collector connected to the base of the PNP transistor 10 and the base connected to the terminal of the capacitor 6 on the side opposite to the power supply 3 functions as the charging circuit 7. is there.

That is, when the power supply 10 is started up, the capacitor 6 is charged by the change in its voltage, and its charging current flows from the base of the NPN transistor 11 toward the emitter, and the charging current is multiplied by hfe of the transistor 11. Current is drawn from the base of PNP transistor 10.
As a result, a current of (charging current of the capacitor 6) × (hfe of the transistor 11) × (hfe of the transistor 10) flows from the collector to the emitter of the PNP transistor 10, and this charges the floating capacitance 5. So in this case,
The capacitance value of the capacitor 6 can be reduced by adding one transistor, which is advantageous in terms of area when the circuit is integrated into an IC.

In FIG. 5, the charging circuit 7 of FIG. 2 is realized by the PNP transistor 12, and the charging current amplifying circuit 8 is realized by the PNP transistor 10. The collector-grounded PNP transistor 12 has its base not connected to the ground of the capacitor 6. The emitter is connected to the base of the PNP transistor 10 at the terminal on the opposite side, and the emitter of the PNP transistor 10 is connected to the power supply 3 and the collector is connected to the terminal 1.

In FIG. 6, the charging circuit 7 of FIG. 2 is realized by the PNP transistor 13, and the charging current amplifying circuit 8 is realized by the NPN transistor 11 and the PNP transistor 10.
The PNP transistor 13 has its emitter connected to the power supply 3 and its base connected to the terminal of the capacitor 6 on the side opposite to the ground. The NPN transistor 11 having the emitter grounded has its base connected to PN.
The collector of the P-transistor 13 has a PN
The PNP transistor 10 has its emitter connected to the power source 3 and its collector connected to the input terminal 1, which is connected to the base of the P transistor 10. In this case, the capacitance value of the capacitor 6 can be made even smaller by simply adding two transistors, which is more advantageous in terms of area when the circuit is integrated into an IC.

As described above, various circuit configurations of the charging circuit and the charging current amplifying circuit of FIGS. 1 and 2 are conceivable, and the way of realizing the circuits is particularly limited to that of FIGS. 3 to 6. It is not something that can be done.

Further, as shown in FIG. 7, when a plurality of input terminals are provided to control a plurality of strobes, the capacitance may be commonly connected to the charging circuits of the respective input terminals. Has the same effect as.

In FIG. 7, reference numerals 1 and 14 denote input terminals, and 5,
18 is a stray capacitance parasitic on the input terminals 1 and 14;
Reference numeral 7 is a PNP transistor as a charging circuit and a charging current amplifying circuit for the capacitor 6, the emitter is connected to the power source 3, the base is connected to the terminal of the capacitor 6 on the side opposite to the ground, and the collector is connected to the input terminals 1 and 14, respectively. . Reference numerals 2 and 15 are PNP transistors whose emitter is connected to the power source 3, whose base is connected to the input terminals 1 and 14, and whose collector is connected to the strobe drive circuits 4 and 16.

[0029]

As described above, according to the present invention, the PNP transistor whose base is connected to the input terminal and whose emitter is connected to the power source, and the input which is connected to the collector of this PNP transistor and whose PNP transistor is conductive are connected. In a strobe control circuit equipped with a strobe drive circuit for driving a strobe, a capacity for preventing malfunction at power on, a charging circuit for charging this malfunction prevention capacity at power on, and a charging current for this The charging current amplification circuit that amplifies the current is provided, and the stray capacitance attached to the input terminal is charged by this charging current amplification circuit when the power supply rises.Therefore, the transistor that controls the strobe drive circuit when the power supply rises It is possible to obtain a strobe control circuit that prevents the battery from being charged and does not malfunction when the power is turned on. There is a result.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a strobe control circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram showing another embodiment of the present invention.

FIG. 3 is a specific circuit diagram of the embodiment of FIG. 1 of the present invention.

FIG. 4 is a specific circuit diagram of the embodiment of FIG. 2 of the present invention.

FIG. 5 is a specific circuit diagram of the embodiment of FIG. 1 of the present invention.

FIG. 6 is a specific circuit diagram of the embodiment of FIG. 1 of the present invention.

FIG. 7 is a circuit diagram showing another embodiment of the present invention.

FIG. 8 is a waveform chart showing the operation of the embodiment of the present invention.

FIG. 9 is a circuit diagram showing a conventional strobe control circuit.

FIG. 10 is a waveform diagram showing the operation of a conventional strobe control circuit.

[Explanation of symbols]

 1 Input Terminal 2 PNP Transistor 3 Power Supply 4 Strobe Drive Circuit 5 Stray Capacitance 6 Capacitance 7 Charging Circuit 8 Charging Current Amplifier Circuit

Claims (1)

[Claims] 1. A PNP transistor whose base is connected to an input terminal and whose emitter is connected to a power source, and whose input is connected to the collector of the PNP transistor.
In a strobe control circuit including a strobe drive circuit for driving a strobe by conduction of an NP transistor, a capacitance for preventing malfunction at power-on, a charging circuit for charging the malfunction-prevention capacitance at power-on, A charging current amplifier circuit for amplifying a charging current of the charging circuit is provided, the charging current amplifier circuit is connected to the input terminal, and a current is supplied from the charging current amplifier circuit to the input terminal when the power supply rises. Characteristic strobe control circuit.