JPH0637970A - Solid-state image pickup device - Google Patents

Abstract

PURPOSE:To simplify the constitution of the output signal processing circuit of a solid-state image pickup device. CONSTITUTION:This solid-state image pickup device is constituted by connecting amplifiers 4a, 4b and 4c and analog switches 5a, 5b and 5c to the output of a linear image sensor and bonding the output of the analog switches 5a, 5b and 5c to be connected to the amplifier 6. The linear image sensor is composed of photoelectic converting element arrays 1a, 1b and 1c, transfer gates 2a, 2b and 2c and analog shift registers 3a, 3b and 3c. The photoelectric converting element arrays 1a, 1b and 1c are mounted with the color filters of blue 7, green 8 and red 9. The transfer gates 2a, 2b and 2c are arranged parallelly to the photoelectric converting element arrays. The number of the parts of a signal processing circuit is reduced and the area of a circuit board is reduced.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a solid-state image pickup device comprising a linear image sensor for detecting optical image information, converting it into an electric signal and outputting the electric signal.

[0002]

2. Description of the Related Art A solid-state image pickup device including a linear image sensor has already been put to practical use in the fields of facsimile, OCR, copying machine and the like.

The structure of a conventional solid-state image pickup device will be described with reference to FIG. 10. Photoelectric conversion element arrays 1a, 1b and 1c in which photodiodes for converting a pattern of incident light into an electric signal are one-dimensionally assembled, respectively. Of the photoelectric conversion element arrays 1a, 1b, 1c for reading out the charges accumulated in the photodiodes of the above in a time series manner.
a ₁ , 2a ₂ , 2b ₁ , 2b ₂ , 2c ₁ , 2c ₂ and the transfer gates 2a ₁ , 2a ₂ , 2b ₁ , 2b ₂ , 2c ₁ ,
Disposed around the 2c _2, analog shift register 3a to transfer the read charges by the transfer gate,
3b and 3c and the respective analog shift registers 3a and 3
Amplifiers 4a, 4 for extracting signals from the final stages of b, 3c
One linear image sensor is constituted by b and 4c, and the image sensors are arranged in three rows in parallel.
In order to obtain color signals of the three primary colors of color on the photoelectric conversion element arrays 1a, 1b, 1c, red (R) is provided in the light detection part.
Color filters for 9, green (G) 8 and blue (B) 7 are mounted.

Next, the operation of the conventional solid-state image pickup device shown in FIG. 10 will be described with reference to FIG. First, an optical signal is converted into a charge signal by the photoelectric conversion element arrays 1a, 1b, 1c. This charge signal is transferred to the transfer gates 2a ₁ and 2a _{2 on} both sides of one photoelectric conversion element array 1a.
When the transfer gate φTG becomes H level, it moves to the analog shift register 3a shown in the upper and lower parts in FIG. Here, the charge signals of the odd-numbered photodiodes are sent to the upper analog shift register, and the charge signals of the even-numbered photodiodes are sent to the lower analog shift register. The charge signals in the upper and lower analog shift registers are sequentially transferred to the final stage of the analog shift register by clock pulses φ1 ²³ and φ2 ^{24. Since the} upper and lower analog shift registers are one in the final stage, they are alternately arranged in the final stage. Is converted into a voltage signal by the amplifier 4a and further amplified by the gain A. The same applies to the other photoelectric conversion element arrays 1b and 1c.

Next, a signal processing system using the solid-state image pickup device of FIG. 10 will be described with reference to FIG. As shown in FIG. 12, three output signals V _out B of the solid-state imaging device 26,
V _out G and V _out R are connected to the A / D converter 27, respectively, where the output signals V _out B, V _out G and V are output.
_out R is converted into digital signals VdB, VdG, VdR. A / D converters 27a, 27 used here
b and 27c are usually 6 to 8 bits. Signal Vd converted by A / D converters 27a, 27b, 27c
B, VdG, and VdR are memories 28a, 28b, and 28, respectively.
It is stored in c and sent from the I / O port 29 to the next signal processing system when necessary.

[0006]

However, in this conventional solid-state image pickup device, as shown in FIG. 12, A / D converters and memories for signal processing are provided for each of the number of signal outputs, that is, three each. Must be used. For this reason,
It is necessary to prepare three same signal processing circuits. Therefore, the signal processing circuit becomes large, and the size of a device such as an image scanner becomes large. In addition, since many components such as A / D converters and memories are used, there is a drawback that the cost of the device such as an image scanner is increased.

Therefore, a technical object of the present invention is to provide a solid-state image pickup device in which the output signal processing circuit is simplified and the cost is reduced and the size is reduced.

[0008]

According to the present invention, in order to solve the problem of realizing simplification and miniaturization of a peripheral signal processing circuit, a solid-state image pickup device of the present invention has a plurality of photoelectric conversion elements in one dimension. An array of photoelectric conversion elements and a charge transfer device that is arranged in parallel to the photoelectric conversion element array and transfers and outputs signals generated in each photoelectric conversion element of the photoelectric conversion element array in time series. In a solid-state imaging device equipped with a linear image sensor having: an analog switch for selecting each image sensor connected to the output of the linear image sensor, and connecting the outputs from each of the analog switches as one And an amplifier having a predetermined gain.

The linear image sensor of the present invention is
It is configured to detect the hue of the primary colors.

[0010]

In the solid-state image pickup device of the present invention, the output signal processing of the solid-state image pickup device is simplified, the signal processing circuit can be downsized, and the number of parts can be reduced.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, an embodiment of the solid-state image pickup device according to the present invention will be described with reference to the drawings. (First Embodiment) FIG. 1 is a block diagram showing a solid-state image pickup device according to the first embodiment of the present invention. 2, FIG. 2 is a circuit diagram of the analog switch of FIG. 1, FIG. 3 is a schematic timing diagram of the present solid-state imaging device, and FIG. 4 is a detailed timing diagram. Figure 1
, The photoelectric conversion element array 1a is composed of a group of photodiodes provided with a blue color filter 7 for detecting blue (B) among the three primary colors for reproducing colors, and the photoelectric conversion element array 1b is green (G). ) Is formed of a photodiode group provided with a green color filter 8 and the photoelectric conversion element array 1c is formed of a photodiode group provided with a red color filter 9 for detecting red (R). Each photoelectric conversion element array 1a, 1b, 1c
The photodiodes are arranged at the same pitch in the column direction, and the intervals between the photodiode groups in the row direction are arranged at integer multiples of the column pitch (for example, 8 or 10).

Further, transfer gates 2a and 2b are provided in parallel with each photodiode of the photoelectric conversion element array 1a, and the charge-coupled device is arranged in parallel with the photoelectric conversion element array 1a through the transfer gates 2a ₁ and 2a _2. An analog shift register 3a composed of (CCD) is provided. An amplifier 4a for converting a charge signal into a voltage signal is formed at the final stage of the analog shift register 3a. An analog switch 5a is connected to the amplifier 4a.

On the other hand, transfer gates 2b ₁ and 2b ₂ are provided in parallel with the respective photodiodes of the photoelectric conversion element array 1b, and the charge-coupled elements are provided in parallel with the photoelectric conversion element array 1b via the transfer gates 2b ₁ and 2b _2. Is provided with an analog shift register 3b. An amplifier 4b for converting a charge signal into a voltage signal is formed at the final stage of the analog shift register 3b. An analog switch 5b is connected to the amplifier 4b.

On the other hand, 2c ₁ and 2c ₂ are transfer gates 2 parallel to the photodiodes of the photoelectric conversion element array 1c.
c ₁ and 2c ₂ are provided, and these transfer gates 2c ₁ and 2c are provided.
_An analog shift register 3c composed of a charge-coupled device is provided in parallel with the photoelectric conversion device array 1c through ₂ . An amplifier 4c that converts a charge signal into a voltage signal is connected to the final stage of the analog shift register 3c.
An analog switch 5c is connected to the amplifier 4c.

Next, each analog switch 5a, 5b,
The outputs of 5c are combined into one and connected to the voltage amplification amplifier 6, and the signal is amplified by this amplifier 6 and output.

Next, the operation of the analog switches 5a, 5b and 5c will be described with reference to FIG. The structure of the analog switches 5a, 2b and 5c is such that the selection signal SER or SEG or SEB is a P channel (P-c
h) Gate electrode of transistor 10 and transistor 11
Is connected to the gate electrode and the input of the inverter 15.
The output of the inverter 15 includes the gate electrode of the N-channel (N-ch) transistor 13 and the P-ch transistor 1
4 gate electrodes. The source electrode of the P-ch transistor 10 and the source electrode of the N-ch transistor 13 are open, and the outputs VOR, VOG, VOB of the image sensor are the source electrode of the N-ch transistor and the source electrode of the P-ch transistor 14. The drain electrodes of the N-ch transistors 10 and 14 and the drain electrodes of the P-ch transistors 11 and 13 are connected to each other.

Next, the operation of the solid-state image pickup device shown in FIG. 1 will be described. Up to the point where the charge signals generated in the photoelectric conversion element arrays 1a, 1b, 1c are converted into voltage signals by the amplifiers 4a, 4b, 4c, there is no difference from the conventional solid-state imaging device. One of the analog switches 5a, 5b and 5c is selected by the selection signals SER, SEB and SEG. The signal selected by this analog switch is amplified by the amplifier 6.

Next, the analog switches 5a, 5b, 5c
The operation of will be described. It is assumed that the selection signal SEB is at H level and the other signals SER and SEG are at L level. SE
Regarding the analog switch 5a containing the B signal, at this time, the N-ch transistor 11 and the P-ch transistor 14 are in the ON state, and the N-ch transistor 13 and the P-ch transistor 12 are in the OFF state.
The signal is output at V _o . At this time, since SEG and SER are at L level, N of the analog switches 5b and 5c is
The -ch transistor 11 and the P-ch transistor 14 are turned off, and the N-ch transistor 13 and the P-c transistor are turned off.
h Transistor 12 is turned on and VO is OPEN
And the same potential, that is, the OPEN state. As a result, the signals VOR, VOG, VOB can be selected. By sequentially switching the selection signals SEB, SEG, SER in this manner, the signals generated in the photoelectric conversion elements 1a, 1b, 1c can be read.

Next, the processing of the read voltage signal will be described with reference to FIG. The signal output from the solid-state image sensor 26 according to the first embodiment of the present invention is decomposed into a 6-bit to 8-bit digital signal by an analog / digital (A / D) converter 27. The digital signal becomes a signal representing the shade of the RGB signal of each color. The signal obtained here is the memory of the next stage (random access memory, hereafter,
It is temporarily stored in a RAM 28) and is sent from a next-stage input / output port (I / O port) 29 to a personal computer, a color printer, a video printer, or the like, if necessary, and a series of processing is performed. end. (Second Embodiment) FIG. 6 is a diagram showing a solid-state image pickup device according to a second embodiment of the present invention, and FIG. 7 is a diagram showing waveforms of respective parts shown in FIG. The solid-state image pickup device according to the second embodiment differs from that of the first embodiment in that a selection circuit 30 for generating the selection signals SER, SEG, SEB in the first embodiment is incorporated.

Next, the operation of the selection circuit 30 according to the second embodiment of the present invention will be described with reference to FIGS. 8 and 9. As shown in FIG. 8, the selection circuit 30 of the solid-state imaging device according to the second embodiment includes three D-type flip-flop circuits (DF).
F) 34a, 34b, 34c and the NOR gate 33 constitute a three-stage ring counter, and three signals of φTGR, φTGG, φTGB and three-input OR gate are used as input signals of the ring counter and select signals SER, SEG, SEB. Are obtained at the outputs Q ₁ , Q ₂ , and Q ₃ of each D-FF. In this case, the clock waveform diagram is as shown in FIG. The operation of the ring counter is now Q ₁ , Q ₂ , Q ₃ is H or L
Then, the counter reset signal RES32 causes D-
The outputs of the FFs 34a, 34b, 34c are reset to L, and the H signal is input to D of the D-FF 34a. next,
Any of TGR, TGB, TGG becomes H and CLK3
2 becomes H, the H signal input to D ₁ is latched, and Q ₁ changes from L to H. Next, when CLK32 becomes H, H of D ₂ is latched, Q ₂ becomes L → H, and D ₁ becomes L, so Q ₁ is converted from H → L. Then CLK
When 32 becomes H, H of D ₃ is latched and Q ₃ becomes L → H.
Since L is present in D ₁ and D ₂ , both Q ₁ and Q ₂ are L. Then CLK32 is Q ₁ again becomes a H will be repeated sequentially this process becomes H.

[0021]

As described above, in the present invention, in order to obtain color signals, a plurality of photoelectric conversion element arrays having red, blue and green color filters are arranged in parallel, and each photoelectric conversion element array is arranged in parallel. Since the output signals are switched by the analog switch so that the three color signal outputs are collectively output, the number of components used in the output signal processing circuit of the solid-state image pickup device can be reduced to one-third of the conventional number. Since the area of the circuit board can be reduced, the cost of the device used can be reduced and the size of the device can be reduced.

[Brief description of drawings]

FIG. 1 is a block diagram of a solid-state imaging device according to a first embodiment of the present invention.

FIG. 2 is a circuit diagram of the analog switch shown in FIG.

FIG. 3 is a signal waveform in each part of the first embodiment shown in FIG.

FIG. 4 is a signal waveform in each part of the first embodiment shown in FIG.

5 is an external signal processing circuit of the solid-state imaging device shown in FIG.

FIG. 6 is a block diagram of a solid-state imaging device according to a second embodiment of the present invention.

FIG. 7 is a diagram showing waveforms at various portions of the second embodiment shown in FIG.

8 is a circuit diagram of the signal selection circuit shown in FIG.

9 is a diagram showing waveforms at various parts of the circuit shown in FIG.

FIG. 10 is a block diagram of a conventional solid-state imaging device.

11 is a diagram showing a signal waveform of each part of FIG.

12 is a diagram showing an external signal processing circuit of the solid-state imaging device of FIG.

[Explanation of symbols]

1a, 1b, 1c Photoelectric conversion element array 2a ₁ , 2a ₂ , 2b ₁ , 2b ₂ , 2c ₁ , 2c ₂
Transfer gates 3a, 3b, 3c Analog shift register 4a, 4b, 4c Amplifier 5a, 5b, 5c Analog switch 6, 6a, 6b, 6c Amplifier 7 Blue filter 8 Green filter 9 Red filter 10, 14 P-ch transistor 11, 13 N-ch transistor 15 Inverter 16 SER Red selection signal 17 SEG green selection signal 18 SEB blue selection signal 19 φTGR red transfer gate clock 20 φTGG green transfer gate clock 21 φTGB blue transfer gate clock 22 V _out output signal 22a V _out R (red Output signal) 22b V _out G (green output signal) 22c V _out B (blue output signal) 23 φ1 transfer clock 1 24 φ2 transfer clock 2 25 φR reset clock 26 Solid-state imaging device 27, 27a, 27b, 27c A / D 28 , 28a, 28b, 28 c memory 29 I / O 30 selection circuit 31 RES reset signal 32 3 input OR gate 33 2 input NOR gate 34a, 34b, 34c D-FF 35 CLK pulse

Claims (2)

[Claims] 1. A photoelectric conversion element array formed by arranging a plurality of photoelectric conversion elements one-dimensionally, and a signal which is arranged in parallel to the photoelectric conversion element array and is generated in each photoelectric conversion element of the photoelectric conversion element array. In a solid-state imaging device including a linear image sensor having a charge transfer device that transfers and outputs the image data in time series, an analog switch that selects each image sensor connected to the output of the linear image sensor, and A solid-state imaging device comprising: an amplifier having a predetermined gain connected to each of the analog switches with one output. 2. The solid-state imaging device according to claim 1,
A solid-state image pickup device comprising a selection circuit for selecting an output of the analog switch.