JPH063960B2 - Bipolar IC image sensor - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Industrial field With the progress of information processing equipment, the importance of an image sensor as an input device is increasing. The present invention relates to a linear image sensor based on a bipolar IC technology capable of reading document information at high speed and high resolution.

Configuration of conventional example and its problems There are CCD image sensor and MOS image sensor as image sensors formed on Si crystal by using integrated circuit technology. Generally, an image sensor includes a plurality of light detecting elements and a scanning circuit, a CCD image sensor uses a photodiode as a detecting element and a CCD (charge transfer element) as a scanning circuit, and a MOS image sensor has a photodiode as a detecting element and a scanning element. The circuit uses a shift register with MOS transistors.

Both of them are composed of an optical sensor section and a scanning circuit section based on MOS integrated circuit technology and have high resolution, but have the following drawbacks. In the case of the CCD image sensor, since the electric charge which is originally in a thermal non-equilibrium state is used as the signal medium, the dark signal due to the thermal electric charge becomes large at high temperature, which makes it difficult to use.

Further, the CCD has a small charge well size (about 7 to 14 μm) for reduction imaging and high-speed scanning is possible, but when reading a 1 × image, the required charge well size is large (60 mm). The scanning speed becomes slower. Therefore, the reading speed is reduced.

On the other hand, in the case of the MOS image sensor, although the resolution is still high, the scanning speed is small because the maximum clock frequency of the MOS shift register is limited, and the video signal is small, and the scanning digital signal is mixed into the video signal line. As a result, the S / N ratio is poor.

2. Description of the Related Art Recently, in order to reduce the size of a document reading scanner, increase the resolution, and facilitate adjustment, a contact image sensor that reads a 1 × image of a document has been actively developed. For this, the pitch of the sensing elements is relatively large (for example, a pitch of 62.5 μm at a resolution of 16 dots / mm, a pitch of 125 μ at a resolution of 8 dots / mm
m) requires a long image sensor corresponding to the width of the document. Amorphous silicon image sensor in which the detector is integrated into a thin film and a long shape, and a large number of driving LSI chips are mounted around it, and a CCD multi-chip image sensor in which a plurality of CCD image sensors are staggered on the substrate. Etc. The amorphous silicon image sensor has a separate detector and drive unit,
It is considered that there are many interconnections and there is a problem with reliability. Since the CCD multi-chip image sensor has a staggered arrangement, line rearrangement processing is required after reading, the transfer rate decreases due to the large potential well, and the capacitive load of the drive circuit including the transfer clock line is large. There is a drawback that

SUMMARY OF THE INVENTION It is an object of the present invention to provide an image sensor in which a sensor unit and a scanning unit can be formed on the same chip, and document information can be read at high speed, high sensitivity, and high resolution. In particular, it is an object of the present invention to provide an image sensor that is optimal for a contact type image sensor in which a plurality of image sensor chips are arranged on a substrate and a non-magnified image of document information is read.

The image sensor of the present invention operates according to a scanning input signal composed of a selection input signal and a block selection signal input from the outside, and has a detection element portion including a phototransistor and a decoder including a current switch group connected in a tree shape. , Current source, a current switch for receiving a block selection signal and flowing a current from the current source to a desired decoder, detecting the output current of the decoder, and turning on or off the charging current to the phototransistor according to the presence or absence of the current switch Access current switch, a video output terminal formed by commonly connecting electrodes on the opposite side of the access terminals of the respective phototransistors, and the like.

The decoder circuit for the scanning function consists of multiple current switches connected in a tree shape. The amplitude of the scanning input signal required to operate the switch is as small as 0.5V, and each transistor operates in the active state. High-speed scanning is possible, and current consumption is small due to the dendritic connection. Further, in order to suppress the noise due to the mixing of the scanning input signal into the video output terminal to a minimum, the number of bits that change during scanning within a block is 1, and only the block signal changes between blocks, so that the sequential phototransistor The connection is such that the accumulated optical signal of is read out. In other words, it is a decoding circuit which scans with the scanning input signal in which only one bit changes when scanning the adjacent phototransistor.

An image sensor according to a second embodiment of the present invention includes a first phototransistor array having a light-receiving window and a second photoshielded phototransistor array paired with the first phototransistor array. And a phototransistor in the second phototransistor array are paired and scanned by the scanning decoder, and a video signal including a noise current and a leak current is output from the video output terminal of the first phototransistor. A circuit for canceling the noise current and the leak current is obtained by obtaining the noise current and the leak current from the video output terminal of the second phototransistor and obtaining the differential amplification output by an output amplifier such as an operational amplifier. It has.

Description of Embodiments The contents of the present invention will be described with reference to the drawings. FIG. 1 shows an input signal conversion circuit (for 3 bits) of the image sensor of the present invention, and FIG. 2 shows a decoder circuit (for 16 dot output) and a sensing element section. Input signal for scanning is 2
It consists of a binary code selection input signal and a block selection signal. FIG. 1 shows a circuit for receiving a selection input signal at an input terminal 1 and converting it to a complementary signal 2 having a different DC level. The current from the current sources 3a, 3b, 3c is selected by the pair of transistors 4, 5, 6 which form a current switch.
According to the comparison with the logic threshold voltage Vth,
Transistor 4a or 4b side, 5a or 5b side, 6
It is switched to the a or 6b side. Complementary signals having different DC levels are obtained at the conversion signal output terminal 2 by the output current of the current switch, the resistor pairs 7, 8, 9 and the DC level setting transistors 10, 11, 12.

FIG. 2 shows the complementary signal from the input signal conversion circuit input terminal 1
3 and receives the block selection input signals 14, 15
In response to this, the current from the current source 16 selected by the block selection input signal is guided to the branch selected by the complementary signal, and the phototransistor connected thereto is accessed.
In other words, it is a circuit for setting the reading state, and is composed of a group of current switches connected in a tree-like manner from the side having a lower potential to the side having a higher potential. The transistors 17 and 18 together with the transistor 58 form a current switch that operates according to a block selection signal.
Transistor pairs 19, 20, 21, 22, 23, 24,
Reference numeral 25 is connected as a current switch for switching the current supplied to the emitters of the respective transistor pairs according to the complementary input signals, and constitutes a first decoder which operates in the current mode. The transistor pair 19 operates at the lowest potential, the most significant digit complementary signal (A) is applied to the base of each transistor, and the transistor pairs 20 and 21 operate at the intermediate potential and the intermediate digit complementary signal (B). Is applied to each emitter, and each collector of the transistor pair 19 is connected to each emitter. Transistor pair 22, 23, 24, 2
5 operates at the highest potential, the complementary signal (C) of the least significant digit is applied to the base of each transistor, the collectors of the transistor pair 20 are connected to the emitters of the transistor pairs 22 and 23, respectively. 24, 25
The emitters of the transistors are connected to the respective transistors of the transistor pair 21. The current from the current source selected by the block selection input signal flows to the branch selected by the complementary input signal by the current switch connected in a tree shape, and the load resistors 26a, 26 connected to the output terminals of the decoder are connected.
b, 27a, 27b, 28a, 28b, 29a, 29b
To generate a potential difference. PNP transistors 30a, 30b, 31a, 31b, 32a, 32b, 3
3a and 33b are switching transistors that are turned on or off according to the presence or absence of a potential difference between both ends of the load resistance, and their output terminals are phototransistors 34a and 34b.
b, 35a, 35b, 36a, 36b, 37a, 37b
Connected to the collector. Reference numeral 38 is a line to which the emitters of the phototransistors are commonly connected and which forms a video signal output line. Transistor pair 39, 40, 41,
42, 43, 44, 45 are transistor pairs 19, 20 ...
25, it constitutes a second decoder which operates in the current mode. 46a, 46b, 47a, 47b, 48
a, 48b, 49a, 49b are decoder load resistors, 5
0a, 50b, 51a, 51b, 52a, 52b, 53
Reference numerals a and 53b are switching PNP transistors that turn on or off according to the presence or absence of a potential difference across the load resistance, and 54a, 54b, 55a, 55b, 56a and 56.
Reference numerals b, 57a and 57b are phototransistors for detection.

Next, a specific operation will be described. Block input terminal 14 is "1" (high level), 15 is "0" (low level)
When the complementary input signals A, B and C are all "0",
The current from the current source flows only through the resistor 26a and does not flow through other load resistors. As a result, only the base potential of the switching PNP transistor 30a drops, this transistor is turned on, the charging current flows only in the phototransistor 34a, and the read state (access state) is set.
No current flows through the other phototransistors, and the integration period (non-access period) in the charge storage mode is set.
By changing the block selection input signal or the complementary input signal, an arbitrary phototransistor can be put into a reading state and the video signal can be taken out.

The complementary input signal 13 is connected to the bases of the current switch transistor pairs in each stage, but the connection is such that a carry input signal of a plurality of bits is not required when scanning all adjacent phototransistors. Operating at the same voltage level in or between the first and second decoders, the bases of adjacent transistor pairs (eg, the right base of transistor pair 20 and the left base of transistor pair 21) are commonly connected. , The bases of the transistors facing it are connected in common. With this connection, the accumulated optical signal from the phototransistor can be sequentially read by the binary code selection input signal in which the number of bits changing in each step of scanning is 1. As a result, noise due to the mixing of the scanning input signal into the video output line is suppressed to a minimum. Further, for such a scanning method, the selection input signal also needs to be converted into a special code.

The table shows the binary code and the code used in the present invention for the selection input signal when the 32 phototransistors are accessed by using the decoder of 3-bit input-8-bit output.

The case where the selection input signal is 3 bits is shown, but the block in the active state (the current from the current source is flowing) is shown at the right end. By performing such encoding, as is apparent from the table, the number of bits that the selection input signal changes in each step of intra-block scanning is 1,
In the inter-block scanning step, only the block selection input signal changes, and the selection input signal does not change. That is, the number of changing bits of the input signal including the block selection input signal is suppressed to 1 at each scanning step. Such encoding of the selected input signal can be easily realized by the circuit shown in FIG. In FIG. 3, 59 is an exclusive OR gate string, 60 is an input terminal of natural binary code from the counter (J is MSB side, M is LSB side), and 61 is a gray code-like invention. A scanning signal output to be used (AI is MSB side, CI is LSB side) is given, and SH gives a shift clock for shifting the shift register 62 connected later at the time of its fall. The AI, BI and CI terminals are respectively AI and B shown in FIG.
Connect to the I and CI terminals. 63 is an output terminal for a block selection signal. It is clear that this code conversion yields a new code as shown in Table 1.

FIG. 4 shows a block diagram of a practical image sensor which operates by receiving the selection input signal encoded as described above. Reference numeral 64 is a current source, 65 is an input terminal of a block selection signal, 66 is a current switch for switching the current from the current source according to the block selection signal, 67 is an input terminal of a selection input signal for operating the decoder, and 68 is 3 It is a decoder string composed of 32 bit input-8 bit output decoders. 69 is a current switch array that is turned on or off depending on the presence or absence of the output current of the decoder, 70
Is a phototransistor array connected so as to be accessed by the current from the current switch array, and 71 is an output terminal of a video signal.

This circuit can scan 256 phototransistors. To extend the block select signal,
In FIG. 3, it can be implemented by increasing the number of stages of the shift register. The number of scannable phototransistors can be increased not only by increasing the number of decoders and the number of block selection inputs as described above, but also by increasing the number of bits of the selection input signal of the decoder. .

Next, a second embodiment of the present invention will be described with reference to FIG. In the present embodiment, noise current and dark current (leakage current) in the video signal are reduced by the canceling effect, whereby a video signal having a large S / N ratio and a wide dynamic range can be obtained. Reference numeral 72 denotes a decoding circuit section, which is composed of a current switch group connected in a tree shape as in the first embodiment. 73a, 73b, 74a, 74b are load resistors connected to the output of the decoder, and 75a, 75b,
76a and 76b are switching PNP transistors, 7
7a, 77b, 78a and 78b form a second phototransistor array, and the collector of each phototransistor is connected to the output terminal of the switching PNP transistor. 79a, 79b, 80a, 80b constitute a second phototransistor array, and the collector of each phototransistor is the second switching PNP transistor.
Is connected to the output terminal of. Reference numeral 81 denotes a common tangent to each emitter in the first phototransistor array, which forms a first video output terminal. Reference numeral 82 denotes a common connection of the emitters of the second phototransistor array, which forms a second video output terminal. One phototransistor array is provided with a light receiving window, the other phototransistor array is light-shielded, and a video output signal, a noise signal, and a dark signal are obtained from the image output terminal on the light-receiving side, and the phototransistor on the light-shielding side is provided. Noise signal from the video output terminal of
Noise and dark signals can be canceled by obtaining a dark signal and taking the difference between the signals from both terminals.

Next, a third embodiment of the present invention will be described with reference to FIG. Also in this embodiment, as in the second embodiment, a noise signal,
The purpose is to reduce dark signals. Reference numeral 83 denotes a decoder circuit section, which is composed of a current switch group connected in a tree shape as in the first embodiment. Reference numerals 84a, 84b, 85a, 85b denote load resistors connected to the output of the decoder, and 86a, 86b, 87a, 87.
b is a switching PNP transistor, 88a, 88
b, 89a and 89b are load resistances of the respective switching PNP transistors, and 90a, 90b, 91a and 91b are phototransistors 92a, 94a, 92b, 94b, 93a and 9a depending on the presence or absence of the terminal voltage of the latter load resistance.
A switching NPN transistor for controlling on / off of charging currents to 5a, 93b, and 95b. 92a,
Reference numerals 92b, 93a, and 93b constitute a first phototransistor array, the emitters of the respective phototransistors are connected to the collectors of the corresponding switching NPN transistors, and the collectors of the phototransistors are commonly connected to form a first video output terminal. 96. 94a, 94
b, 95a, 95b constitute a second phototransistor array, the emitter of each phototransistor is connected to the collector of the corresponding switching NPN transistor, the collectors of the phototransistors are commonly connected, and the second video output terminal It is 97. It is not necessary to interpose an isolation region in the bipolar integrated circuit technology between the phototransistors whose collectors are commonly connected, and the space density of the phototransistors can be increased.

One phototransistor array is provided with a light receiving window, the other phototransistor array is optically shielded, and the image output signal, noise signal, and dark signal are obtained from the image output terminal on the light receiving side, and the image on the light shielding side is obtained. The noise signal and the dark signal can be canceled by obtaining the noise signal and the dark signal from the output terminal and taking the difference between the signals from both terminals. As a result, a video signal having a large S / N ratio and a large dynamic range can be obtained.

Advantageous Effects of Invention For scanning a phototransistor, by using a scanning input signal in which only one bit changes in each scanning step and a plurality of decoders scanned by this input signal, a video output line for the scanning signal is obtained. Contamination is suppressed to a minimum. Further, by providing a circuit for canceling a noise signal and a dark signal due to a leak current, an image sensor which has low noise and can be used even at high temperature can be realized.

As is clear from the above description, according to the present invention, an image sensor with high speed, low noise, high sensitivity and high resolution can be realized. In addition, almost all functions can be formed on the silicon chip by the usual bipolar integrated circuit technology, and the reliability is good. Therefore, the present invention is extremely useful as an input device of information processing equipment, and its industrial effect is great.

[Brief description of drawings]

FIG. 1 is an input signal conversion circuit diagram of an image sensor according to the present invention, FIG. 2 is a circuit diagram of a decoder, FIG. 3 is a code conversion circuit diagram, FIG. 4 is a block diagram of a practical image sensor, and FIG. Is a phototransistor access circuit diagram in the second embodiment of the present invention, and FIG. 6 is a phototransistor access circuit diagram in the third embodiment of the present invention. 1 ... Selection input signal input terminal, 2 ... Complementary signal output terminal with different DC level, 3 ... Current source, 4,5,6 ... Current switch, 7,8,9 ... Resistance pair, 10,11 , 12
...... DC level setting transistor, 13 …… Complementary signal input terminal, 14, 15 …… Block signal input terminal, 16
...... Current source, 17, 18 ...... Current switch transistor, 19, 20, 21, ......... 25 ...... Current switch,
26a, 26b, 27a, ... 29b ... Load resistors connected to the output terminals of the decoder, 30a, 30b, 31
a ......... 33b ... Transistor for current switch, 3
4a, 34b, 35a, ... 37b ... Phototransistor, 38 ... Video signal output line, 39, 40, 41,
……… 45 Current switch, 46a, 46b, ………
49b: load resistance connected to the output terminal of the decoder, 5
0a, 50b, 51a, ... 53b ... current switch transistors, 54a, 54b, 55a, ... 57
b ... Phototransistor, 58 ... Current switch transistor, 59 ... Exclusive OR gate array, 60 ... Natural binary code input terminal, 61 ... New code output terminal, 62 ... Shift register, 63 ... Block Selection signal output terminal, 64 ... Current source, 65 ... Block selection signal input terminal, 66 ... Block current switch, 67 ... Selection signal input terminal, 68 ... 3-bit input-8-bit output decoder Group, 69 ... Current switch array, 70 ... Phototransistor array, 71 ...
Video signal output terminal, 72 ... Decoder section, 73a, 73
b ……… 74b …… Decoder load resistance, 75a, 7
5b, ... 76b ... PNP transistor for switching, 77a, 77b, ... 78b ... 1st phototransistor array, 79a, 79b, ... 80b.
Second phototransistor array, 81 ... First video output terminal, 82 ... Second video output terminal, 83 ... Decoder section, 84a, 84b, ... 85b ... Decoder load resistance, 86a, 86b ,. ...... 87b …… Switching PNP transistor, 88a, 88b, ……… 89b…
... load resistance, 90a, 90b, ... 91b ... switching NPN transistor, 92a, 92b, ... 9
3b ... first phototransistor array, 94a, 9
95b ... second phototransistor array, 96 ... first video signal output line, 97 ... second video signal output line.

Claims (3)

[Claims] 1. A current switch comprising a pair of transistors, in which a commonly connected emitter is a current input terminal and each collector is a current output terminal, is connected to the output terminal of the current switch located in the previous layer in the next stage. In the current switch group located in the same hierarchy among the current switch groups connected in a tree structure, the input terminals of the current switches located in the hierarchy are sequentially connected in a tree shape from the lower potential side. , The bases of one of the transistors forming the current switch are commonly connected to form a first baseline, the bases of the other transistor are commonly connected to form a second baseline, and One base line is connected to the bases of the transistors adjacent to each other of the adjacent current switches in the same layer, and the second common base line is connected to another base. A decoder in which the bases of the transistors are connected to each other and a plurality of pairs of the first and second baselines in each layer are formed in each block as complementary signal input terminals, a current source, and the current source An input terminal of the selected decoder, that is, a current source side current switch having a selection signal input terminal for flowing to the current switch on the lowest potential side, and an output terminal of the decoder, that is, the highest potential Side access current switch connected to each output terminal of the current switch, and turned on or off depending on the presence or absence of the output current of the decoder, a phototransistor connected to each output terminal of the access current switch, and the phototransistor The scanning natural binary code corresponding to the number of A circuit which receives selection signals obtained by sequentially performing code conversion from the lower bits of the exclusive OR sequence from the lower bits of the circuits to generate complementary signals having different DC levels for the number of layers, and selects one from the plurality of decoders A circuit for generating a block selection signal for applying a complementary signal of the number of layers from the circuit for generating the complementary signal to the complementary signal input terminals of each layer, and further supplying the block selection signal to the current source side. A bipolar IC image sensor, wherein the accumulated optical signal from the phototransistor is sequentially read out by applying to the selection signal input terminal of the current switch. 2. An array of first phototransistors having a collector connected to an output terminal of an access current switch;
A first video signal output terminal formed by commonly connecting the emitters of the phototransistors, and an array of second phototransistors having collectors connected to the output terminals of the access current switches, and the emitters of the phototransistors. Is provided in common, a photodetector window is provided in one phototransistor array, and light is blocked in the other phototransistor array, and the first video signal output and the second video signal output terminal are provided. The bipolar IC image sensor according to claim 1, wherein a difference from a video signal output is taken. 3. An array of first phototransistors having an emitter connected to an output terminal of an access current switch;
A first video signal output terminal formed by commonly connecting collectors of those phototransistors, and a second area formed by connecting an emitter to an output terminal of the access current switch.
And a second video signal output terminal formed by commonly connecting the collectors of these phototransistors, one phototransistor array having a light receiving window, and the other phototransistor array having a light receiving window. The bipolar IC image sensor according to claim 1, wherein the bipolar IC image sensor is cut off and a difference between the first video signal output and the second video signal output is obtained.