JPH0653360A - IC package and its mounting structure - Google Patents

Abstract

(57) [Abstract] [Purpose] A sandwiched pitch, multi-pin IC package that eliminates defective connections such as solder bridges and improves connection reliability and connection yield, and a mounting structure that mounts it on a wiring board. To get. [Structure] An electrode 4 of an LSI chip 2 in a bare chip state is resin-sealed with a resin 14 while being connected to an inner portion 10 of a lead frame 8. At the time of resin sealing, the surface of the outer lead 16 is exposed, and this portion is made lower than the main surface to form a step, thereby forming the IC package 1. At the time of mounting, the IC package 1 is attached to the wiring board 1.
8 and the outer leads 16 and the connecting terminals 22 provided on the wiring board 18 are connected by a wire bond, and at least the outer wire bonding portion 24 and the exposed connecting portion are resin-coated 26 to form a mounting structure. To do.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device and its mounting structure, and more particularly to an IC package suitable for a narrow pitch, multi-pin semiconductor device and its mounting structure.

[0002]

2. Description of the Related Art Large-scale computers, workstations, personal computers, word processors, etc., will continue to grow in demand as the semiconductor devices used in these devices will continue to grow due to the ever-increasing performance and multifunction of equipment and the expansion of products. Expected to continue. Further, in order to improve the performance of these devices, LSI chips are highly integrated, and the number of input / output terminals of one LSI chip is increasing. Since the external dimensions are almost never large, there is no choice but to narrow the pitch between terminals.

Most of these semiconductor devices are used in a mounting method in which they are connected to a printed wiring board by soldering. That is, solder is previously supplied to the connection pattern of the printed wiring board by screen printing,
This is a method in which the above-mentioned semiconductor device is aligned and arranged thereon, and soldering is performed by heating the connecting portion. In addition, as a thing related to this kind of technology, for example, the magazine "Surface mounting technology" first commemoration STM consecutive special feature No. 3
Bullets, pages 1 to 3, 1991-12.

However, as described above, the number of terminals is increased and the terminal pitch is narrowed.
0, terminal pitch 0.65 mm, instead of products such as 600-1000 terminals, terminal pitch 0.3
Products of millimeter to 0.2 mm have come to be used, and in the conventional connection using solder, there is a big problem that a circuit short circuit defect due to a solder bridge between terminals frequently occurs. Further, as a mounting method for a multi-terminal / narrow-pitch semiconductor device, a bare chip mounting method for mounting an LSI chip directly on a wiring board is being developed. It is difficult to put it into practical use because it is difficult.

[0005]

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to eliminate the above-mentioned problems of the prior art,
A first object is to provide an IC package for mounting a multi-terminal, narrow-pitch semiconductor device with high yield and high reliability, and a second object is to provide a mounting structure in which it is mounted on a wiring board. It is in.

[0006]

The first purpose is to mount an IC chip in a bare chip state on a lead frame,
The electrode of the C chip and the inner portion of the lead frame are connected by wire bonding, the IC chip and at least the inner portion of the lead frame including at least the connection portion of the wire bonding are resin-sealed, and the surface of the outer portion of the lead frame is Exposed on the resin of the stepped portion provided on the outer periphery of the sealing portion,
This is achieved by the first invention consisting of an arrayed IC package. Further, the first purpose is to use the TAB tape instead of the lead frame and attach the inner lead to the I
A second IC package which is connected to the electrodes of the C chip and seals the IC chip and at least the inner lead with a resin, and exposes and arranges the surface of the outer lead on the resin in the step portion provided on the outer periphery of the sealing portion. It is also achieved by the invention. In any of the above inventions, instead of resin sealing, it is also possible to use a ceramic package for sealing. Also in this case, the outer portion of the lead frame or the outer lead surface of the TAB tape is used as the outer periphery of the sealing portion. It may be exposed and arranged on the provided step portion.

A second object is to mount the IC package according to the first invention on a wiring board, connect the outer portion of the lead frame of the IC package and the connection terminal of the wiring board by wire bonding, and This is achieved by a mounting structure in which at least the outer portion of the IC package, the outer wire bonding portion, and the connecting terminals of the wiring board including the connecting portion are covered with resin. The second object is to mount the IC package according to the second invention on a wiring board, connect the outer leads of the IC package and the connection terminals of the wiring board by wire bonding, and at least to connect the IC package to the wiring board. This is also achieved by a mounting structure in which the outer leads, the outer wire bonding portions, and the connecting terminals of the wiring board including the connecting portions are covered with a resin.

[0008]

The outer portion of the lead frame or the outer lead of the TAB tape forming the external connection terminal of the IC package is arranged with its surface exposed on the stepped portion provided on the outer periphery of the resin sealing portion. The step portion is thinner than the main surface of the resin-sealed package. Therefore, in order to improve the strength of the outer periphery of the sealing portion, it is desirable to provide a thick portion having a thickness similar to that of the main surface adjacent to the step portion at a predetermined position, for example, each corner of the outer periphery of the sealing portion.

In the mounting structure in which the IC package is mounted and connected to the wiring board, the external connection terminal of the package, the outer wire bonding portion, and the connection terminal of the wiring board including the connection portion are covered with resin. The coating layer protects the connection portion formed by wire bonding from the outside and improves the reliability of the mounting structure.

[0010]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. <Example 1> (1) Example of configuration of IC package FIG. 1 is a sectional view showing the structure of an IC package, and FIG. 2 is a partially cutaway plan view of FIG. As shown in the figure, an electrode 4 is formed on the upper surface of the LSI chip 2 in the bare chip state. A lead frame 8 is arranged around the LSI chip 2 at a position close to the chip 2 so as to face the electrode 4, and the pitch and width thereof become wider toward the outer periphery. The electrode 4 and the inner portion 10 of the lead frame 8 are wire-bonded to each other by a gold wire 6. IC
The package 1 is sealed with a resin 14 while the upper surface of the outer portion 16 is partially exposed. FIG. 3 is a perspective view of the IC package 1. In this figure, I
In the corner of the C package 1, the meat pressure portion 15 by the resin 14 is provided.
Is formed.

In such a structure, the structure of the IC package 1 will be described first. Electrodes 4 for exchanging signals with the outside are formed on the surface of the LSI chip 2, and the inner portion 10 of the lead frame 8 and the electrodes 4 are formed.
Is wire-bonded with the gold wire 6. This wire bonding technique has been widely used conventionally. After performing the wire bonding, the wire bonding portion including the LSI chip 2 and the inner portion 10 of the lead frame 8 is mold-sealed with the resin 14.

In this molding step, a part of the upper mold (not shown) is pushed out from the lower mold to the inside of the cavity, so that the outer portion of the lead frame 8 as shown in FIGS. 1 and 3. The lower surface of 16 is fixed to the mold resin 14, the upper surface of the outer portion 16 has a stepped structure exposed to the outside, and the structure has a pressure portion 15 at the corner.

The pressure portion 15 is provided for reinforcement and is shown at the corner of the IC package 1 in the figure, but it is not particularly limited to the corner, and the lead frame 8 is not limited thereto.
May be at any position on each side. Immediately after the molding process, the lead frame 8 is projected to the outside of the IC package 1, but in a subsequent process, the lead frame 8 is cut at the end of the IC package 1 to finish the shape shown in FIG. As a result, it is possible to eliminate the need for cutting the tie bar (connecting individual leads to separate them) which connects between the leads of the lead frame, which has been conventionally difficult to process in a package of a narrow pitch semiconductor device. It is now possible to form an IC package with a new structure that has never been seen before.

Further, the LSI chip 2 is completely resin-sealed and only a part of the input / output pins formed of the outer portion 16 is exposed, so that the reliability of the semiconductor is sufficiently guaranteed, and This structure allows easy aging and characteristic inspection.

In the present structure, the surface of the outer portion 16 of the lead frame 8 is silver-plated in consideration of the subsequent wire-bonding property. However, if the wire-bonding such as gold or palladium is possible, silver is particularly preferable. It is not limited to. In addition, a part of the resin may adhere to the surface of the outer portion 16 of the lead frame 8 after the molding process, and plasma asher is performed by oxygen plasma for the purpose of removing the adhered resin.

(2) Example of IC Package Mounting Structure FIG. 4 shows an IC package mounting structure 12 in which the IC package 1 shown in FIGS. 1 to 3 is mounted on a printed wiring board 18.
FIG. 5 is a partially cutaway plan view of FIG. In these figures, the IC package 1 is adhesively fixed to the upper surface of the printed wiring board 18 by an adhesive material 20. A connection terminal 22 is formed in advance on the upper surface of the printed wiring board 18, and the connection terminal 22 and the outer portion 16 serving as an external connection lead of the IC package 1 are connected by an outer gold wire 24. The coating resin 26 coats the entire mounting portion including the outer wire bonding portion connected by the IC package 1, the connection terminal 22, and the outer gold wire 24.

In such a structure, the IC package 1
A specific implementation method of will be described. The printed wiring board 18 is provided on the surface thereof with the connection terminals 2 by the conventional method.
2 is formed. The IC package 1 is aligned with the upper surface of the printed wiring board 18 through the epoxy thermosetting adhesive 20 and fixed by adhesion. In this state, the outer portion 16 of the lead frame 8 and the connection terminal 22 are
Is wire-bonded with the outer gold wire 24.
Here, the surface of the connection terminal 22 is plated with gold in order to improve the wire bonding property, but the invention is not limited to gold plating. The wire material used for wire bonding is capable of electrical conduction such as a copper wire, a gold-coated copper wire, and an insulation-coated conductor wire, and can connect the outer portion 16 serving as an external connection lead of the IC package 1 and the connection terminal 22. The wire is not particularly limited to gold wire.

After wire bonding, an epoxy-based coating resin 26 is applied and sealed on the entire mounting portion including the outer wire bonding portion connected by the IC package 1, the connection terminal 22 and the outer gold wire 24.

In the mounting structure 12 shown in FIG. 4, since the IC package 1 is fixed directly on the printed wiring board 18, there is a step between the connection terminal 22 and the outer portion 16. I cut out a part and I in that place
By fixing the C package 1 by embedding it, it is possible to wire bond the connection terminal 22 with the same height plane as the outer portion 16.

(3) Modifications of the lead shape of the lead frame 8 and the shape of the connection terminal 22 of the printed wiring board 18 and their connection examples The plan views of FIGS. 6 to 8 will be described below. FIG. 6 shows I
In the plan view showing the shape of the lead frame in the C package 1 (semiconductor device), the electrodes 4 are arranged on the surface of the semiconductor chip 2, and the lead frame 8 is arranged in the peripheral portion of the semiconductor chip 2. There is. Lead frame 8
Is divided into an inner portion 10 connected to the chip 2 and an outer portion 16 connected to an external printed wiring board. In such a configuration, in this example, the inner portion 10 and the outer portion 1
6 has the same pattern width and the same pitch.
As a result, the shape of the lead frame 8 can be simplified, and therefore, in resin molding, the dimensional accuracy is improved, the manufacturing yield is improved in the formation of the lead frame using a mold suitable for mass production, and the mold and It is possible to significantly reduce the manufacturing cost of the lead frame.

FIG. 7 is a plan view showing an example in which the shape pattern of the connection terminals 22 on the printed wiring board 18 is modified, and the connection terminals 22 are arranged in a staggered arrangement. As a result, the connection pattern on the printed wiring board side can be widely formed with respect to the lead frame 8 having a narrow pitch, the pattern design of the printed wiring board, the simplification of manufacturing, and the margin of alignment at the time of wire bonding. Can be improved. Further, in this example, the connection terminals 22 are arranged at equal pitches according to the pitch of the lead frame 8. However, in the present invention in which the lead frame and the connection terminals are connected by wire bonding, the connection is made to the pattern arrangement of the lead frame 8. Terminal 2
Since the arrangement of 2 can be arbitrarily set, there is an advantage that the degree of freedom in pattern design of the printed wiring board can be increased.

In FIG. 8, the connection terminal 22 is connected to the signal terminal 27,
A power supply terminal 28 and a ground terminal 29 are provided, and the power supply terminal 28 and the ground terminal 29 are arranged in a different order from the signal terminal 27. In other words, an LSI chip such as a gate array, which is a target product of narrow pitch and multiple pins, requires a plurality of power supply and ground terminals for one chip, but since these individual terminals have the same potential, printing is performed. A common pattern will suffice on the wiring board side,
FIG. 8 shows an example of the pattern arrangement for this purpose. With such a pattern arrangement, the power supply,
The width of the ground pattern can be widened, and the electrical characteristics can be greatly improved. In addition, there is an advantage that a sufficient margin can be provided for the signal pattern arrangement and the degree of freedom in pattern design of the printed wiring board can be increased.

In this example, as the IC package 1, an example of resin encapsulation (resin mold) is shown. However, instead of resin encapsulation, well-known glass encapsulation or ceramic package encapsulation may be employed. It goes without saying that you can do it.

<Second Embodiment> FIG. 9 is a sectional view showing an IC package 1 and its mounting structure 12 according to a second embodiment. In this example, a TAB tape is used instead of the lead frame 8 of the IC package of the first embodiment to form a tape carrier package. In the figure, the LSI
Bumps 30 are formed on the surface of the chip 2 and TA
A film 38 is bonded to the inner leads 34 of the B tape 32, a film 38 is attached to the outer leads 36 of the TAB tape 32, and the entire surfaces of the LSI chip 2 and the TAB tape 32 except the surface of the outer leads 36 are not shown. A tape carrier package (hereinafter abbreviated as TCP) 40 covered with a thin resin layer is formed. TC
P40 is a state in which the upper surface of the outer lead 36 is partially exposed, and the others are sealed by the resin 14 to form the IC package 1. The resin sealing with the resin 14 is performed using the same mold as that of the first embodiment. After molding, cut off excess tape on the wall of the package.

The connection terminal 2 is provided on the upper surface of the printed wiring board 18.
2 is formed, and the IC package 1 is adhesively fixed to the upper surface of the printed wiring board 18 with the adhesive material 20. The connection terminal 22 and the outer lead 36 are connected by an outer gold wire 24. The coating resin 26 coats the entire mounting portion including the IC package 1, the connection terminal 22, and the outer wire bonding portion connected by the outer gold wire 24.

In the second embodiment, as described above, the LSI chip 2 is connected to the TAB tape 32 and the TC is connected.
P40, the resin-molded IC package 1 is wire-bonded to the printed wiring board 18 so that the surface of the outer lead 36 of the TCP 40 is partially exposed, and the entire mounting portion including the bonding area is coated with the resin 26. Is. In this embodiment, IC
Since TCP is used for the structure of the package 1, it is possible to form inner leads and outer leads with a narrower pitch than that of the structure of the first embodiment using the lead frame, and it is possible to achieve higher density mounting.

In this example, when the IC package 1 is formed, a TCP is used to form a thin resin coating layer on the entire surface of the LSI chip 2 and the TAB tape 32 excluding the surface of the outer lead 36 portion to form a TCP 40. However, since resin sealing is performed in a later step, resin coating at this stage is not always necessary and can be omitted. That is, the bumps 30 of the LSI chip 2 may be bonded to the inner leads 34 using the TAB tape 32 instead of the lead frame of the first embodiment, and the surfaces of the outer leads 36 may be exposed and resin-sealed.

<Third Embodiment> Next, a third embodiment will be described with reference to the sectional views of FIGS. This embodiment has a configuration using TCP as in the second embodiment. First,
In FIG. 10, bumps 30 are formed on the surface of the LSI chip 2, and the inner leads 34 of the TAB tape 32 are formed.
It is joined with. A film 38 is attached to the outer lead 36 of the TAB tape 32 on the surface opposite to the position where the LSI chip 2 is arranged. IC package 1
Is sealed with the resin 14 while the upper surface of the outer lead 36 is partially exposed.

The connection terminal 2 is provided on the upper surface of the printed wiring board 18.
2 is formed, and the IC package 1 is adhesively fixed to the upper surface of the printed wiring board 18 with the adhesive 20 with the inner lead portion of the chip facing downward. The connection terminal 22 of the printed wiring board 18 and the outer lead 36 are connected by the outer gold wire 24. The coating resin 26 coats the entire mounting portion including the IC package 1, the connection terminal 22, and the outer wire bonding portion connected by the outer gold wire 24.

FIG. 11 shows the TCP film 3 shown in FIG.
8 is arranged on the same plane as the position where the chip is arranged, and is fixed by adhesion with the inner lead portion of the chip 2 facing upward. The connection with the printed wiring board 18 and the coating are the same as those shown in FIG. Is.

In Example 3, the film of the outer lead portion of the conventionally used TCP is directly adhered and fixed to the surface of the printed wiring board, and the outer lead on the film and the connection pattern on the printed wiring board are wire-bonded. Although they are connected with each other, the same effects as those of the first and second embodiments can be obtained.

[0032]

As described above, according to the present invention, the intended purpose can be achieved. That is, by having a structure in which one surface of the outer lead of the semiconductor device is fixed to the sealing resin and the other surface is exposed, the tie bar cutting process is unnecessary, and it is possible to form an IC package with a narrower pitch and multiple pins. It was Also, by connecting the outer lead of the IC package and the connection terminal of the printed wiring board by wire bonding, there is no need to align the lead and the terminal by overlapping, and the alignment becomes very easy, and at the same time the conventional alignment is performed. It was possible to completely eliminate short-circuiting defects and insulation defects due to the solder bridge between adjacent terminals, which was caused by the deviation of the wiring, and it was possible to greatly improve the yield. In addition, since the layout of the connection terminals of the printed wiring board can be arbitrarily set with respect to the layout of the outer leads of the IC package, the degree of freedom in the pattern design of the printed wiring board is increased, and higher performance and higher performance product design is possible. It will be possible.

[Brief description of drawings]

FIG. 1 is a cross-sectional configuration diagram of an IC package according to an embodiment of the present invention.

FIG. 2 is a plan view in which a part thereof is also cut away.

FIG. 3 is a perspective view of the same.

FIG. 4 is a cross-sectional configuration diagram showing a state in which an IC package according to an embodiment of the present invention is mounted on a printed wiring board.

FIG. 5 is a plan view in which a part thereof is also cut away.

FIG. 6 is a plan view showing another embodiment in which the shape of the lead frame is also changed.

FIG. 7 is a plan view showing a connection state between a connection terminal and a lead frame which is another embodiment.

FIG. 8 is a plan view showing a connection state between the connection terminal and the lead frame.

FIG. 9 is a sectional view showing a state of being mounted on an IC package and a wiring board according to another embodiment of the same.

FIG. 10 is a sectional view showing a state of being mounted on an IC package and a wiring board according to another embodiment.

FIG. 11 is a sectional view showing a state of being mounted on an IC package and a wiring board according to another embodiment.

[Explanation of symbols]

1 ... IC package, 2 ... LSI
Chip, 4 ... LSI chip surface electrode, 6
… Gold wire, 8… Lead frame, 10
... Lead frame inner portion, 12 ... IC package mounting structure, 14 ... Resin sealing resin, 15 ... Resin sealing portion thick portion, 16 ... Lead frame outer portion, 18 ... Printed wiring board, 20
… Adhesives, 22… Connection terminals, 2
4 ... Gold wire for outer, 26 ... Coating resin,
27 ... Signal terminal, 28 ... Power terminal,
29 ... Ground terminal, 30 ... Bump on LSI chip surface, 32 ... TAB tape, 34 ... Inner lead part, 36 ... Outer lead part, 38 ... Film, 40 ... Tape carrier package.

Claims (10)

[Claims] 1. An IC chip in a bare chip state is mounted on a lead frame, and an electrode of the IC chip and an inner part of the lead frame are connected by wire bonding, and at the same time, the IC chip, the wire bonding part, and a connecting part thereof. An inner portion of the lead frame including at least one surface of the outer portion of the lead frame is resin-sealed, and the surface of the outer portion of the lead frame is exposed and arranged on a step portion provided on the outer periphery of the sealing portion. IC package. 2. The IC package according to claim 1, wherein the pitch between the inner portion and the outer portion of the lead frame and the lead width are made wider toward the outer peripheral portion. 3. The IC package according to claim 1, wherein the pitch and the lead width of the inner portion and the outer portion of the lead frame are equal to each other. 4. An IC chip in a bare chip state is mounted on a TAB tape, an inner lead of the TAB tape is connected to an electrode of the IC chip, and the IC chip, the inner lead and at least one surface of an outer lead of the TAB tape are attached. The IC package according to claim 1, wherein the IC is sealed with a resin, and the surface of the outer lead is exposed and arranged on a step portion provided on the outer circumference of the sealing portion. 5. The IC package according to claim 1, wherein the step portion is formed to be thin with respect to the resin-sealed main surface. 6. The step portion is thin with respect to the resin-sealed main surface, and a thick portion is provided adjacent to the step portion on the outer periphery of the sealing portion. Or the described IC
package. 7. An outer portion of a lead frame, which is sealed with a ceramic package instead of the resin.
7. The IC package according to claim 1, wherein the outer lead surface of the TAB tape is exposed and arranged on a step portion provided on the outer periphery of the sealing portion. 8. The IC package according to claim 1 is mounted on a wiring board, and the outer portion of the lead frame of the IC package or the outer lead of a TAB tape and a connection terminal of the wiring board are wire-bonded. A mounting structure for an IC package, which is formed by connecting and connecting at least the outer portion or outer lead portion of the IC package and the connection terminals of the wiring board including the outer wire bonding portion and the connection portion. 9. The arrangement according to claim 8, wherein the pitch between the inner portion and the outer portion of the lead frame, or the pitch between the inner lead and the outer lead of the TAB tape and the pitch of the connection terminals of the wiring board are made different. IC package mounting structure. 10. A lead frame outer portion or TA
9. The I according to claim 8, wherein the connecting portion of one of the outer lead of the B tape and the connecting terminal of the wiring board is arranged in a staggered arrangement.
C package mounting structure.