JPH0653748A - Variable gain amplifier - Google Patents

Abstract

PURPOSE:To make the gain stable against a temperature change by applying temperature correction to a control voltage of the variable gain control amplifier through the use of an operational amplifier to eliminate a term of a thermal voltage of transistors(TRs) included in a formula of the gain of the variable gain amplifier. CONSTITUTION:A dual differential circuit 1 having an input terminal IN, an output terminal OUT and 1st-3rd differential amplifier circuits is provided in the gain variable amplifier. Then an output of a TR Q7 of the differential amplifier circuit 2 is given to bases of TRs Q2, Q3 of the circuit 1 and to an input of a TR Q9 of the differential amplifier circuit 3. An output of a TR Q8 of the differential amplifier circuit 2 is given to bases of TRs Q1, Q4 of the circuit 1 and to an input of a TR Q10 of the differential amplifier circuit 3, and an output of the TR Q9 of the differential amplifier circuit 3 is given to a noninverting input of an operational amplifier via a resistor R3 and an output of the TR Q10 is connected to an inverting input of the operational amplifier via a resistor R1. Then an output terminal of the operational amplifier is connected to the inverting input terminal and a base of the TR Q8 and a base of the TR Q7 is connected to a bias VC1 respectively. Through the constitution above, the gain A of the variable gain amplifier is expressed in formulas I, II and a term of a TR thermal voltage VT is eliminated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a variable gain amplifier, and more particularly to a high frequency variable gain amplifier.

[0002]

2. Description of the Related Art In a conventional variable gain amplifier, as shown in FIG. 5, a bi-differential circuit composed of transistors Q _{1 to} Q ₆ is commonly used at a high frequency of several hundred MHz and is well known. It is a circuit. The operation of this circuit will be described.

The input signal V _in is input between the bases of the transistors Q ₅ and Q ₆ , and the base of the transistor Q ₆ is biased. The common emitters of the transistors Q ₅ and Q ₆ are connected to the constant current source I ₁ and the current value of the constant current source is 2I.
_Set to ₀ .

The collector current I ₆ of the transistor Q6 is expressed by the following equation.

I ₆ = 2I ₀ / {1 + exp (V _in / V _T )} (1) where V _T is the thermal voltage of the transistor. The base voltage of the transistor Q ₃ is V _B1 , the base voltage of the transistor Q ₄ is V _c , and the base voltage of the transistor Q _{3 is} Q ₃ .
Since the sum of the emitter current of ₄ is a I _6, the collector current I ₄ of the transistor Q ₄ are represented by the following formula.

[0006] _{I 4 = I 6 / [1} + exp {(V B1 -V c) / V T}] ...... (2) (2) Expression in by substituting equation (1) I ₄ = [I ₀ / [1 + exp {(V _B1 −V _c ) / V _T }] · [1 / {1 + exp (V _in / V _T )}] (3) Further, the input signal V _in is smaller than V _T. Sometimes
The equation (1) can be approximated by the following equation.

I ₆ = gmV _in + I _O / 2 (4) where gm is the transconductance of the transistors Q ₅ and Q ₆ .

Therefore, the output voltage V _o of the variable gain amplifier is V _O = R _L I ₄ = [R _L / [1 + exp {(V _B1 −V _C ) / V _T }]] · (g mV _in + I _O / 2 _{) ...... (5) V O =} [R C2 gm / _{[1 + exp {(V B1 -V} C) / V T} _{]] Vin + (R C2 I O} / 2) / {1 + exp (V B1 -V C) / V _T} ...... (6) alternating portions V _O of the V _O in the formula (6) is V _O = R _C2 gm / _{[[1 + exp {(V B1 -V} C) / V T} ]] V _in ...... (7) Now, with V _B1 being a low voltage and V _C being a variable control voltage, the gain A _O of the variable gain amplifier is A _O = R _C2 gm / [1 + exp {(V _B1 −V _C ) / V _T }] (8) As shown by the equation (8), the gain A _O is the variable control voltage V _C.
It depends on The mutual conductance gm of the transistors Q ₅ and Q ₆ is gm = 2qI ₀ / 4kT = qI ₀ / 2kT (9) where k is the Boltzmann constant, T is the absolute temperature, and q is the charge amount of electrons.

Now, when I ₀ is temperature-corrected by a bandgap current source as shown in FIG. 3, I ₀ = 2V _T lnN (r ₂ / r ₁ ) / R _E (10) assignment to _{gm = I 0 / 2V T =} lnN (r 2 / r 1) / R E ...... (11) (11) by substituting expression (8) where a ₀ is a ₀ = (R _C2 / _{R E) · (r 2 /} r 1) lnN / _{[1 + exp {(V B1 -V} C) / V T} ] ...... becomes (12).

Now, to find the temperature change of A ₀ , t = 0
When the gain at ° C is A ₁ , and the gain at t = 100 ° C is A ₂ , (the thermal voltage at 0 ° C is V _T1 , and the thermal voltage at 100 ° C is V _T2 .) A ₂ / A ₁ = [ 1 + exp {(V _B1 −V _C ) / V _T1 }] / [1 + exp {(V _B1 −V _C ) / V _T2 }] Now, assuming that V _B1 −V _C = 2 V _T (at room temperature t = 27 ° C. The thermal voltage is set to V _T. ) A ₂ / A ₁ = {1 + exp (2V _T / V _T1 )} / {1 + exp (2V _T / V _T2 ) = {1 + exp (2 × 300/273)} / {1 + exp ( 2 × 300/37 3)} ≈1.67 A change in temperature of 100 ° C. causes a gain variation of about 67%.

[0011]

In this conventional variable gain amplifier, the gain A0 is A ₀ = (R _C2 / R _E )  (r ₂ / r ₁ ) lnN / [1 + exp] according to the equation (12) of the conventional example. {(V _B1 −V _C ) / V _T }] Since A ₀ contains the thermal voltage V _{T of the} transistor, the gain A ₀ varies with temperature.

When the present circuit is applied to an AGC circuit, the control voltage of the AGC circuit changes with temperature. In general, an AGC circuit used in a tuner or the like may be used to display the electric field strength of an input signal with a level meter by using this control voltage. At this time, if the control voltage fluctuates with temperature, there is a problem that the output of the level meter changes with temperature.

The object of the present invention has been made in view of the above-mentioned problems, paying attention to the thermal voltage of the transistor included in the expression of the gain of the variable gain amplifier, and eliminating this thermal voltage will increase the gain. It is to provide a means to be stable against temperature.

[0014]

A feature of the present invention is that an input signal is input to a first differential circuit, and one output end of the first differential circuit is common to the second differential circuit. The other output end of the first differential circuit is connected to the emitter end, and the other output end of the first differential circuit is connected to the common emitter end of the third differential circuit.
A load is connected to either one of the two output terminals of the differential circuit, and a load is connected to one of the bases of the second differential circuit and one of the third differential circuits. The bases are connected in common, and are connected to one input end of a first differential amplifier that connects a first constant current source to a common emitter end, and the other base of the second differential circuit and the third differential circuit. The other bases of the differential circuits are commonly connected and connected to the other input end of the first differential amplifier, and have the same polarity as the input signal of the one input end of the first differential amplifier. The output signal is input to the inverting input terminal of the operational amplifier via the first resistor, and the output signal having the same polarity as the input signal of the other input terminal of the first differential amplifier is connected to the first resistor. It is input to the non-inverting input terminal of the operational amplifier through the second resistor having the same resistance value. The inverting input terminal of the operational amplifier is connected to the output terminal of the operational amplifier through a third resistor, and the non-inverting input terminal of the operational amplifier is connected through a fourth resistor having the same resistance value as the third resistor. Biased,
The output terminal of the operational amplifier is connected to one input terminal of a second differential amplifier that connects a second constant current source to a common emitter terminal, and the variable control voltage is input to the other input of the second differential amplifier. An output signal having the same polarity as the input signal of the one input end of the second differential amplifier is input to the one input end of the first differential amplifier, and the second difference An output signal having the same polarity as the input signal of the other input end of the dynamic amplifier is input to the other input end of the first differential amplifier for configuration.

The emitter of the one transistor of the first differential circuit is connected to the first transistor via a fifth resistor.
The emitter of the other transistor of the differential circuit of
Is connected to one end of each of the seventh resistors via the resistor of, and the other end of the seventh resistor is connected to a ground line,
The emitter of the one transistor of the second differential amplifier is connected to the third constant current source, and the emitter of the other transistor of the second differential amplifier is connected to the fourth constant current source. In addition, the emitter of the one transistor of the second differential amplifier and the emitter of the other transistor of the second differential amplifier can be connected via an eighth resistor.

[0016]

The present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of the variable gain amplifier of the present invention. The overall structure, double differential circuit 1, a differential amplifier 2, the differential amplifier 3, made from the operational amplifier OP, the transistors Q ₅ of the first differential circuit input signal Vin constitute a bi-differential circuit 1, Input to Q ₆ . The output terminal of the transistor Q ₅ is connected to the common emitter terminals of the transistors Q ₁ and Q ₂ of the second differential circuit, and the output terminal of the transistor Q ₆ is the transistors Q ₃ and Q _{4 of the third} differential circuit. Connected to the common emitter end of. Transistors Q ₁ , Q ₂ ,
A load resistor R _C1 is connected to the transistor Q ₁ among the output terminals of Q ₃ and Q ₄ .

Transistor Q ₁ of the second differential circuit, third
The base of the transistor Q ₄ of the differential circuit is commonly connected to the base of the transistor Q ₁₀ of the first differential amplifier, and the bases of the transistors Q ₂ and Q ₃ are commonly connected to the transistor of the first differential amplifier. A first constant current source I ₃ is connected to the bases of Q ₉ and the common emitter end of the first differential amplifier.

The output signal of the transistor Q ₁₀ having an output of the same polarity as the input signal of one input terminal of the first differential amplifier 3 is passed through the first resistor R ₁ and the inverting input terminal (-) of the operational amplifier is used. The output of the transistor Q ₉ having the same polarity as the input signal of the other input terminal of the first differential amplifier 3 is input to the second resistor R ₃ having the same resistance value as the _first resistor R _1.
Is input to the non-inverting input terminal (+) of the operational amplifier OP.

The inverting input terminal of the operational amplifier OP is connected to the output terminal of the operational amplifier OP via the third resistor R ₂ .
The non-inverting input terminal of the operational amplifier is connected to the third resistor R ₂
It is biased through a fourth resistor R4 having the same resistance value as. Further, the output terminal of the operational amplifier OP is connected to the input terminal of the transistor Q ₈ of the second differential amplifier 2 which connects the _second constant current source I ₂ to the common emitter terminal.

The variable control voltage V _C1 is connected to the input terminal of the transistor Q ₇ of the second differential amplifier 2. The output signal of the transistor Q ₈ having the same polarity as the input signal of one input terminal of the second differential amplifier 2 is input to the input terminal of the transistor Q ₁₀ of the first differential amplifier 3, The output signal of the transistor Q ₇ having the same polarity as the input signal of the other input terminal of the differential amplifier is input to the input terminal of the transistor Q ₉ of the first differential amplifier.

Next, the operation of this embodiment will be described.

The collector current I ₆ of Torajisuta Q ₆ when the input signal V _in is less than the thermal voltage of the transistor VT (time of small signal operation) is represented by the formula _{(21) I 6 = gm ·} V in + I 0 ... (21) +, gm is the transconductance of the transistor Q ₅ .

[0024] The following base voltage of the transistor Q ₃ V _B3, the base voltage of the transistor Q ₄ and V _B4, the collector of the transistor Q _3, Q ₄ of the base voltage △ V = V _B3 -V _B4 as the transistor Q ₄ The current I ₄ is calculated as follows: I ₄ = I ₆ / {1 + exp (ΔV / V _T )} (22) Substituting the formula (21) into the formula (22), I ₄ = gmV _in / {1 + exp (ΔV / V _T )} + I ₀ / {1 + exp (ΔV / V _T )} ... (23) Therefore, the output voltage V ₀ is V ₀ = R _C2 I ₄ = R _C2 gmV _in / {1 + exp (ΔV / _{V T)} + I 0 /} {1 + exp (△ V / V T)} ...... (24) the AC component V ₀ which the output voltage V ₀ is V ₀ = _{[R L gm / {1 + exp} (△ V / V T) } V _in (25) Next, ΔV is obtained from FIG.

ΔV is not only the voltage between the bases of the transistors Q ₃ and Q ₄ but also the input voltage of the differential amplifier 3. One large voltage follower is composed of the differential amplifiers 1 and 2 and the operational amplifier. That is, the variable control voltage V _C1 input to the base of the transistor Q ₇
Negative feedback is applied so that the base voltage of the transistor Q _{8 and} the base voltage of the transistor Q ₈ match. Therefore, the base voltage of the transistor Q ₈ becomes substantially equal to V _C1 , that is, the output voltage of the operational amplifier becomes V _C1 .

[0026] Now, in the differential amplifier 3, V ₉ the collector voltage of the transistor Q _9, a V ₁₀ of the collector voltage of the transistor _{Q 10, V C1 = (V} 10 -V 9) R 2 / R 1 + V B2 ... (26) The base voltage of the transistor Q ₉ is V _B9 , and the transistor Q is
_If the base voltage of ₁₀ is V _B10 , (V _B9 −V _B10 ) gmR _C6 = V ₁₀ −V ₉ (27) From FIG. 2, V _B9 −V _B10 = ΔV, so ΔVgmR _C6 = (V _C1 −V _B2 ) · (R ₁ / R ₂ ) By substituting the formula (26) into this formula, ΔVgmR _C6 = (V _C1 −V _B2 ) R ₁ / R ₂ ΔV = (1 / gm ) ・ (R ₁ / R ₂ ) ・ (1 / R _C6 ) ・ (V _C1 −V _B2 ) = (4 kT / 2qI ₂ ) ・ (R ₁ / R ₂ ) ・ (1 / R _C6 ) ・ (V _{C1 -V B2) = (2kT /} q) (R 1 / R 2) · (1 / R C6 I 2) · (V C1 -V B2) = 2V T (R 1 / R 2) · (1 / R _C6 · I ₂ ) · (V _C1 −V _B2 ) ... (28) From the formula (25), the gain A of the variable gain amplifier (25) is A = R _C2 gm / {1 / xep (ΔV / V _T )} (29) (29) by substituting the expression (28), a = R _C2 gm / _{1 + exp {(2R 1 /} R 2) · (1 / R C6 I 2) · (V C1 -V B2)} ] ... (30) (30) for temperature compensation of gm in equation a constant current source I1 When the band-gap type constant current source as shown in FIG. 3, the current value of I1 _{is, I 1 = 2V T lnN (} r 2 / r 1) / R E ...... (31) Therefore gm is, gm = I _{1 / 4V T = (1 / 4V} T) · {2V T lnN (r 2 / r 1) / R E} = lnN (r 2 / r 1) / 2R E ...... (32) (32) equation (30 ) are substituted into _{equation, a = {R C2 lnN (} r 2 / r 1) / 2R E} / _{[1 + exp {(2R 1 /} R 2) · (1 / R C6 I 2) · (V C1 -V _B2 )}] (33) In the equation (33), the current value I ₂ of the constant current source I3 of the differential amplifier 3 can be expressed as follows by using the circuit shown in FIG.

If I2 = V _REG / R _B (34) and the variable control voltage V _C1 and the bias voltage V _{B2 of the} operational amplifier OP are also divided from the regulator voltage of FIG. 4 and given as shown in FIG. V _C1 = {R _CC1 / (R _CC1 + R _CC2 )} ・ V _REG …… (35) V _B2 = {R _BI1 / (R _BT1 + R _BI2 )} ・ V _REG …… (36) Above (34), By substituting the equations (35) and (36) into the equation (33) and rearranging, A = (1/2). (R _C2 / R _E ). (R ₂ / r ₁ ) lnN / [1 + exp [2 ( R ₁ / R ₂ ) ・ (R _B / R _C6 ) ・ {R _CC1 / (R _CC1 + R _CC2 ) −R _BI1 / (R _B1 + R _BI2 )}]] ... (37) Variable gain from equation (37) The gain A of the amplifier is R _CC1 , R
_The gain can be changed simply by changing the resistance ratio of _CC2 .

Next, the second embodiment will be described with reference to the circuit diagram shown in FIG.

In FIG. 2, the difference from the first embodiment is that the emitter of one transistor Q ₅ of the first differential circuit is connected to the other of the first differential circuit via the fifth resistor R _E1. The emitter of the transistor Q ₆ is connected to one end of the seventh resistor R _E3 via the sixth resistor R _E2 , and
The other end of the seventh resistor R _E3 is connected to the ground line, and the emitter of one transistor Q ₇ of the second differential amplifier 2 is connected to the third constant current source I ₄ and the second differential amplifier The emitter of the other transistor Q ₈ of the amplifier 2 is the fourth constant current source I ₅
And the emitters of the transistors Q ₇ and Q ₈ of the second differential amplifier 2 are connected to each other via the eighth resistor R _E4 .

In the second embodiment, the resistors R _E4 and the constant current sources I4 and I5 are connected to the transistors Q ₇ and Q ₈ in order to increase the input dynamic range of the variable gain control voltage. In addition, since this circuit combines the operational amplifier and the two differential amplifiers 2 and 3 to form the feedback circuit,
It is necessary to pay attention to the oscillation stability. Transistors Q ₇ , Q
The feedback gain of the feedback circuit is adjusted by the resistor R _E4 added to ₈ .

Also in the first embodiment, the feedback gain can be changed by adjusting the constant current source I2 of the second differential amplifier 2.
By doing this, the output dynamic range of the second differential amplifier 2 changes, and the gain control range is limited. Therefore, the resistors R and R are connected to the transistors Q ₇ and Q ₈ so that the feedback gain can be changed without changing the gain control range.
_E4 and constant current sources I4 and I5 are added.

Since the operation is basically the same as that of the first embodiment, its explanation is omitted.

[0033]

As described above, according to the present invention, since the control voltage of the variable gain control amplifier is temperature-corrected by using the operational amplifier, it is strong against the temperature fluctuation of the gain, which is expressed by the formula (37) of the embodiment. A = (1/2) ・ (R _C2 / R _E ) ・ (r ₂ / r ₁ ) lnN / [1 + exp [2 (R ₁ / R ₂ ) ・ (R _B / R _C6 ) ・ {R _CC1 / ( R _CC1 + R _CC2 ) −R _BI1 / (R _BI1 + R _BI2 )}]] ... (37), the term of the thermal voltage of the transistor disappears and is expressed only by the resistance ratio. Therefore, when the present invention is integrated into an IC, it is completely stable against not only temperature fluctuations but also resistance value variations and power supply fluctuations. Even if the present invention is applied to an AGC circuit as has been extended in the conventional example. AG
Since the C voltage is quite stable, it has the effect that this voltage can be used as the level output of the input signal.

[Brief description of drawings]

FIG. 1 is a circuit diagram of a first embodiment of the present invention.

FIG. 2 is a circuit diagram of a second embodiment of the present invention.

FIG. 3 is a circuit diagram of a band cap regulator that provides the constant current I ₁ of FIG.

FIG. 4 is a circuit diagram for applying a bias V _B2 and a voltage of a variable voltage source V _C1 in FIG.

FIG. 5 is a circuit diagram showing an example of a conventional variable gain amplifier.

[Explanation of symbols]

1 bi-differential circuit 2, 3 differential amplifier IN input terminal OUT output terminal V _in input signal V ₀ output voltage V _CC supply power supply voltage V _C1 variable voltage source V _B1 , V _B2 bias voltage source I ₁ , I ₂ , I ₃ Constant current source R _{C1 to} R _C6 Load resistance R _{1 to} R ₄ resistance Q _{1 to} Q ₁₀ Transistor OP operational amplifier

Claims (2)

[Claims] 1. An input signal is input to a first differential circuit,
One output end of the first differential circuit is connected to a common emitter end of the second differential circuit, and the other output end of the first differential circuit is common to the third differential circuit. A load is connected to one of the two output terminals of the second differential circuit connected to the emitter terminal, and a load is connected to one of the output terminals of the second differential circuit. The base and one of the bases of the third differential circuit are commonly connected, and are also connected to one input end of a first differential amplifier that connects a first constant current source to a common emitter end of the second differential circuit. The other base of the differential circuit and the other base of the third differential circuit are commonly connected, and connected to the other input end of the first differential amplifier, The output signal of the same polarity as the input signal of the one input terminal is input to the inverting input of the operational amplifier via the first resistor. And an output signal having the same polarity as the input signal of the other input end of the first differential amplifier is input to the non-inversion of the operational amplifier via the second resistor having the same resistance value as the first resistor. Input to the input terminal, the inverting input terminal of the operational amplifier is connected to the output terminal of the operational amplifier through a third resistor, and the non-inverting input terminal of the operational amplifier has the same resistance value as that of the third resistor. Biased through a fourth resistor, the output of the operational amplifier is connected to one input of a second differential amplifier connecting a second constant current source to the common emitter, and the variable control voltage is An output signal that is connected to the other input terminal of the second differential amplifier and has the same polarity as the input signal of the one input terminal of the second differential amplifier is the one input of the first differential amplifier. Input to the end and before the second differential amplifier The other of the same polarity output signal of the input signal of the input terminal, a variable gain amplifier and wherein the configuring is input to the other input terminal of said first differential amplifier. 2. The emitter of the one transistor of the first differential circuit is connected via a fifth resistor, and the emitter of the other transistor of the first differential circuit is connected via a sixth resistor. Each of them is connected to one end of a seventh resistor, the other end of the seventh resistor is connected to a ground line, and the emitter of the one transistor of the second differential amplifier is a third constant current source. And an emitter of the other transistor of the second differential amplifier is connected to a fourth constant current source, and an emitter of the one transistor of the second differential amplifier and the second transistor of the second differential amplifier are connected. 2. The variable gain amplifier according to claim 1, wherein the differential amplifier is connected to the emitter of the other transistor of the differential amplifier via an eighth resistor.