JPH0678237A - Television signal receiver - Google Patents

Abstract

(57) [Abstract] [Purpose] MUSE Decoder 302, MUSE-NTS
In a television signal receiver incorporating the C conversion circuit 127, the required power source is reduced as much as possible and the interference of the clock with the tuner is reduced. [Constitution] MUSE-NTSC for the television receiver
A discrimination circuit 127 and relay circuits 121 and 301 are provided,
Depending on the discrimination result of the MUSE-NTSC discriminating circuit 127, the relay circuits 121 and 301 are turned on and off, and the power supply is turned on and off.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television signal receiver, more specifically, a terrestrial television signal receiver, a satellite broadcast receiver, and a signal received by the receiver is a MUSE signal. The present invention relates to a television signal receiver having a built-in converter for converting a high-definition signal such as the above into an NTSC signal or a baseband signal.

[0002]

2. Description of the Related Art Although high-definition signals can be received by current television receivers such as clear-vision broadcasting and satellite broadcasting, on the other hand, broadcasting different from conventional broadcasting systems such as high-definition broadcasting Is about to spread. As a method of transmitting such high-definition broadcasting, MUSE (Mu) proposed by NHK (Japan Broadcasting Corporation) is proposed.
Little Subnyquist Samplin
g Encoding) system, and its test broadcasting has started.

To spread the high-definition broadcasting as described above, a receiver that can receive not only the high-definition broadcasting but also the current television broadcasting is required. An example of such a receiver is, for example, Japanese Patent Laid-Open No. 61-2674.
Those described in Japanese Patent No. 69, Japanese Patent Application Laid-Open No. 3-3493, etc. are known.

FIG. 2 is a block diagram showing a conventional example of such a television receiver. This conventional example is an example of a receiver capable of receiving high-definition broadcasting by converting a received high-definition signal MUSE signal into an NTSC signal.

In FIG. 2, 101 is a terrestrial broadcasting television signal (hereinafter referred to as TV signal) receiving antenna, and 10 is a receiving antenna.
2 is a satellite broadcasting signal (hereinafter referred to as BS signal) receiving antenna, 103 is a video input terminal, 104 is a TV antenna signal input terminal, 105 is a BS antenna signal input terminal, 10
6 is a TV tuner, 107 is a TV signal detection circuit, 10
8 is a BS tuner, 109 is a BS signal detection circuit, 11
Reference numeral 0 is a TV signal processing circuit, and 111 is a BS signal processing circuit.

In addition, 112 is a MUSE-NTSC conversion circuit, 113 and 114 are signal switching circuits, and 115 is an ED (Extended Definition) TV.
A signal processing circuit, 116 is an aspect ratio conversion circuit, 117
Is a matrix circuit, 118 is a synchronous playback circuit, 119 is a display device having an aspect ratio of (16: 9), 120 is a recording output terminal, 122 is a power supply circuit, 123 is a control microcomputer, 124 is an AC power input terminal, and 125 is System power output terminal, 126 is system control output terminal, 1
27 is a MUSE-NTSC discriminating circuit.

In this conventional example, a high-definition signal (scanning line number 1125 / frame frequency (number of images per second) 30 Hz)
(Hereinafter, such a standard display is simply described as 1125/30) is a satellite broadcast receiving device (102, 105, 11).
When it is received in 1), it is converted into an NTSC signal (525/30) by the MUSE-NTSC conversion circuit 112.

Therefore, after conversion, normal TV signal processing can be performed, the input signal is selected by the signal switching circuit (113, 114), and the EDTV signal processing circuit 115
The signal is converted into a signal of (525/60), and in the aspect ratio conversion circuit 116, the high definition signal remains the aspect ratio (16: 9), and the TV signal is time-compressed.
(16: 9) It becomes possible to display on the display device 119.

[0009]

Currently, only one BS broadcast channel is allocated to high-definition broadcasts, and the broadcast time is short because it is a test broadcast. However, the decoder that decodes the baseband signal from the MUSE signal that transmits high-definition broadcasting is
It requires a huge amount of digital circuits, which leads to an increase in power consumption.

The conversion circuit for converting the MUSE signal into the NTSC signal is not so large in circuit scale as the above-mentioned decoder, but it still leads to an increase in power consumption. Further, since both the decoder and the MUSE-NTSC conversion circuit use a clock signal having a high frequency and a sharp rise and fall, the harmonic of the clock signal is T
A problem arises that interferes with the V tuner.

The problem is that the weaker the electric field strength of the radio wave received by the TV signal receiving antenna, the greater the interference. For this reason, the so-called EMI (Electro Magne)
tic Interference) measures are required.

The object of the present invention is to provide a MUSE decoder, MU.
Even a television receiver with a built-in SE-NTSC conversion circuit reduces unnecessary power consumption as much as possible,
Another object of the present invention is to provide a television receiver in which interference caused by harmonics of a clock signal to a TV tuner is reduced as much as possible.

[0013]

To achieve the above object, in the present invention, in a television receiver, as a first means, a MUSE-NTSC discriminating circuit for discriminating a received signal and a MUSE decoder or MUSE-NTS
A first relay circuit that turns on and off the power supply of the C conversion circuit is provided.

As a second means, MUSE-NTS
In the C conversion circuit, the first PLL circuit that creates and outputs a clock synchronized with the input high-definition signal and the NTS obtained by converting the input high-definition signal
A second P that creates and outputs a clock synchronized with the C signal
An LL circuit and a second relay circuit for turning on and off the clock signal output from the second PLL circuit are provided as needed.

[0015]

The MUSE-NTSC discriminating circuit discriminates whether the currently received signal is the MUSE signal or the BS signal. The first relay circuit, if the currently received signal is a BS signal according to the determination result of the determination times, the MUSE decoder or MUSE-NTS.
Power is saved by turning off the power supply of the C conversion circuit and turning it on only for the high-definition signal.

The first PLL circuit locks when the currently received signal is a MUSE signal to generate and outputs a clock, and does not lock when it is a BS signal, and thus generates and outputs a clock. I don't do that. The second relay circuit is turned on to lock the second PLL circuit when the first PLL circuit is locked, and is turned off to lock the second PLL circuit when not locked. By preventing the PLL circuit from functioning, interference due to harmonics of the clock signal is reduced.

Therefore, when the currently received signal is a BS signal, the MUSE decoder or MUSE-NT is used.
Power is not supplied to the SC conversion circuit. Also, MUSE-
In the NTSC conversion circuit, when the signal currently received is the BS signal, the clock signal is not output from the second PLL circuit. As described above, the power consumption and the interference due to the clock signal can be suppressed.

[0018]

EXAMPLES Examples of the present invention will be described below. Figure 1
1 is a block diagram showing a TV signal receiver as an embodiment of the present invention. In the figure, 101 is a TV signal receiving antenna, 102 is a BS signal receiving antenna, 103 is a video input terminal, 104 is a TV antenna signal input terminal, and 105.
Is a BS antenna signal input terminal, 106 is a TV tuner, 107 is a TV signal detection circuit, 108 is a BS tuner, 109 is a BS signal detection circuit, 110 is a TV signal processing circuit, and 111 is a BS signal processing circuit. ,.

In addition, 112 is a MUSE-NTSC conversion circuit, 113 and 114 are signal switching circuits, 115 is an EDTV signal processing circuit, 116 is an aspect ratio conversion circuit, 117 is a matrix circuit, 118 is a synchronous reproduction circuit, and 119 is an aspect ratio. Is a (16: 9) display device,
121 is a relay circuit, 120 is an output terminal for recording, and 122
Is a power supply circuit, 123 is a control microcomputer, 124 is an AC power supply input terminal, 125 is a system power supply output terminal, 126 is a system control output terminal, and 127 is MUSE-NT.
SC discrimination circuit.

The embodiment shown in FIG. 1 has a relay circuit 121 newly added to the conventional TV signal receiver shown in FIG. 2 and a control line from a MUSE-NTSC conversion circuit 127 for controlling the relay circuit 121. , Is added.

In FIG. 1, in this receiver, first, BS
The output signal of the signal processing circuit 111 is MUSE-NTSC.
It is input to the conversion circuit 112 and the MUSE-NTSC discrimination circuit 127. When the currently received signal is the MUSE signal, the MUSE-NTSC discriminating circuit 127 outputs the discrimination result to the system microcomputer 123 and the relay circuit 121.

The system microcomputer 123 controls the signal switching circuits 113 and 114 via a route not shown,
The output signal of the MUSE-NTSC conversion circuit 112 is changed to EDT.
The signal is output to the V signal processing unit 115 and is output to the display device 119. At this time, the MUSE-NTSC discrimination circuit 127
The relay circuit 121 is turned on, and power is supplied from the power supply circuit 122 to the MUSE-NTSC conversion circuit 112.

When the currently received signal is not the MUSE signal, the MUSE-NTSC discriminating circuit 127
The relay circuit 121 is turned off and power is not supplied to the MUSE-NTSC conversion circuit 112. Therefore, it is possible to reduce power consumption and suppress interference with the tuner due to the clock signal created and used in the MUSE-NTSC conversion circuit 112.

The above is also valid when the signal of the TV signal processing circuit 110 is displayed, and the recording terminal 12
Even if BS recording is performed using 0, if the output signal of the BS signal processing circuit 111 is not the MUSE signal,
By turning off the relay circuit 121 and not supplying power to the MUSE-NTSC conversion circuit 112, it is possible to reduce power consumption and suppress interference by the clock signal. The same effect can be obtained when the power supply around the display device 119 is turned off and the BS signal is recorded (so-called answering machine recording).

FIG. 3 shows a TV as another embodiment of the present invention.
It is a block diagram which shows a signal receiver. This embodiment is shown in FIG.
The MUSE-NTSC conversion circuit replaces the MUSE decoder 302 in the embodiment shown in FIG.

In FIG. 3, the MUSE decoder 302
Decodes the luminance signal and the color difference signals (Y, Pb, Pr) which are base band signals of the high definition signal from the MUSE signal, and outputs the high definition signal (1125/30) as
The image can be reproduced more faithfully and a high quality image can be obtained as compared with the case of reproducing by the MUSE-NTSC conversion circuit. However, the circuit scale is large, the power consumption is increased, and the interference by the clock signal created and used in the MUSE decoder is large.

The MUSE-NTSC discriminating circuit 127 turns on the relay circuit 301 only when the signal currently being received is a high-definition signal, and supplies power to the MUSE decoder 302 from the power supply circuit 122. If it is not a high-definition signal, the relay circuit 301 is turned off and the MUS
No power is supplied to the E decoder 302. Therefore, it is possible to suppress the increase in power consumption and the interference of the tuner by the clock signal created and used in the MUSE decoder 302.

FIG. 4 is a block diagram showing a TV signal receiver as still another embodiment according to the present invention. This embodiment is the same as the embodiment shown in FIG.
By incorporating the conversion circuit 127 and using the recording output terminal 120, a high-definition signal can be recorded by a normal VTR for recording an NTSC signal.

In the TV signal receiver shown in this embodiment of FIG. 4, when the currently received signal is a high-definition signal,
The output signal of the MUSE decoder 302 is displayed on the display device 304, and a high quality image can be obtained. Furthermore, MU
Since the output signal from the SE-NTSC conversion circuit 127 is output from the recording output terminal 120, a normal VT
There is a merit that a high-definition signal can be recorded in R (that is, a VTR for recording NTSC signals).

However, since the MUSE-NTSC conversion circuit is additionally built in, the circuit scale further increases, and the interference by the clock signal also increases due to the addition of the MUSE-NTSC conversion circuit. Therefore, in this embodiment, in addition to the MUSE-NTSC discriminating circuit 127, the MUSE decoder 302 and MUSE-NTSC are provided.
The relay circuits 301 and 121 are provided in the conversion circuit 127, respectively, and both the relay circuits 301 and 121 are turned off when the currently received signal is not the MUSE signal.

When the currently received signal is the MUSE signal, the relay circuits 121 and 301 are turned on. When recording an answering machine, turn off the relay circuit 301,
Power is not supplied to the MUSE decoder 302, and only the MUSE-NTSC conversion circuit 127 is supplied with power. Therefore, it is possible to suppress an increase in power consumption more than necessary and suppress the interference due to the clock signal.

FIG. 5 shows the MUSE-NTSC in FIG.
3 is a block diagram showing a specific example of a conversion circuit 127. FIG. Figure 5
In the figure, 501 is an input terminal for inputting an output signal of the BS signal processing circuit 111, 502 is an A / D conversion circuit, and 50
3 is a high-definition signal processing circuit, 504 is a speed conversion circuit, 505 is an NTSC signal processing circuit, 506 is a D / A conversion circuit, 507 is an NTSC encoder, and 508 is NTS.
C signal output terminal.

Reference numeral 509 denotes a high-definition PLL circuit (a circuit that locks to an input high-definition signal and creates and supplies a required clock) 510 indicates a relay circuit 511.
Is an NTSC PLL circuit (N from the speed conversion circuit 504
Lock to the TSC signal to create the required clock and NT
Circuit for supplying to the SC processing circuit 505).

The output signal from the BS signal processing circuit 111 is input from the input terminal 501 and the A / D conversion circuit 502.
At, the analog signal is converted to a digital signal. The signal converted into the digital signal is input to the high-definition processing circuit 503. If the signal currently being received is a MUSE signal, a high-definition PLL circuit 5
Reference numeral 09 supplies a clock signal to the high-definition signal processing circuit 503 in synchronization with the MUSE signal.

The high-definition signal processing circuit 503 performs de-emphasis, synchronization detection and the like. Speed conversion circuit 50
In the case of 4, the required clock is received from the high-definition PLL circuit 509, and the data from the high-definition system to the NTSC system is received.
Performs taret conversion and aspect ratio conversion. The NTSC signal processing circuit 505 operates by the clock from the NTSC PLL circuit 511, scan line conversion, and luminance signal Y feed.
Field interpolation processing and time extension of color difference signals RY and BY.
Perform field interpolation.

The output of the NTSC signal processing circuit 505 is D
The / A conversion circuit 506 converts the digital signal into an analog signal and inputs it to the NTSC encoder 507. The NTSC encoder 507 modulates a luminance signal (Y) and color difference signals (RY, BY) into an NTSC signal, and outputs the NTSC signal from an NTSC signal output terminal 508.

The high-vision PLL circuit 509 synchronizes (LOCK) when the signal input from the input terminal 501 is a MUSE signal, and does not synchronize (UNLOCK) when the signal is an NTSC signal. The discrimination signal is input to the relay circuit 510, and when synchronized, the relay circuit 510
Is turned on, and the NTSC signal processing circuit 505 is set to P for NTSC.
A clock signal is supplied from the LL circuit 511. When they are not synchronized, the relay circuit 510 is turned off and the NTSC PLL circuit 511 does not supply the clock signal.

Therefore, the currently received signal is MUSE.
If it is not a signal, the clock signal is not supplied to the NTSC signal processing circuit 505, so that the interference due to this clock signal can be suppressed. In addition, when the signal currently being received is not the MUSE signal, in other words,
This means that the signal currently being received is an NTSC signal, and the MUSE-NTSC conversion circuit 127 does not need to operate originally, so the NTSC signal processing circuit 505.
It is not necessary to supply a clock signal to

Even in this case, unless the high-definition PLL circuit 509 operates and supplies the required clock signal to the high-definition processing circuit 503 and the speed conversion circuit 504, the next-time MUSE signal is received and it is troublesome. Therefore, the high-definition PLL circuit 509 cannot stop its function.

In the present embodiment, turning on and off of the clock signal is realized by inserting a relay circuit in the clock signal line, but the same effect can be obtained by inserting it in the power source of the PLL circuit.

[0041]

According to the present invention, the signal currently being received is
A discriminating circuit for discriminating between the MUSE signal and the BS signal, and M
A relay circuit for turning on / off the power of the USE decoder and the MUSE-NTSC conversion circuit is provided, and when the signal currently being received is not the MUSE signal, the relay circuit is turned off.
Then, no power is supplied to the MUSE decoder and the MUSE-NTSC conversion circuit. Therefore, it is possible to suppress an increase in power consumption and suppress tuner interference due to the clock signal.

Further, in the MUSE-NTSC conversion circuit, the first PLL circuit synchronized with the high-definition signal, the second PLL circuit synchronized with the NTSC signal, and the clock signal output from the second PLL circuit are switched on and off. A relay circuit is provided to ensure that the signal currently being received is M
When it is not the USE signal, the first PLL circuit is not synchronized, and when the first PLL circuit is not synchronized, the relay circuit is turned off and the clock signal from the second PLL circuit is output. Not be supplied. Therefore, the interference of the tuner with the clock signal can be suppressed to that extent.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a conventional television signal receiver.

FIG. 3 is a block diagram showing another embodiment of the present invention.

FIG. 4 is a block diagram showing still another embodiment of the present invention.

FIG. 5 is a block diagram showing a specific example of a MUSE-NTSC conversion circuit.

[Explanation of symbols]

101 ... TV signal receiving antenna, 102 ... BS signal receiving antenna, 103 ... Video input terminal, 104 ... TV antenna signal input terminal, 105 ... BS antenna signal input terminal, 106 ... TV tuner, 107 ... TV signal detection circuit , 108 ... BS tuner, 109 ... BS signal detection circuit, 110 ... TV signal processing circuit, 111 ... BS signal processing circuit, 112 ... MUSE-NTSC conversion circuit, 113,
114 ... Signal switching circuit, 115 ... EDTV signal processing circuit, 116 ... Aspect ratio conversion circuit, 117 ... Matrix circuit, 118 ... Synchronous reproduction circuit, 119 ... Aspect ratio (16: 9) display device, 121 ... Relay circuit, 1
20 ... Recording output terminal, 122 ... Power supply circuit, 123 ... Control microcomputer, 124 ... AC power supply input terminal, 125 ... System power supply output terminal, 126 ... System control output terminal, 127 ... MUSE-NTSC discriminating circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Akira Ueno 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Stock company Hitachi Image Information Systems (72) Sadao Kubota 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Ceremony Company Hitachi Ltd. AV equipment division

Claims (5)

[Claims] 1. A terrestrial broadcasting television signal receiving device, a satellite broadcasting receiving device, a screen display device, and whether a signal received by the receiving device is a high-definition signal or a terrestrial broadcasting television signal. Judging means for judging and a signal format conversion for converting a signal format depending on the transmission system thereof into a signal format displayable on the screen display apparatus when the signal received by the satellite broadcast receiving apparatus is a high-definition signal And a relay circuit for disconnecting the power supply device for the signal format conversion means from the signal format conversion means when the determination result by the determination means is a terrestrial broadcast television signal. A television signal receiver characterized by being provided. 2. The television signal receiver according to claim 1, wherein the signal format conversion means is a means for converting a high-definition signal into a baseband signal, or a high-definition signal is converted into an NTSC television signal. A television signal receiver characterized in that it is a means for performing. 3. A terrestrial broadcasting television signal receiving device, a satellite broadcasting receiving device, a screen display device, and whether the signal received by the receiving device is a high-definition signal or a terrestrial broadcasting television signal. A discriminating means for discriminating, and when the signal received by the satellite broadcast receiving device is a high-definition signal, a MUSE decoder for converting the signal format depending on the transmission system thereof into a signal format displayable on the screen display device. , When the signal received by the satellite broadcast receiving device is a high-definition signal, it is converted from the signal format depending on the transmission system to NT.
MUSE-NTS to convert to SC system television signal
In a television signal receiver including a C conversion circuit and an output terminal for outputting the output of the MUSE-NTSC conversion circuit for recording, when the determination result by the determination means is a terrestrial broadcast television signal. , The power supply device for the MUSE decoder is disconnected from the MUSE decoder, and when the determination result is a high-definition signal, the MUSE-NTSC
A television signal receiver comprising a relay circuit for disconnecting a power supply device for the conversion circuit from the MUSE-NTSC conversion circuit. 4. A terrestrial broadcast television signal receiving device, a satellite broadcast receiving device, a screen display device, and whether the signal received by the receiving device is a high-definition signal or a terrestrial broadcast television signal. A discriminating means for discriminating, a MUSE-NTSC converting device for converting a signal received by the satellite broadcast receiving device, when the signal is a high-definition signal, into an NTSC television signal from a signal format depending on its transmission system, MUSE-NTS
An output terminal for outputting the output of the C conversion device for recording,
In the television signal receiver provided with, the MUSE-NTSC converter converts the input high-definition signal into an NTSC signal converted from the first PLL circuit that creates and outputs a clock synchronized with the input high-definition signal. A second PLL circuit that creates and outputs a synchronized clock; and, when the first PLL circuit is creating a clock that is synchronized with the input high-definition signal, synchronizes with the NTSC signal from the second PLL circuit. When the first PLL circuit stops functioning because the input signal is not the HDTV signal but the NTSC signal, the clock synchronized with the NTSC signal from the second PLL circuit is continued. And a relay circuit for stopping the output of the television signal receiver. 5. The television signal receiver according to claim 1, 2, 3 or 4, wherein the screen display device has a horizontally long screen with an aspect ratio of (9:16) or (3: 5). A television signal receiver comprising the display device of.