JPH0684792A - Manufacture of thin film - Google Patents
Manufacture of thin filmInfo
- Publication number
- JPH0684792A JPH0684792A JP23123092A JP23123092A JPH0684792A JP H0684792 A JPH0684792 A JP H0684792A JP 23123092 A JP23123092 A JP 23123092A JP 23123092 A JP23123092 A JP 23123092A JP H0684792 A JPH0684792 A JP H0684792A
- Authority
- JP
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- Prior art keywords
- substrate
- thin film
- gaas
- temperature gradient
- present
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- Crystals, And After-Treatments Of Crystals (AREA)
- Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
- Recrystallisation Techniques (AREA)
Abstract
(57)【要約】
【目的】 Si〔100〕ジャスト基板上に良質のGa
As薄膜等を、低基板処理温度で成膜できる方法を提供
する。
【構成】 Si〔100〕ジャスト基板に、例えば中央
部が 650℃で周縁部が 560℃となるような温度勾配を強
制的に与えた状態で、その基板表面上にGaAs薄膜等
を成長させる。
(57) [Summary] [Purpose] Good quality Ga on Si [100] just substrate.
Provided is a method capable of forming an As thin film or the like at a low substrate processing temperature. [Structure] A GaAs thin film or the like is grown on the surface of a Si [100] just substrate while forcibly giving a temperature gradient such that the central portion is 650 ° C. and the peripheral portion is 560 ° C.
Description
【0001】[0001]
【産業上の利用分野】本発明は、Si基板上にGaAs
等の化合物半導体薄膜を形成する方法に関する。The present invention relates to GaAs on a Si substrate.
Etc. to a method for forming a compound semiconductor thin film.
【0002】[0002]
【従来の技術】例えばSi〔100〕基板にGaAs薄
膜を堆積させる場合、オフ基板(〔011〕方向に2〜
4°傾けたもの)を1000℃程度に一度加熱した後、まず
は、 200〜 400℃の低基板温度で数10Åの膜厚のGaA
sバッファ層を成長し、次いで、 600〜 750℃の高基板
温度で 2〜 3μmの膜厚のGaAs層を成長するといっ
た二段階成長法を採用するのが一般的である。2. Description of the Related Art For example, when a GaAs thin film is deposited on a Si [100] substrate, the off-substrate (2 to 1 in the [011] direction is
(Inclined by 4 °) is heated once to about 1000 ° C, and then, at first, at a low substrate temperature of 200 to 400 ° C, GaA with a film thickness of several tens of liters
It is common to employ a two-step growth method in which an s buffer layer is grown, and then a GaAs layer having a thickness of 2 to 3 μm is grown at a high substrate temperature of 600 to 750 ° C.
【0003】このようにオフ基板を用いる要因の一つ
は、ステップの方向を強制的に設けることにあり、ま
た、成長前の加熱は、ステップの2原子分の高さにする
役目があると言われている。そして、GaAs薄膜を形
成する際に、オフ基板の使用および成長前の高温加熱を
行わないと、単一ドメインにならず、良質の結晶が得ら
れない。つまり単一ドメインでない場合、電子移動度等
の結晶性を示すパラメータは悪くなる。One of the factors for using the off-substrate in this way is to forcibly set the direction of the step, and the heating before the growth has a role of making the height of the step equal to two atoms. It is said. Then, when forming the GaAs thin film, unless an off-substrate is used and high-temperature heating before growth is not performed, a single domain is not formed and a good quality crystal cannot be obtained. In other words, when the domain is not a single domain, parameters such as electron mobility showing crystallinity are deteriorated.
【0004】[0004]
【発明が解決しようとする課題】上記したように、Ga
As,GaP等の化合物半導体を、Si〔100〕基板
上に成長させる場合には、オフ基板と成長前の高温加熱
は必須の用件となるわけであるが、その用件が、将来的
に、同一のSi基板上に、SiデバイスとGaAsデバ
イスとを複合させたデバイスを作製する上で、大きな障
害となる。As described above, Ga
When growing a compound semiconductor such as As or GaP on a Si [100] substrate, off-substrate and high temperature heating before growth are indispensable requirements. However, this is a major obstacle in manufacturing a device in which a Si device and a GaAs device are combined on the same Si substrate.
【0005】すなわち、Siデバイスは、通常、傾きの
ないSi〔100〕ジャスト基板に形成されること、ま
た、複合デバイスは、Siデバイスの加工が完了した後
に、GaAsデバイスの作製を行ういった手順で行われ
るため、Siデバイスの作製後に、GaAs膜成長前の
高温加熱を行うことは、そのSiデバイスの破壊をまね
くので実質的に不可能である。That is, the Si device is usually formed on a Si [100] just substrate having no inclination, and the composite device is a procedure for producing a GaAs device after the processing of the Si device is completed. Therefore, it is practically impossible to perform high temperature heating before the growth of the GaAs film after the Si device is manufactured, because it causes the destruction of the Si device.
【0006】本発明はこのような事情に鑑みてなされた
もので、その目的とするところは、Si〔100〕ジャ
スト基板上に良質のGaAs薄膜等を、低基板処理温度
で成膜できる方法を提供することにある。The present invention has been made in view of the above circumstances. An object of the present invention is to provide a method for forming a good quality GaAs thin film or the like on a Si [100] just substrate at a low substrate processing temperature. To provide.
【0007】[0007]
【課題を解決するための手段】上記の目的を達成するた
めに、本発明方法では、Si〔100〕ジャスト基板
に、その薄膜形成面と平行な方向に沿って、所定の温度
勾配を強制的に与えて、この状態で、その基板表面上に
化合物半導体薄膜を成長させる。To achieve the above object, in the method of the present invention, a predetermined temperature gradient is forced on a Si [100] just substrate along a direction parallel to its thin film forming surface. In this state, a compound semiconductor thin film is grown on the surface of the substrate.
【0008】[0008]
【作用】Si〔100〕ジャスト基板に、例えば膜形成
面の中央部が 650℃で、周縁部がそれよりも 100℃程度
だけ低くなるような温度勾配を与えた状態でGaAsの
成膜を行ったところ、膜成長前の基板高温加熱を施さな
くても、単一ドメインのGaAs薄膜を得ることができ
た。GaAs is formed on a Si [100] just substrate with a temperature gradient such that the central portion of the film forming surface is 650 ° C and the peripheral portion is lower than that by about 100 ° C. As a result, a single domain GaAs thin film could be obtained without heating the substrate at high temperature before film growth.
【0009】[0009]
【実施例】本発明方法の実施例を、以下、図面に基づい
て説明する。図2は本発明方法を実施に使用する薄膜製
造装置の概略構成図である。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the method of the present invention will be described below with reference to the drawings. FIG. 2 is a schematic configuration diagram of a thin film manufacturing apparatus used for carrying out the method of the present invention.
【0010】真空チャンバ1内に二つの蒸発源、Ga蒸
発源2およびAs蒸発源3が配設されている。この各蒸
発源2,3は、それぞれ内部に蒸着材料GaまたはAs
を収容するるつぼ21,31と、加熱用フィラメント2
2,32等を備え、その加熱用フィラメント22,32
による加熱によって、各るつぼ内部の蒸着材料を蒸気化
するよう構成されている。そして、蒸気化した蒸着材料
は、各るつぼの噴射孔21a,31aから吹き出してク
ラスタとなって真空チャンバ1内を進行し、そのクラス
タはともに同一の基板Sに到達する。In the vacuum chamber 1, two evaporation sources, a Ga evaporation source 2 and an As evaporation source 3, are arranged. Each of the evaporation sources 2 and 3 has a vapor deposition material Ga or As inside.
Crucibles 21 and 31 for accommodating the heating element and the heating filament 2
2, 32, etc., and heating filaments 22, 32
The evaporation material inside each crucible is vaporized by heating by the. Then, the vaporized vapor deposition material blows out from the injection holes 21a and 31a of each crucible to form a cluster, which advances in the vacuum chamber 1 and both clusters reach the same substrate S.
【0011】また、各蒸発源2,3と基板S間のクラス
タ進行路上には、それぞれイオン化部4,5および加速
電極6,7が順次配設されている。さらに、各加速電極
6,7と基板Sとの間には、それぞれシャッタ8,9が
配設されており、この各シャッタ8,9の操作により各
蒸発源2,3からのクラスタの基板Sへの進行を選択で
きるようになっている。On the cluster advancing path between the evaporation sources 2 and 3 and the substrate S, ionization units 4 and 5 and acceleration electrodes 6 and 7 are sequentially arranged. Further, shutters 8 and 9 are provided between the acceleration electrodes 6 and 7 and the substrate S, respectively. By operating the shutters 8 and 9, the substrates S of the clusters from the evaporation sources 2 and 3 are disposed. You can choose to proceed to.
【0012】なお、基板Sは、加熱器および熱電対等を
備えたホルダ10によって、真空チャンバ1内の所定位
置に保持されるとともに、この基板Sには、後述する温
度勾配が与えられる。The substrate S is held at a predetermined position in the vacuum chamber 1 by a holder 10 provided with a heater and a thermocouple, and the substrate S is given a temperature gradient described later.
【0013】さて、以上説明した装置を使用して、Si
基板上にGaAs薄膜を形成する場合の手順を、以下に
説明する。まず、4インチのSi〔100〕ジャスト基
板Sを、真空チャンバ1内のホルダ10に装着し、この
基板Sに、膜形成面の中央部が 650℃で周縁部が 560℃
となるような温度勾配を強制的に与えて、この状態で、
蒸発源3から噴出するAsクラスタビームを、その一部
をイオン化して基板S表面に照射して、基板Sのクリー
ニングを行う。Now, using the apparatus described above, Si
The procedure for forming a GaAs thin film on a substrate will be described below. First, a 4-inch Si [100] just substrate S is mounted on the holder 10 in the vacuum chamber 1, and the center of the film forming surface is 650 ° C. and the peripheral portion is 560 ° C. on the substrate S.
By forcibly giving a temperature gradient such that
A portion of the As cluster beam ejected from the evaporation source 3 is ionized and irradiated on the surface of the substrate S to clean the substrate S.
【0014】この後、基板S表面に、Gaイオン化クラ
スタビームとAsイオン化クラスタビームとをそれぞれ
電圧1.3KV 程度で加速して照射し、その基板S表面上に
バッファ層を積層する。このバッファ層の膜厚は 1.5μ
m程度とする。Thereafter, the surface of the substrate S is irradiated with a Ga ionized cluster beam and an As ionized cluster beam while accelerating at a voltage of about 1.3 KV, and a buffer layer is laminated on the surface of the substrate S. The thickness of this buffer layer is 1.5μ
It is about m.
【0015】そして最後に、イオン化・加速を止めて、
中性のGaクラスタビームとAsクラスタビームとを基
板S表面に照射して、先に積層したバッファ層上にGa
As薄膜を成長させる。この薄膜の膜厚も 1.5μm程度
とする。Finally, stop ionization and acceleration,
The surface of the substrate S is irradiated with a neutral Ga cluster beam and an As cluster beam to form Ga on the previously stacked buffer layer.
Grow an As thin film. The thickness of this thin film is also about 1.5 μm.
【0016】以上の手順により得られたGaAs薄膜の
表面モフォロジ(SEM観察)を図1(a) に示す。な
お、この図には、基板Sの各位置の表面モフォロジを部
分的に示すとともに、基板Sの温度分布も併記してい
る。The surface morphology (SEM observation) of the GaAs thin film obtained by the above procedure is shown in FIG. 1 (a). In this figure, the surface morphology of each position of the substrate S is partially shown, and the temperature distribution of the substrate S is also shown.
【0017】この表面モフォロジから、基板Sの〔00
1〕方向と、これに直交する方向に近傍領域は、単一ド
メインとはなっておらず結晶性も悪いものの、その他の
領域は単一ドメインとなっていることが判明した(同図
(b) を参照)。しかも、単一ドメインの転位密度は2×
106 cm-2と少なく、結晶性も良好であることが確認で
きた。From this surface morphology, the [00
It was found that the 1] direction and the neighboring region in the direction orthogonal thereto are not single domains and have poor crystallinity, but other regions are single domains (Fig.
(See (b)). Moreover, the dislocation density of a single domain is 2 ×
It was confirmed to be as small as 10 6 cm -2 and the crystallinity was good.
【0018】ここで、Si〔100〕ジャスト基板であ
っても、上記したような温度勾配を与えるだけで、どの
ようなメカニズムにより、単一ドメインで結晶性の良い
GaAs薄膜を得ることができるのかは不明ではある
が、本発明方法により、非常に簡単な手法によって、低
基板処理温度(650℃) で良質のGaAs/Siを作製で
きるといった見通しがつかめた。Here, even with a Si [100] just substrate, by what kind of mechanism can a GaAs thin film having a single domain and good crystallinity be obtained only by applying the above temperature gradient? Although it is not clear, the prospect of the fact that the method of the present invention makes it possible to produce good quality GaAs / Si at a low substrate processing temperature (650 ° C.) by a very simple method.
【0019】なお、基板に与える温度勾配は、2インチ
当たりで90〜100 ℃程度であれば、基板中央部の最高温
度に多少の相違があっても、先と同等な結果を得ること
ができ、また、基板のサイズが異なる場合にも、上記し
た程度の温度勾配を与えることにより、同等な結果を得
ることも可能であると推察される。さらに、基板に先と
は逆の温度勾配、つまり基板周縁部から中央部に向けて
温度が低くなるような温度勾配を与えて成膜を行った場
合にも、同等な結果が得られる可能性も十分にある。If the temperature gradient applied to the substrate is about 90 to 100 ° C. per 2 inches, the same result as above can be obtained even if there is a slight difference in the maximum temperature at the center of the substrate. Moreover, even when the sizes of the substrates are different, it is presumed that the same result can be obtained by applying the temperature gradient of the above degree. Furthermore, the same result may be obtained when the film is formed by applying a temperature gradient opposite to the above to the substrate, that is, a temperature gradient that decreases from the peripheral edge of the substrate toward the center. Is enough.
【0020】以上の実施例では、成膜法としてイオン・
クラスタ・ビーム法を採用しているが、このほか、例え
ばMBE法などの他の成膜法を採用しても本発明方法の
実施は可能である。In the above embodiments, the ion deposition method is used as a film forming method.
Although the cluster beam method is adopted, the method of the present invention can be implemented by using other film forming methods such as the MBE method.
【0021】また、本発明方法は、GaAs薄膜のほ
か、GaP等の他の化合物半導体の薄膜の成膜にも適用
し得る。In addition to the GaAs thin film, the method of the present invention can be applied to the film formation of other compound semiconductor thin films such as GaP.
【0022】[0022]
【発明の効果】以上説明したように、本発明方法を採用
することによって、Siデバイスが破壊しない程度の低
温基板処理温度で、しかもSi〔100〕ジャスト基板
に良質のGaAs薄膜を得ることが可能となり、これに
よって、将来的に、例えばGaAs/Siを用いた複合
デバイスを構築するにあたり、その実現の可能性が大い
に高まった。As described above, by adopting the method of the present invention, it is possible to obtain a good quality GaAs thin film on a Si [100] just substrate at such a low substrate processing temperature that the Si device is not destroyed. Thus, in the future, when constructing a composite device using, for example, GaAs / Si, the possibility of its realization is greatly increased.
【図1】(a) は本発明方法によって得られたGaAs薄
膜の表面モフォロジ(SEM観察)を部分的に示す図
で、(b) はそのGaAs薄膜の良否の考察結果の説明図FIG. 1 (a) is a diagram partially showing the surface morphology (SEM observation) of a GaAs thin film obtained by the method of the present invention, and FIG. 1 (b) is an explanatory diagram of the result of consideration of the quality of the GaAs thin film.
【図2】本発明方法の実施に使用する装置の概略構成図FIG. 2 is a schematic configuration diagram of an apparatus used for carrying out the method of the present invention.
1・・・・真空チャンバ 2・・・・Ga蒸発源 3・・・・As蒸発源 4,5・・・・イオン化部 6,7・・・・加速電極 S・・・・Si〔100〕ジャスト基板 1 ... Vacuum chamber 2 ... Ga evaporation source 3 ... As evaporation source 4,5 ... Ionization part 6,7 ... Accelerating electrode S ... Si [100] Just board
─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───
【手続補正書】[Procedure amendment]
【提出日】平成5年3月15日[Submission date] March 15, 1993
【手続補正1】[Procedure Amendment 1]
【補正対象書類名】明細書[Document name to be amended] Statement
【補正対象項目名】図面の簡単な説明[Name of item to be corrected] Brief description of the drawing
【補正方法】変更[Correction method] Change
【補正内容】[Correction content]
【図面の簡単な説明】[Brief description of drawings]
【図1】(a) は本発明方法によって得られたGaAs薄
膜の表面結晶構造(モフォロジ)を部分的に示すSEM
写真、(b) はそのGaAs薄膜の良否の考察結果の説明
図FIG. 1 (a) is a SEM partially showing the surface crystal structure (morphology) of a GaAs thin film obtained by the method of the present invention.
Photo and (b) are illustrations of the results of consideration of the quality of the GaAs thin film.
【図2】本発明方法の実施に使用する装置の概略構成図FIG. 2 is a schematic configuration diagram of an apparatus used for carrying out the method of the present invention.
Claims (1)
形成面と平行な方向に沿って、所定の温度勾配を強制的
に与え、この状態で、上記基板表面上に化合物半導体薄
膜を成長させることを特徴とする薄膜製造方法。1. A Si [100] just substrate is forcibly given a predetermined temperature gradient along a direction parallel to its film forming surface, and in this state, a compound semiconductor thin film is grown on the substrate surface. A thin film manufacturing method characterized by the above.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23123092A JP3163773B2 (en) | 1992-08-31 | 1992-08-31 | Thin film manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP23123092A JP3163773B2 (en) | 1992-08-31 | 1992-08-31 | Thin film manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH0684792A true JPH0684792A (en) | 1994-03-25 |
| JP3163773B2 JP3163773B2 (en) | 2001-05-08 |
Family
ID=16920363
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP23123092A Expired - Fee Related JP3163773B2 (en) | 1992-08-31 | 1992-08-31 | Thin film manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3163773B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6617916B1 (en) | 2000-03-27 | 2003-09-09 | Oki Electric Industry Co., Ltd. | Semiconductor integrated circuit |
-
1992
- 1992-08-31 JP JP23123092A patent/JP3163773B2/en not_active Expired - Fee Related
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6617916B1 (en) | 2000-03-27 | 2003-09-09 | Oki Electric Industry Co., Ltd. | Semiconductor integrated circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3163773B2 (en) | 2001-05-08 |
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