JPH0697828A - Overflow detecting circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] When a low-cut filter is used to remove an offset component from a digital data signal, the signal waveform is changed by that amount, and it is possible to prevent overflow detection from being impossible accurately depending on the form of the signal. . An input data signal of a low cut filter 2 is monitored by an overflow detection circuit 4a, and an output data signal is monitored by an overflow detection circuit 4b. The OR detection circuit 4c logically ORs the respective detection outputs of the overflow detection circuits 4a and 4b to obtain an overflow detection signal, and the LED 5
Turn on b.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an overflow detection circuit, and more particularly to a low cut filter (Low Cut Filter).
ilter) and calibration (Calibra
signal detection circuit including a digital signal circuit including an overflow detection circuit.

[0002]

2. Description of the Related Art At present, in AV equipment (audiovisual equipment) and the like, various signal processing is actively performed by converting analog input signals such as audio signals and video signals into digital data by an A / D converter. It is being appreciated.

FIG. 3 is a block diagram showing a configuration example of a conventional digital signal conversion circuit, which is for converting an analog input signal into a digital signal and outputting it.

In FIG. 3, an analog input signal is input from the input terminal 11 and amplified by the signal amplifier 12. The amplified analog signal is level-adjusted by the level setting volume 13 and is input to the A / D converter 1. The A / D converter 1 converts the input analog signal into digital data. The A / D converted digital data is supplied to the low cut filter 2 as an input data signal (IN). The low-cut filter 2 is for blocking passage of low-frequency components,
Output data signal (OUT) of this low-cut filter 2
Becomes digital data which is subjected to digital signal processing. The output data signal (OUT) is sent to the overflow detection circuit 3 to detect overflow.

That is, in this example, the input signal is digitized by the A / D converter 1, and further, the output data signal (OUT) is obtained through the low cut filter 2.
The low-cut filter 2 is used to remove a DC component (hereinafter, also simply referred to as “offset component”) such as an offset voltage component or temperature drift in the digitized data. This is because these offsets cause noise when performing digital signal processing.

Further, the digitized output data signal (OUT) needs to be within an effective data range (a numerical range that can be handled by a digital signal processing circuit). Therefore, the overflow detection circuit 3 monitors the output data signal (OUT). When the output data signal (OUT) has overflowed, the overflow detection signal (FLAG) is output from the overflow detection circuit 3. Therefore, until the signal (FLAG) is no longer generated, The input level of the / D converter 1 is adjusted.

FIG. 4 is a block diagram showing another example of the configuration of the conventional digital signal conversion circuit, which is for converting an analog input signal into a digital signal and outputting the same as in the conventional example of FIG. is there. It should be noted that the portions corresponding to those of the conventional example in FIG. 3 are denoted by the same reference numerals, and the description thereof will be appropriately omitted.

In the conventional example shown in FIG. 4, a calibration circuit 6 is used instead of the low-cut filter 2 used in the conventional example shown in FIG. 3, and other configurations are the same as those in the conventional example shown in FIG. is there.

In the conventional example of FIG. 4, the data digitized by the A / D converter 1 is sent to the calibration circuit 6 as an input data signal (IN). This input data signal (IN) becomes one input data of the adder 6b in the calibration circuit 6 and is also sent to the calibration register 6a. Offset compensation data is set in the calibration register 6a, and the compensation data becomes negative (-) data and becomes the other input data of the adder 6b. Therefore, the output data signal (OUT) of the adder 6b becomes data in which the offset amount is compensated. Also, the adder 6b
The data signal output (OUT) is sent to the overflow detection circuit 3 to detect the overflow.

The example of FIG. 4 is different from the example of FIG. 3 only in that the low-cut filter 2 is replaced with a calibration circuit 6, and an overflow detection is performed on an output data signal (OUT). Is the same as the example of FIG.

[0011]

DISCLOSURE OF THE INVENTION Problems to be Solved by the Invention
In both of the conventional examples of FIG. 4, an offset is removed from an A / D converted data signal (IN) to obtain an output data signal (OUT), and an overflow is detected for this output data signal (OUT). It is carried out.

However, in the case of such a configuration, depending on the form of the input data signal (IN), overflow may not be normally detected. Less than,
The case of the conventional example of FIG. 3 will be described, but the situation is the same in the case of the conventional example of FIG.

FIG. 5 is a diagram showing a signal example for explaining the problems of the conventional example of FIG. In FIG.
(A) is an input data signal (I) to the low-cut filter 2.
N), and FIG. 5B shows the output data signal (OUT) of the low-cut filter 2, and each waveform is expressed as an analog waveform signal for easy understanding. However, it is actually a digitally encoded data signal. In addition, symbol in the figure + FU
LL represents a 100% level (maximum value) on the positive side that is effective as a digital signal, and -FULL represents a 100% level (minimum value) on the negative side, which is also the detection level of the overflow detection circuit 3. Equivalent to.

That is, the input data signal 5 of FIG.
1 includes a large amount of offset (DC), and overflow occurs in the portion of the broken line with respect to the low-cut filter 2. When the signal 51 passes through the low-cut filter 2, the offset component (DC component) is removed and
The data in the overflow portion is lost, resulting in the waveform 52 shown in FIG. In this case, since the overflow detection circuit 3 monitors the signal 52, it cannot detect the overflow.

The problem in the case of the input signal shown in FIG. 5 can be avoided by using the input data signal (IN) of the low-cut filter 2 as the input signal of the overflow detection circuit 3 as shown in FIG. it can. However, this time, a problem occurs in the case of the waveform shown in FIG.

That is, FIG. 7 is a diagram showing a signal example for explaining the problems of the conventional example of FIG.
FULL, -FULL, etc. are the same as in the case of FIG.

In FIG. 7, the input data signal 71 of FIG. 7A contains a large amount of offset (DC), but no overflow has occurred. However, when the waveform 71 passes through the low-cut filter 2, the offset component (DC component) is removed, resulting in the signal 72 shown in FIG. 7B, and overflow occurs at the portion indicated by the broken line. In this case, the overflow detection circuit 3 (FIG. 6) is monitoring the signal 71 and therefore cannot detect the overflow.

As described above, in the overflow detection circuit of the conventional example, the input data signal (IN) or the output data signal (OUT) from which the offset component is removed.
Since the overflow is detected, the overflow may not be detected depending on the form of the input data signal (IN), which makes it difficult to optimally adjust the input level.

The present invention has been made in view of the above problems, and in a digital signal processing circuit having a low-cut filter and a calibration circuit, an overflow detection circuit capable of accurately detecting an overflow regardless of the form of an input signal is provided. The purpose is to provide.

[0020]

The overflow detection circuit according to claim 1 is a digital signal processing circuit having a low-cut filter 2 as first overflow detection means for detecting an overflow of an input data signal to the low-cut filter 2. Overflow detection circuit 4a, an overflow detection circuit 4b as second overflow detection means for detecting an overflow of the output data signal of the low-cut filter 2, and overflow detection circuits 4a and 4b.
And an OR circuit 4c as a generation unit that generates an overflow detection signal when an overflow is detected.

The overflow detection circuit according to claim 2 is
In the digital signal processing circuit having the calibration circuit 6 for compensating for the offset of the signal, the overflow detection circuit 4a as the first detection means for detecting the overflow of the input data signal of the calibration circuit 6.
And an overflow detection circuit 4b as a second detection means for detecting an overflow of the output data signal of the calibration circuit 6, and an overflow detection signal is generated when an overflow is detected by at least one of the overflow detection circuits 4a and 4b. And an OR circuit 4c as a generation unit for

The overflow detection circuit according to claim 3 is
The overflow detection circuit according to claim 1 or 2, further comprising an overflow display circuit 5 as display means for displaying the overflow when it is detected.

[0023]

In the overflow detection circuit having the structure of claim 1, the input data signal to the low cut filter 2 is monitored by the overflow detection circuit 4a, and the output data signal of the low cut filter 2 is monitored by the overflow detection circuit 4b. , These two overflow detection circuits 4
The OR outputs of the detection outputs of a and 4b are ORed by the OR circuit 4c.

Therefore, the overflow detection circuits 4a, 4b
When either one or both of them detects an overflow, the OR circuit 4c outputs an overflow detection signal. That is, since the overflow detection is performed on both the input data signal and the output data signal of the low cut filter 2, the overflow can be accurately detected even if the offset is removed.

In the overflow detection circuit of the second aspect, the input data signal of the calibration circuit 6 (original signal before being compensated for the offset) is monitored by the overflow detection circuit 4a, and the calibration circuit 6 operates. The output data signal (the signal after being compensated for the offset) is monitored by the overflow detection circuit 4b, and the detection outputs of these two overflow detection circuits 4a and 4b are ORed by the OR circuit 4c.

Therefore, the overflow detection circuits 4a, 4b
When either one or both of them detects an overflow, the OR circuit 4c outputs an overflow detection signal. That is, since the overflow detection is performed on both the input data signal and the output data signal of the calibration circuit 6, the overflow can be reliably detected even if the offset of the signal is removed.

In the overflow detection circuit of the third aspect, the overflow detection circuit of the first or second aspect is provided with an overflow display circuit 5 for indicating that an overflow has occurred. Therefore, the optimum input level adjustment can be easily performed while watching this overflow display.

[0028]

1 is a block diagram showing the configuration of an embodiment of an overflow detection circuit according to the present invention, which is an embodiment commonly corresponding to the inventions described in claims 1 and 3. It should be noted that the portions corresponding to those of the conventional example in FIG. 3 are denoted by the same reference numerals, and the description thereof will be appropriately omitted.

In FIG. 1, A / D converter 1
The D-converted digital data is the input data signal (I
N) is sent to the low-cut filter 2 and
It is also sent to the overflow detection circuit 4a (first overflow detection means). The output data signal (OUT) obtained through the low-cut filter 2 is sent to the digital signal processing circuit and also to the overflow detection circuit 4b (second overflow detection means). The overflow detection outputs of the overflow detection circuits 4a and 4b are logically ORed by an OR circuit (generation means for generating an overflow detection signal) 4c and output as an overflow detection signal (FLAG). The overflow display circuit 5 (overflow display means) receives the overflow detection signal (FLAG) and turns on the LED 5b.

That is, in this embodiment, the overflow detection circuit 4a detects the overflow of the input data signal (IN) of the low-cut filter 2 and the overflow detection circuit 4b detects the overflow of the output data signal (OUT). It is carried out. Therefore, when one or both of the overflow detection circuits 4a and 4b detect an overflow, the OR circuit 4c outputs an overflow detection signal (FLAG). In this way, in this embodiment, overflow detection is performed for both the input data signal (IN) and the output data signal (OUT) of the low-cut filter 2. Therefore, even if the offset of the input signal is removed, the overflow is accurately detected. Can be detected.

When an overflow occurs, the display control circuit 5a turns on the LED 5b so that the overflow state can be clearly identified.

Therefore, when an overflow occurs, the level setting volume 13 is adjusted (the input signal level to the A / D converter 1 is adjusted) until the LED 5b is turned off, and the overflow state is released. be able to.

The method of adjusting the level of the input signal of the A / D converter 1 while confirming the lighting state of the LED 5b in this embodiment has the A / D converter 1 inside. It can be used particularly effectively for a device having no level display meter.

FIG. 2 is a block diagram showing the configuration of another embodiment of the overflow detection circuit of the present invention, which is an embodiment commonly corresponding to the inventions described in claims 2 and 3. The parts corresponding to those in the conventional example of FIG. 4 and the embodiment of FIG. 1 are designated by the same reference numerals, and the description thereof will be omitted as appropriate.

In the embodiment of FIG. 2, the common terminal "c" of the switching switch 7 is connected to the input of the A / D converter 1, and one terminal "a" of the switching switch 7 is connected to the level setting potentiometer 13. The other terminal "b" is grounded. Normally, the terminal "a" and the terminal "c" are connected. Further, the digital data output from the A / D converter 1 is sent as an input data signal (IN) to the calibration circuit 6 and also to the overflow detection circuit 4a. The output data signal (OUT) of the calibration circuit 6 is sent to the overflow detection circuit 4b.

In the embodiment shown in FIG. 2, the offset compensation is
This is a method of using the calibration register 6a and the adder 6b, and the set value to the calibration register 6a is input by the adder 6b to the input data signal (IN).
And offset compensation is performed.

For example, when the offset amount of the A / D converter 1 is to be compensated, the switching switch 7
The input of the A / D converter 1 is grounded, and the compensation amount to the calibration register 6a is set so that the output data signal (OUT) of the adder 6b becomes zero.

In the embodiment of FIG. 2 as well, as in the embodiment of FIG. 1, two overflow detection circuits 4a and 4b are used, and the overflow detection circuit 4a overflows the input data signal (IN) to the calibration circuit 6. Of the output data signal (OUT) is detected by the overflow detection circuit 4b. Therefore, when one or both of the overflow detection circuits 4a and 4b detect an overflow, the OR circuit 4c outputs an overflow detection signal (FLA).
G) is output. That is, the input data signal (IN) and the output data signal (O) to the calibration circuit 6
Since the overflow detection is performed for both (UT),
Even if the offset of the input signal is removed, the overflow can be accurately detected.

The point that the level of the input signal is adjusted while looking at the LED 5b is the same as in the case of the embodiment shown in FIG.

[0040]

According to the overflow detection circuit of the present invention, the overflow detection is performed for both the input data signal and the output data signal of the low-cut filter, so that the overflow of the digital data is surely detected. can do.

According to the overflow detection circuit of the second aspect, the overflow detection is performed for both the input data signal and the output data signal of the calibration circuit, so that the overflow of the digital data is surely detected. be able to.

According to the overflow detection circuit of the third aspect, the overflow is surely detected and displayed, so that the input level to the A / D converter or the like can be easily and optimally adjusted.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of an overflow detection circuit of the present invention.

FIG. 2 is a block diagram showing the configuration of another embodiment of the overflow detection circuit of the present invention.

FIG. 3 is a block diagram showing a configuration example of a conventional digital signal conversion circuit.

FIG. 4 is a block diagram showing another configuration example of a conventional digital signal conversion circuit.

FIG. 5 is a diagram showing an example of a signal for explaining a problem of the conventional example.

FIG. 6 is a block diagram in which the configuration of the conventional example of FIG. 3 is partially modified.

FIG. 7 is a diagram showing an example of signals for explaining the problems of the conventional example of FIG.

[Explanation of symbols]

1 A / D converter 2 Low-cut filter 3 Overflow detection circuit 4 Overflow detection circuit section 4a Overflow detection circuit (first overflow detection means) 4b Overflow detection circuit (second overflow detection means) 4c OR circuit (logical sum circuit) ( 5) Overflow display circuit (overflow display means) 5a Display control circuit 5b LED 6 Calibration circuit 6a Calibration register 6b Adder 7 Switching switch 11 Input terminal 12 Signal amplifier 13 Level setting volume

Claims (3)

[Claims] 1. A digital signal processing circuit having a low-cut filter, wherein first overflow detecting means detects an overflow of an input data signal to the low-cut filter, and second overflow detecting means detects an overflow of an output data signal of the low-cut filter. 2. An overflow detection circuit, comprising: an overflow detection means; and a generation means that generates an overflow detection signal when an overflow is detected by at least one of the first and second overflow detection means. 2. A digital signal processing circuit having a calibration circuit for compensating for an offset of a signal, a first overflow detecting means for detecting an overflow of an input data signal of the calibration circuit, and an output of the calibration circuit. A second overflow detecting means for detecting an overflow of the data signal; and a generating means for generating an overflow detecting signal when an overflow is detected by at least one of the first and second overflow detecting means. Overflow detection circuit. 3. The overflow detection circuit according to claim 1, further comprising overflow display means for displaying an overflow when it is detected.