JPH07118043B2 - Digital signal recorder - Google Patents

Description

The present invention relates to a digital signal recording device used when recording a digital signal on a magnetic tape.

[Outline of Invention]

According to the present invention, in a digital signal recording device used for recording a digital signal on a magnetic tape, the gain of a low frequency component of a digital signal to be recorded is relatively lowered as compared with a high frequency component of the digital signal. The non-linear distortion is lowered by recording the same on the magnetic tape by compensating for.

[Conventional technology]

For example, as disclosed in Japanese Patent Laid-Open No. 55-135316, when recording a high frequency digital signal such as a digital video signal, a recording circuit as shown in FIG. 7 has been conventionally used.

In FIG. 7, the emitters of the transistors 51 and 52 are commonly connected, and this connection point is connected to the collector of the transistor 53 that operates as a constant current source. Transistor
The base of 53 is connected to a terminal 54 to which a constant voltage is applied.
The emitter of the transistor 53 is connected to the power supply terminal 56 of −V _EE via the resistor 55.

The bases of the transistors 51 and 52 are the input terminals 57 and
Connected to 58 respectively. The collectors of the transistors 51 and 52 are connected to one terminal 60 and the other terminal 61 of the magnetic head 59, respectively. The terminal 62 at the midpoint of the magnetic head 59 is connected to the power supply terminal 63 of + V _CC .

The conventional recording circuit shown in FIG. 7 has input terminals 57 and 58.
The digital signal supplied to
52 is turned on / off, currents in opposite directions are applied to the windings 64 of the magnetic head 59, and signals are recorded on the magnetic tape. That is, when the digital signal supplied to the input terminal 57 is high level and the digital signal supplied to the input terminal 58 is low level, the transistor 51
Is turned on, the transistor 52 is turned off, and a current flows through the winding 64 in the direction indicated by the arrow a. When the digital signal supplied to the input terminal 58 is high level and the digital signal supplied to the input terminal 57 is low level, the transistor 52
Is turned on, the transistor 51 is turned off, and a current is passed through the winding 64 in the direction indicated by arrow b.

However, when magnetic recording is performed at a high recording density such as when a digital video signal is stored on a magnetic tape, a large amount of non-linear distortion peculiar to magnetic recording occurs. Such non-linear distortion cannot be removed by the equalizer during reproduction.

In the above-mentioned conventional recording circuit, the same recording current is always flowed in the same phase for the high frequency component and the low frequency component, and no compensation is made for the non-linear distortion. Therefore, there is a problem that a large amount of non-linear distortion occurs during recording.

It is considered that the non-linear distortion in the recording process occurs due to the interference between the pulse written immediately and the pulse written next. On the other hand, if the recording current waveform is properly compensated,
It is possible to lower the generation.

Therefore, a recording circuit has been proposed in which phase distortion is added in advance to a digital signal to be recorded. That is, as shown in FIG. 8, a digital signal to be recorded is supplied from the input terminal 71 to the high-pass filter 72, and the digital signal to be recorded by the high-pass filter 72 is subjected to phase distortion so as to compensate for the occurrence of nonlinear distortion in advance. Give it. The output of the high pass filter 72 is binarized by the comparator 73 and supplied to the magnetic head 75 via the recording amplifier 74. By thus preliminarily applying phase compensation to the digital signal to be recorded, the non-linear distortion is lowered.

As shown in FIG. 9, the digital signal to be recorded is supplied from the input terminal 81 to the peaking circuit 82, and the output of the peaking circuit 82 is supplied to the magnetic head 85 via the attenuator 83 and the recording amplifier 84. A recording circuit has been proposed. For this recording circuit,
It is described in detail in 5). As the peaking circuit 82, as shown in FIG. 10, a resistor 88 and a capacitor 89 are connected in parallel between an input terminal 86 and an output terminal 87, and an output terminal is provided.
Resistance between the connection point between 87 and resistor 88 and capacitor 89 and ground
The one that connects 90 is used. The recording amplifier 84 needs to have a linear amplitude characteristic.

In the recording circuit shown in FIG. 10, the peaking circuit 82 performs amplitude and phase compensation for nonlinear distortion in advance. Thereby, the non-linear distortion is lowered.

[Problems to be solved by the invention]

The relatively slight non-linear distortion can be reduced to some extent by using the recording circuit shown in FIGS. 8 and 9 described above. However, when the coercive force Hc of the tape and the residual magnetic flux density Br are both high, for example, when a metal tape is recorded by an M & F (metal & ferrite (combining sendust or amorphous and ferrite)) head having a high saturation magnetic flux density Bs, for example, it occurs. Large nonlinear distortion cannot be sufficiently removed by the above-described conventional recording circuit.

That is, in the recording circuit shown in FIG. 8, only the phase characteristic is compensated for the non-linear distortion, and the amplitude is not compensated.

The recording circuit shown in FIG. 9 cannot sufficiently compensate the amplitude and phase characteristics for a large non-linear distortion that occurs when magnetically recording on a metal tape with an M & F head. That is, the transfer function H (s) of the peaking circuit 82 (FIG. 10) in the recording circuit shown in FIG.
Let R ₁ and R _{2 be} the resistance values of, and C ₁ be the capacitance of the capacitor 89. Becomes

Assuming that 1 / C ₁ R ₁ = a, (R ₁ + R ₂ ) / (C ₁ R ₁ R ₂ ) = b b> a, the transfer function H (S) is Becomes Therefore, the amplitude characteristic of this peaking circuit,
The phase characteristics and group delay characteristics are shown in FIGS. 11A to 11C, respectively.

As is clear from the characteristics shown in FIGS. 11A to 11C, this peaking circuit 82 cannot obtain a steep amplitude characteristic and cannot perform sufficient phase compensation. Further, when this peaking circuit is used, there is a problem in that the recording amplifier 84 must have a linear amplitude characteristic.

Therefore, an object of the present invention is to provide a digital signal recording apparatus capable of reducing a large non-linear distortion that occurs when a metal tape is recorded by an M & F head.

Another object of the present invention is to provide a digital signal recording apparatus capable of reducing the power consumption of the recording amplifier.

[Means for solving problems]

The present invention is a digital signal recording apparatus in which a digital signal to be recorded is supplied to a recording head through an equalizing circuit that lowers the gain of a low frequency component relative to the high frequency component of this digital signal. .

[Action]

It is considered that the non-linear distortion in the recording process occurs due to the interference between the pulse already written and the pulse to be written next. Therefore, an equalizer circuit composed of transistors 1, 2, resistors 5, capacitors 6, and current sources 3, 4 is used,
The gain of the low frequency component of the recording signal is relatively lowered as compared with the high frequency component, the phase of the high frequency component is relatively delayed as compared with the low frequency component, and compensation for non-linear distortion is performed at the time of recording. Thereby, the non-linear distortion can be reduced.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

It is considered that the non-linear distortion during the recording process is caused by the interference between the pulse already written and the pulse to be written next, as described above. When performing high-density recording on a metal tape having a high saturation magnetic flux density Bs with an M & F head having high tape coercive force Hc and residual magnetic flux density Br, not only interference by front and rear pulses but also interference over several time slots occurs. Conceivable. However, when performing high density recording on the metal tape with the M & F head, it is considered that a large amount of nonlinear distortion occurs. Also, a wide pulse, that is,
When 1 or 0 continues, there is a tendency that a large amount of non-linear distortion occurs, which is considered to be related to the non-linear distortion where a wide pulse is generated.

From the above, the gain of the low frequency component is relatively lowered as compared with the high frequency component, the phase of the high frequency component is relatively delayed as compared with the low frequency component, and the recording current waveform has sufficient amplitude and phase. It is considered that the compensation can sufficiently reduce the non-linear distortion even when high density recording is performed on the metal tape with the M & F head.

In one embodiment of the present invention, the equalizing circuit shown in FIG. 4 is used to provide amplitude and phase compensation for the non-linear distortion to the recording current waveform to reduce the non-linear distortion.

In FIG. 4, current sources 3 and 4 having a current value I are connected to the emitter of the transistor 1 and the emitter of the transistor 2, respectively, and a resistor 5 and a capacitor 6 are connected between the emitters of the transistors 1 and 2. It The other ends of the current sources 3 and 4 are connected to power supply terminals 7 and 8 of -V _EE , respectively. The base of the transistor 1 is connected to the input terminal 9. The base of the transistor 2 is grounded. The collector of transistor 1 is connected to the + V _CC power supply terminal. The collector of the transistor 2 is connected to the output terminal 12.

When the input signal voltage v _i (t) is supplied to the input terminal 9, a signal current flows through the resistor 5 and the capacitor 6 based on the potential difference between the emitter of the transistor 1 and the emitter of the transistor 2. Therefore, assuming that the resistance value of the resistor 5 is R, the capacitance of the capacitor 6 is C, and the current values of the current sources 3 and 4 are I, the output signal current i ₀ of the output terminal 12 is
(T) becomes i ₀ (t) = I + v _i (t) (1 + jωCR) / R ··· (1).

By the way, in the equation (1), the first term is the bias current determined by the current sources 3 and 4, and the second term is the signal current converted by the input voltage. From the equation (1), the output signal current i ₀ (t) increases as the frequency increases after the cutoff frequency ω ₀ . However, since the signal current of the first term in the equation (1) does not exceed the current value I of the current sources 3 and 4, | v _i (t) (1 + jωCR) / R | ≦ I ... ( 2) and the maximum value of the output signal current i (t) is limited by the current value I of the current sources 3 and 4 from the equation (2). As a result, as shown in FIG. 5, the output signal current i becomes higher than the frequency determined by the current value I of the current sources 3 and 4.
₀ (t) is clipped, and the output signal current i ₀ (t) does not increase even if the frequency becomes higher than this frequency. By appropriately setting the current value I of the current sources 3 and 4, it is possible to suppress an unnecessary increase in power consumption. Further, although the amplitude does not increase at high frequencies, as is clear from FIG. 5, the current waveform becomes steep and the decomposition of the recording current is improved.

From the above equation (1), the transfer function H of this equalizing circuit is
(S) is H (s) = C (S + 1 / CR) = (S + ω ₀ ) / Rω ₀ ·
(3) ω ₀ : Obtained as a cutoff frequency. When the amplitude characteristic, the phase characteristic and the group delay characteristic of the equalizing circuit are respectively calculated from the transfer function H (s), they are as shown in FIGS. 6A to 6C. In addition,
The amplitude characteristic is the frequency ω depending on the current value I of the current sources 3 and 4.
Is limited by _1, the group delay characteristic obtained by differentiating the phase characteristics and it is not to be limited by the current value I of the current source 3 and 4. As is clear from the characteristics shown in FIGS. 6A to 6C, this equalizer circuit lowers the gain of the low frequency band as compared with the high frequency band component and lowers the phase of the high frequency band component as compared with the low frequency band component. It has the property of delaying.

FIG. 1 shows an embodiment of the present invention. In FIG. 1, the emitter of the transistor 21 and the emitter of the transistor 22 are connected to a current source 25 having a current value of 2I via a resistor 23 and a resistor 24, respectively. A capacitor 26 is connected between the emitters of the transistors 21 and 22. The other end of the current source 25 is connected to the power supply terminal 27 of −V _EE . Transistor 2
The base of 1 is connected to the input terminal 28. Transistor 22
The base of is grounded. The collector of the transistor 21 is connected to the power supply terminal 31 of + V _CC through the resistor 29,
It is connected to one input terminal of the drive amplifier 32. The collector of the transistor 22 is connected to the power supply terminal 31 of + V _CC through the resistor 30 and the other input terminal of the drive amplifier 32.

The output terminal of the drive amplifier 32 is connected to the primary winding of the rotary transformer 33. The secondary winding of the rotary transformer 33 is connected to the input terminal of the recording amplifier 34. The output terminal of the recording amplifier 34 is connected to the winding 36 of the magnetic head 35.

This one embodiment is suitable for use when the recording amplifier 34 is mounted on a rotary drum.

Transistors 21, 22, resistors 23, 24, capacitors 26, current source 25
Thus, the equalizing circuit shown in FIG. 4 is constructed. The resistance values of the resistors 23 and 24 are set to R / 2, respectively. For the input signal voltage supplied to terminal 28,
The equalizer circuit compensates for the non-linear distortion. That is, by supplying this input signal voltage to the equalizer circuit, the gain of the low frequency component is relatively reduced and the phase of the high frequency component is relatively reduced according to the characteristics shown in FIGS. 6A to 6C. Be delayed by. The output of the equalizing circuit is converted into a voltage by the resistors 29 and 30, signal voltage outputs of opposite phases are supplied to the recording amplifier 34 via the drive amplifier 32 and the rotary transformer 33, and the output of the recording amplifier 34 is output from the magnetic head. It is supplied to 35 windings 36.

In this way, since the amplitude and the phase are compensated for the non-linear distortion during recording, the non-linear distortion is reduced.

FIG. 2 shows another embodiment of the present invention. This example
This equalizing circuit is also used as a recording amplifier.

In FIG. 2, the equalizer circuit is constituted by the transistors 21, 22, the resistors 23, 24, the capacitor 26, and the current source 25. The collectors of the transistors 21 and 22 are the windings 36 of the magnetic head 35.
Connected to. The midpoint of winding 36 is connected to power supply terminal 31 at + V _CC . The bases of the transistors 21 and 22 are connected to one and the other output terminals of the buffer amplifier 44, respectively.

The digital signal supplied to the input terminal 41 is supplied to the bases of the transistors 21 and 22 via the drive amplifier 42, the rotary transformer 43, and the buffer amplifier 44. Transistor
A recording current is passed through the winding 36 in accordance with the current flowing through 21 and 22. In this way, the equalizing circuit composed of the transistors 21, 22, the resistors 23, 24, the capacitor 26, and the current source 25 provides the recording current with compensation for nonlinear distortion, and
It also works as a recording amplifier.

As shown in FIG. 3, the collectors of the transistors 21 and 22 are connected to the power supply terminal 31 via the current sources 45 and 46 having current values I, respectively, and the collector of the transistor 21 and the current source are connected.
45 connection point and collector of transistor 22 and current source 46
If the connection point is connected to the winding 36 of the magnetic head 35, the middle point tap of the winding 36 becomes unnecessary. That is, when the collector voltage of the transistor 21 is higher than the collector voltage of the transistor 22, a current flows through the winding 36 in the direction indicated by the arrow c, and when the collector voltage of the transistor 22 is higher than the collector voltage of the transistor 21. A current is applied to the winding 36 in the direction indicated by the arrow d.

〔The invention's effect〕

According to the present invention, since the amplitude and the phase of the recording current with respect to the non-linear distortion are compensated, the non-linear distortion can be reduced.

Hereinafter, the effect of the present invention will be described by comparing measured reproduction waveforms.

As shown in FIG. 12A, after the data of “000 ...” is continuous, “1” and “0” are alternately inverted “1010 ...
When a recording signal in which the data of "..." is continuous and the data of "111 ..." is continuous is recorded by a conventional recording circuit (FIG. 7) that is not compensated for nonlinear distortion,
The reproduced waveform is as shown in FIG. 12B. On the other hand, when the same recording signal is recorded by the recording circuit to which the present invention is applied, the reproduced waveform becomes as shown in FIG. 12C.

Since the tape head system has a differential characteristic, the differential waveform of the recording signal shown in FIG. 12A should be obtained as a reproduced waveform unless nonlinear distortion occurs. However, as shown in FIG. 12B, when this signal is recorded by a conventional recording circuit that is not compensated for nonlinear distortion, nonlinear distortion occurs. That is, the peak P to be output at the boundary between the continuous data portion of "000 ..." And the repeated data portion of "1010 ..." Is not reproduced. Also, the continuous data part of "000 ...", "1010 ...
The DC level of the repeated data part of "..." and the continuous data part of "111 ..." should be constant, but as shown in FIG. Is fluctuating.

When the recording circuit to which the present invention is applied is used, as shown in FIG. 12C, the peak P is reproduced, and the data portion of "000 ...", the data portion of "1010 ...", 111 ・
・ ・ ”DC data does not change in the data part. From this, it can be seen that the nonlinear distortion is reduced.

Further, as shown in FIG. 13A, the data of "10" is inserted between the continuous portion of the data of "000 ..." and the continuous portion of the data of "111 ..." The recording signal in which the data of "01" is inserted between the continuous portion of the data of "111 ..." And the continuous portion of the data of "000 ..." When recorded by the recording circuit, as shown in FIG. 13B, “000.
.. "continuous data between" 111 ... "continuous data and" 10 "data between" 111 ... "continuous data and" 000 ... "continuous data 01 ”data cannot be played. On the other hand, when a similar recording signal is recorded by the recording circuit to which the present invention is applied, as shown in FIG. 13C,
Between the continuous data of "000 ..." and the continuous data of "111 ...", the data of "10" and the continuous data of "111 ..." and the continuous data of "000 ..." The data of "01" between can be reproduced.

As can be seen from the reproduced waveforms shown in FIGS. 12 and 13 described above, according to the present invention, the non-linear distortion can be sufficiently reduced.

According to the present invention, the equalizing circuit having the characteristics shown in FIGS. 6A to 6C using active elements has been used. The characteristics of this equalize circuit are
Compared to the characteristics of the peaking circuit composed of only passive elements used in the recording circuit shown in the figure (Figs. 11A to 11C), the gain in the high range is large and the delay in the high range is large. large. Therefore, the non-linear distortion is sufficiently compensated, and a large non-linear distortion such as when recording a metal tape with an M & F head can be sufficiently reduced.

Further, according to the present invention, the current flowing through the equalizing circuit is clipped at a high frequency, so that the amplitude does not increase above a certain value and the power consumption can be reduced. Further, since the current flowing through the equalizing circuit is suppressed to a certain value or less, the influence of heat generation can be reduced when the recording amplifier is mounted on the rotary drum.

[Brief description of drawings]

FIG. 1 is a connection diagram of one embodiment of the present invention, FIG. 2 is a connection diagram of another embodiment of the present invention, FIG. 3 is a connection diagram of yet another embodiment of the present invention, and FIG. FIG. 5 is a connection diagram of an example of the equalizing circuit in the embodiment of the invention, FIG. 5 is a waveform diagram used for explaining the example of the equalizing circuit in the embodiment of the present invention, and FIG. 6 is used for explaining the equalizing circuit in the embodiment of the present invention. FIG. 7 is a frequency characteristic diagram, FIG. 7 is a connection diagram of an example of a conventional digital signal recording circuit, FIG. 8 is a block diagram of another example of a conventional digital signal recording circuit, and FIG. Block diagram of another example,
FIG. 10 is a connection diagram of an example of a peaking circuit in still another example of a conventional digital signal recording circuit, and FIG. 11 is a frequency characteristic diagram of an example of a peaking circuit in yet another example of a conventional digital signal recording circuit. 12 and 13 are waveform charts showing the effect of the present invention. Description of main symbols in the drawings 1,2,21,22: Transistor, 5,23,24: Resistor, 6,26: Capacitor, 3,4,23,25: Current source, 28,41: Input terminal, 35 : Magnetic head.

Claims (1)

[Claims] 1. An equalizer circuit for lowering the gain of a low-frequency component as compared with a high-frequency component of a digital signal to be recorded and delaying the phase of the high-frequency component as compared with the low-frequency component. A digital signal recording apparatus, characterized in that a digital signal is supplied to a recording head through the equalizing circuit, wherein the equalizing circuit includes a first and A second transistor, a capacitor connected between the emitters of the first and second transistors, a resistor connected between the emitters of the first and second transistors, and the first and second transistors On the emitter side of the current source for setting the current flowing in the first and second transistors, the current value of the current source is A digital signal recording device characterized in that the current flowing between the emitters of the first and second transistors is set to be clipped.