JPH07169952A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH07169952A
JPH07169952A JP5312355A JP31235593A JPH07169952A JP H07169952 A JPH07169952 A JP H07169952A JP 5312355 A JP5312355 A JP 5312355A JP 31235593 A JP31235593 A JP 31235593A JP H07169952 A JPH07169952 A JP H07169952A
Authority
JP
Japan
Prior art keywords
region
layer
semiconductor
temperature detecting
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5312355A
Other languages
Japanese (ja)
Inventor
Yuichi Harada
祐一 原田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP5312355A priority Critical patent/JPH07169952A/en
Publication of JPH07169952A publication Critical patent/JPH07169952A/en
Pending legal-status Critical Current

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  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

PURPOSE:To improve withstand voltage by extending a depletion layer to the circumferential part along the region, having different conduction type, which is provided on the surface region located directly under the temperature detecting element of a semiconductor substrate. CONSTITUTION:Directly under the temperature detecting element, to be provided in the vicinity of the circumferential part of the semiconductor substrate same as the main semiconductor element, a region having the different conductive type is provided. The above-mentioned temperature detection element is a diode. A p-region 13 is formed on the surface layer of the n base layer 1 directly under the n<+> region 11 and the p<+> region 12 of a temperature detection diode. The p-region 13 is formed in the same process as the p-base region 2 of an IGBT. Consequently, as the depletion layer is expanded to an n layer by the application of inverse potential between the p-base region 2 and the n<-> base layer 1, the curvature of the edge face of the depletion layer becomes small, and the lowering of withstand voltage of the main IGBT can be prevented.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電力用スイッチングデ
バイスのような主半導体素子に主素子を保護するための
温度検出機能を付加した半導体装置に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device in which a temperature detecting function for protecting a main semiconductor element such as a power switching device is added to the main semiconductor element.

【0002】[0002]

【従来の技術】主半導体素子が主電流による定常損失お
よびスイッチング損失で温度上昇により破壊するのを防
止するために、その素子の半導体基板上にダイオードを
備え、例えばその逆方向のもれ電流の増大から温度上昇
を検知し、主電流をしゃ断するなどの方策をとることが
知られている。図2はそのような半導体装置を示し、主
半導体素子としての絶縁ゲート型バイポーラトランジス
タは、n- ベース層1の一方の側の表面層にpベース領
域2を、そのpベース領域2の表面層にn+ ソース領域
3を有し、pベース領域2のn+ ソース領域3とn-
ース層1の露出面にはさまれた領域上にゲート酸化膜4
を介してゲート電極5が設けられている。ソース端子S
に接続されたソース電極6はn+ ソース領域3とpベー
ス領域2に共通に接触している。n- ベース層1の他方
の側にはn+ バッファ層7を介してp+ ドレイン層8が
存在し、そのp+ ドレイン層8にドレイン端子Dに接続
されたドレイン電極9が接触している。そして、温度検
出ダイオードは、n- ベース層1の露出面上に絶縁膜10
を介して設けられた多結晶シリコン層のn+ 領域11とp
+ 領域12とからなり、n+ 領域11とp+ 領域12のいずれ
か一方が不純物濃度1×104cm -2以下にされている。そ
して、n+ 領域11およびp+ 領域12に、端子21、22がそ
れぞれ接続された電極23、24が接触している。
2. Description of the Related Art In order to prevent a main semiconductor element from being destroyed by a temperature rise due to a steady loss and a switching loss due to a main current, a diode is provided on a semiconductor substrate of the element. It is known to detect a temperature rise from the increase and take measures such as cutting off the main current. FIG. 2 shows such a semiconductor device. An insulated gate bipolar transistor as a main semiconductor element has a p base region 2 on a surface layer on one side of an n base layer 1 and a surface layer of the p base region 2. has n + source region 3, p base region 2 n + source region 3 and the n - gate oxide film 4 over the region between the exposed surface of the base layer 1
The gate electrode 5 is provided via the. Source terminal S
The source electrode 6 connected to is commonly contacted with the n + source region 3 and the p base region 2. the n - on the other side of the base layer 1 p + drain layer 8 is present through the n + buffer layer 7, contact the p + drain layer 8 drain electrode 9 connected to the drain terminal D to the . The temperature detecting diode is formed on the exposed surface of the n base layer 1 by the insulating film 10
N + region 11 and p of the polycrystalline silicon layer provided via
+ Consists regions 12., n + one the impurity concentration of the region 11 and p + region 12 1 × 10 4 cm - 2 are below. The electrodes 23 and 24 to which the terminals 21 and 22 are respectively connected are in contact with the n + region 11 and the p + region 12.

【0003】通常のスイッチング動作では、ゲート電極
5にしきい値以上の電圧を印加すると、n+ ソース領域
3から電子がn- ベース層1、n+ バッファ層7に注入
される。ドレイン電極9には正の電圧がかかっているの
で、p+ ドレイン層8から正孔の注入がおこり、内蔵さ
れているp+ ドレイン層8と、n+ バッファ層7および
- ベース層1と、pベース領域2とからなるpnpト
ランジスタが動作し、IGBTがオンする。
In a normal switching operation, when a voltage higher than a threshold value is applied to the gate electrode 5, electrons are injected from the n + source region 3 into the n base layer 1 and the n + buffer layer 7. Since a positive voltage is applied to the drain electrode 9, holes are injected from the p + drain layer 8 and the built-in p + drain layer 8, n + buffer layer 7 and n base layer 1 , P base region 2, and the IGBT is turned on.

【0004】IGBTを一定の周波数で動作させた場
合、スイッチング損失および定常損失によって半導体基
板に熱が発生し、n- ベース層1全体の温度が上昇す
る。この温度上昇は、図3に示す温度検出ダイオードの
順方向I−V特性曲線が温度の低い場合の線31から飽和
電圧の低い線32に移ることにより検知できる。あるい
は、図4に示す温度検出ダイオードの逆方向I−V特性
の一定の電圧において、もれ電流が温度の低い場合の点
41から増加して点42に移ることにより検知できる。ま
た、温度検出ダイオードがアバランシェ特性をもつなら
ば図5に示す逆方向I−V特性において、温度の低い場
合の線51から、アバランシェ電圧が上昇して線52に移る
ことになる。このような変化を検知して端子21、22に接
続されている、主電流を遮断するなどの制御回路を動作
させれば、主半導体素子を保護することができる。
When the IGBT is operated at a constant frequency, heat is generated in the semiconductor substrate due to switching loss and steady loss, and the temperature of the entire n base layer 1 rises. This temperature rise can be detected by shifting the forward direction IV characteristic curve of the temperature detecting diode shown in FIG. 3 from the line 31 at a low temperature to the line 32 at a low saturation voltage. Alternatively, the point when the leakage current is low at a constant voltage of the reverse direction IV characteristic of the temperature detection diode shown in FIG.
It can be detected by increasing from 41 and moving to point 42. Further, if the temperature detection diode has the avalanche characteristic, in the reverse IV characteristic shown in FIG. 5, the avalanche voltage rises from the line 51 when the temperature is low and moves to the line 52. The main semiconductor element can be protected by detecting such a change and operating a control circuit connected to the terminals 21 and 22, such as cutting off the main current.

【0005】[0005]

【発明が解決しようとする課題】温度検出ダイオードは
半導体素子と同一半導体基板上でなく、回路基板上など
に素子と別個に置いたのでは正確な温度検出ができな
い。しかし、温度検出ダイオードを同一半導体基板に内
蔵させると、寄生サイリスタが形成され、この寄生サイ
リスタが誤作動することによりラッチアップ破壊がおこ
るおそれがある。そのため、図2に示すように、温度検
出ダイオードはn- ベース層1の上に絶縁膜10によって
電気的に絶縁された状態におく必要がある。
The temperature detecting diode cannot be accurately detected if it is placed not on the same semiconductor substrate as the semiconductor element but on the circuit board or the like separately from the element. However, if the temperature detection diode is incorporated in the same semiconductor substrate, a parasitic thyristor is formed, and this parasitic thyristor may malfunction, resulting in latch-up breakdown. Therefore, as shown in FIG. 2, the temperature detection diode needs to be electrically insulated by the insulating film 10 on the n base layer 1.

【0006】しかし、図2に示すような多結晶シリコン
からなる温度検出ダイオードは、半導体基板面積の有効
利用のため基板周辺に近接して配置されるが、このダイ
オードを置くためにフィールドプレートやガードリング
などの空乏層を広げる周辺耐圧構造を形成することがで
きない。従って、n- ベース層1の表面での空乏層端面
の曲率がきつくなり、耐圧の低下を招く。
However, the temperature detection diode made of polycrystalline silicon as shown in FIG. 2 is arranged close to the periphery of the substrate in order to effectively utilize the semiconductor substrate area. It is not possible to form a peripheral breakdown voltage structure that expands a depletion layer such as a ring. Therefore, the curvature of the end face of the depletion layer on the surface of the n base layer 1 becomes tight, and the breakdown voltage is lowered.

【0007】本発明の目的は、この問題を解決し、半導
体基板上への温度検出ダイオードのような温度検出用素
子の設置により主半導体素子の耐圧等の特性に影響を及
ぼすことのない半導体装置を提供することにある。
An object of the present invention is to solve this problem and to install a temperature detecting element such as a temperature detecting diode on a semiconductor substrate so as not to affect characteristics such as withstand voltage of a main semiconductor element. To provide.

【0008】[0008]

【課題を解決するための手段】上記の目的を達成するた
めに、本発明は、主半導体素子の半導体基板の表面上に
絶縁膜を介して形成した半導体層の複数の領域からなる
温度検出用素子を有する半導体装置において、半導体基
板の温度検出用素子の直下の表面層に、導電形の異なる
領域が設けられたものとする。あるいは温度検出用素子
のいずれかの領域に半導体基板の同一表面上に設けられ
た主半導体素子の電極が接続されたものとする。温度検
出用素子がp形の領域とn形の領域が半導体基板面に平
行な平面内で隣接してなるダイオードであることが有効
である。
In order to achieve the above object, the present invention provides a temperature detecting device comprising a plurality of regions of a semiconductor layer formed on a surface of a semiconductor substrate of a main semiconductor element via an insulating film. In a semiconductor device having an element, it is assumed that a region having a different conductivity type is provided in a surface layer of a semiconductor substrate immediately below an element for temperature detection. Alternatively, it is assumed that an electrode of the main semiconductor element provided on the same surface of the semiconductor substrate is connected to any region of the temperature detecting element. It is effective that the temperature detecting element is a diode in which the p-type region and the n-type region are adjacent to each other in a plane parallel to the semiconductor substrate surface.

【0009】[0009]

【作用】半導体基板周辺部近傍に設けられる温度検出用
素子直下の半導体基板表面層に異なる導電形の領域を形
成すれば、基板表面層内で空乏層はその領域にそって周
辺部に向かって伸び、ガードリングと同様の作用をする
ので耐圧が向上する。あるいは、温度検出用素子のいず
れかの領域と主電極とを接続して主電極と同電位とする
と、その領域の電位に影響されて基板表面の空乏層が周
辺部に向かって伸び、フィールドプレートと同様の作用
をするので耐圧が向上する。
If a region of different conductivity type is formed in the surface layer of the semiconductor substrate immediately below the temperature detecting element provided near the peripheral portion of the semiconductor substrate, the depletion layer in the surface layer of the substrate moves toward the peripheral portion along the region. Since it stretches and acts like a guard ring, the breakdown voltage is improved. Alternatively, if any region of the temperature detecting element and the main electrode are connected to have the same potential as the main electrode, the depletion layer on the substrate surface is extended toward the peripheral portion due to the potential of the region and the field plate is affected. Since it has the same function as, the breakdown voltage is improved.

【0010】[0010]

【実施例】図1は本発明の一実施例を示し、前述の図2
と共通の部分には同一の符号が付されている。図2と異
なり、温度検出ダイオードのn+ 領域11およびp+ 領域
12直下のn- ベース層1の表面層にp領域13が形成され
ている。このp領域13はIGBTのpベース領域2と同
一工程で形成できる。この結果、pベース領域2とn-
ベース層1の間に逆電圧が印加されることによってn-
層に広がる空乏層は、p領域12にそって延びるため、空
乏層端面の曲率が小さくなり、主IGBTの耐圧低下を
防止する。
DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of the present invention, which is shown in FIG.
The same parts as those in FIG. Different from Fig. 2, n + region 11 and p + region of the temperature detection diode
A p region 13 is formed in the surface layer of the n base layer 1 immediately below 12. This p region 13 can be formed in the same step as the p base region 2 of the IGBT. As a result, p base region 2 and n
By applying a reverse voltage between the base layers 1, n
Since the depletion layer spreading in the layer extends along the p region 12, the curvature of the end surface of the depletion layer becomes small, and the breakdown voltage of the main IGBT is prevented from lowering.

【0011】図6に示す別の実施例では温度検出ダイオ
ードのn+ 領域11が導線14によってソース電極6と接続
されているため、空乏層が基板周辺部側に向かって伸
び、空乏層端面の曲率が小さくなって主IGBTの耐圧
低下を防止する。
In another embodiment shown in FIG. 6, since the n + region 11 of the temperature detecting diode is connected to the source electrode 6 by the conductive wire 14, the depletion layer extends toward the peripheral side of the substrate and the end face of the depletion layer is formed. The curvature is reduced to prevent the breakdown voltage of the main IGBT from being lowered.

【0012】[0012]

【発明の効果】本発明によれば、主半導体素子と同一半
導体基板の周辺部近傍に設けられる温度検出用素子の直
下に異なる導電形領域を設けるか、温度検出用素子の一
つの領域を主半導体素子の電極と接続することにより主
半導体素子から広がる空乏層を基板周辺に向かって延ば
すことができる。これにより、空乏層端面の曲率が小さ
くなり、温度検出用素子形成による耐圧の低下のない温
度検出機能付の半導体装置が得られた。
According to the present invention, different conductivity type regions are provided immediately below the temperature detecting element provided in the vicinity of the peripheral portion of the same semiconductor substrate as the main semiconductor element, or one area of the temperature detecting element is mainly formed. By connecting to the electrodes of the semiconductor element, the depletion layer extending from the main semiconductor element can be extended toward the periphery of the substrate. As a result, the curvature of the end face of the depletion layer was reduced, and a semiconductor device with a temperature detecting function was obtained in which the breakdown voltage did not decrease due to the temperature detecting element formation.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の一実施例の半導体装置の断面図FIG. 1 is a sectional view of a semiconductor device according to an embodiment of the present invention.

【図2】従来の温度検出機能付IGBTの断面図FIG. 2 is a sectional view of a conventional IGBT with a temperature detecting function.

【図3】温度検出ダイオードの室温時と高温時の順方向
電流電圧特性線図
FIG. 3 is a forward current / voltage characteristic diagram of the temperature detection diode at room temperature and at high temperature.

【図4】温度検出ダイオードの室温時と高温時の逆方向
電流電圧特性線図
FIG. 4 is a reverse current / voltage characteristic diagram of the temperature detection diode at room temperature and at high temperature.

【図5】温度検出ダイオードの室温時と高温時のアバラ
ンシェ特性線図
FIG. 5: Avalanche characteristic diagram of temperature detection diode at room temperature and high temperature

【図6】本発明の別の実施例の半導体装置の断面図FIG. 6 is a sectional view of a semiconductor device according to another embodiment of the present invention.

【符号の説明】[Explanation of symbols]

1 n- ベース層 2 pベース領域 3 n+ ソース領域 4 ゲート酸化膜 5 ゲート電極 6 ソース電極 7 n+ バッファ層 8 p+ ドレイン層 9 ドレイン電極 10 絶縁膜 11 n+ 領域 12 p+ 領域 13 p領域 14 導線1 n - base layer 2 p base region 3 n + source region 4 gate oxide film 5 gate electrode 6 source electrode 7 n + buffer layer 8 p + drain layer 9 drain electrode 10 insulating film 11 n + region 12 p + region 13 p Area 14 conductor

───────────────────────────────────────────────────── フロントページの続き (51)Int.Cl.6 識別記号 庁内整理番号 FI 技術表示箇所 H01L 27/08 331 B 9170−4M 35/00 S ─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. 6 Identification code Office reference number FI technical display location H01L 27/08 331 B 9170-4M 35/00 S

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】主半導体素子の半導体基板の表面上に絶縁
膜を介して形成された半導体層の複数の領域からなる検
出用素子を有するものにおいて、半導体基板の温度検出
用素子の直下の表面層に導電形の異なる領域が設けられ
たことを特徴とする半導体装置。
1. A main semiconductor element having a detection element composed of a plurality of regions of a semiconductor layer formed on the surface of a semiconductor substrate via an insulating film, wherein the surface of the semiconductor substrate immediately below the temperature detection element. A semiconductor device, wherein layers are provided with regions having different conductivity types.
【請求項2】主半導体素子の半導体基板の表面上に絶縁
膜を介して形成された半導体層の複数の領域からなる検
出用素子を有するものにおいて、温度検出用素子の領域
の一つに半導体基板の同一表面上に設けられた主半導体
素子の電極が接続されたことを特徴とする半導体装置。
2. A semiconductor device having a plurality of regions of a semiconductor layer formed on a surface of a semiconductor substrate of a main semiconductor device via an insulating film, wherein the semiconductor is provided in one of the regions of the temperature detecting device. A semiconductor device, wherein electrodes of a main semiconductor element provided on the same surface of a substrate are connected.
【請求項3】温度検出用素子がp形領域とn形領域が基
板面に平行な面内で隣接してなるダイオードである請求
項1あるいは2記載の半導体装置。
3. The semiconductor device according to claim 1, wherein the temperature detecting element is a diode in which a p-type region and an n-type region are adjacent to each other in a plane parallel to the substrate surface.
JP5312355A 1993-12-14 1993-12-14 Semiconductor device Pending JPH07169952A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5312355A JPH07169952A (en) 1993-12-14 1993-12-14 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5312355A JPH07169952A (en) 1993-12-14 1993-12-14 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH07169952A true JPH07169952A (en) 1995-07-04

Family

ID=18028252

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5312355A Pending JPH07169952A (en) 1993-12-14 1993-12-14 Semiconductor device

Country Status (1)

Country Link
JP (1) JPH07169952A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100641864B1 (en) * 2004-01-29 2006-11-03 미쓰비시덴키 가부시키가이샤 Semiconductor device
US7851866B2 (en) * 2005-03-24 2010-12-14 Hitachi, Ltd. Electric power conversion device
JP2013098316A (en) * 2011-10-31 2013-05-20 Mitsubishi Electric Corp Silicon carbide semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100641864B1 (en) * 2004-01-29 2006-11-03 미쓰비시덴키 가부시키가이샤 Semiconductor device
US7851866B2 (en) * 2005-03-24 2010-12-14 Hitachi, Ltd. Electric power conversion device
JP2013098316A (en) * 2011-10-31 2013-05-20 Mitsubishi Electric Corp Silicon carbide semiconductor device

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