JPH0722484A - Wiring structure for electromigration life evaluation - Google Patents

Abstract

(57) [Abstract] [Purpose] A current is caused to flow through a wiring layer corresponding to a wiring layer of a semiconductor device formed on the semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device to reduce the electromigration life of the wiring layer. When evaluating and thereby evaluating the electromigration life of the wiring layer of the semiconductor device, the heat associated with the wiring layer corresponding to the wiring layer of the semiconductor device is effectively released to the outside, and the wiring layer and therefore the semiconductor device To be able to correctly evaluate the electromigration life of wiring layers. A wiring layer as a heat dissipation layer is provided on a semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device, on a wiring layer corresponding to the wiring layer of the semiconductor device, or to a wiring layer of the semiconductor device. The wiring layer is formed below the wiring layer corresponding to the wiring layer corresponding to the wiring layer of the semiconductor device.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to an electromigration life evaluation wiring structure used for evaluating the electromigration life of a wiring layer in a semiconductor device having a structure in which a wiring layer is formed via an interlayer insulating film.

[0002]

2. Description of the Related Art In a semiconductor device having a structure in which a wiring layer is formed on a semiconductor substrate body via an interlayer insulating film, an electromigration used for evaluating the electromigration life of the wiring layer. As a wiring structure for evaluating the application life, conventionally, as shown in FIG. 6, on a semiconductor substrate body 1 corresponding to a semiconductor substrate body of a semiconductor device, (a) an interlayer corresponding to an interlayer insulating film of the semiconductor device. A structure has been proposed in which a wiring layer 3 corresponding to a semiconductor layer of a semiconductor device is formed as an electromigration life evaluation layer via an insulating film 2. In FIG. 6, reference numerals 5 and 6 denote connection pads integrally formed on the interlayer insulating film 2 at both ends of the wiring layer 3.

Further, in a semiconductor device having a structure in which a wiring layer is formed on a semiconductor substrate body via an interlayer insulating film, an electromigration used for evaluating the electromigration life of the wiring layer. Conventionally, as a wiring structure for evaluating the service life, as shown in FIG.
In the conventional electromigration life evaluation wiring structure shown in FIG. 6, the wiring layer 3 as the electromigration life evaluation layer has a wide portion at a position where a constant interval is kept in the extending direction. Electromigration life evaluation wiring having the same structure as the conventional electromigration life evaluation wiring structure shown in FIG. 6 except that it is formed as having 4 as a heat dissipation fin. A structure is also proposed.

In the case of the conventional electromigration life evaluation wiring structure shown in FIGS. 6 and 7, a current is passed through the connection pads 5 and 6 to the wiring layer 3 so that it can be measured. Then, the wiring layer 3 is evaluated as the electromigration life has expired because the current no longer flows, and the wiring layer 3 is evaluated as the electromigration because the current has decreased.
It can be evaluated as the service life is approaching.

[0005]

In the conventional electromigration life evaluation wiring structure shown in FIG. 6, when the electromigration life of the wiring layer 3 is evaluated as described above, the wiring layer 3 is used. To the semiconductor substrate body 1 mainly via the interlayer insulating film 2, or the wiring layer 3 does not have a large area, so that the heat accompanying the wiring layer 3 is effective. Body 1
Therefore, the evaluation of the electromigration life of the wiring layer 3 is performed while the wiring layer 3 has a temperature higher than the maximum temperature of the wiring layer when the semiconductor device is used. Therefore, there is a drawback that the electromigration life of the wiring layer of the semiconductor device cannot be evaluated correctly.

This is all the more remarkable when the density of the current flowing through the wiring layer 3 is increased and the electromigration life of the wiring layer 3 is evaluated in a short time.

Further, in the case of the conventional electromigration life evaluation wiring structure shown in FIG. 7, since the wiring layer 3 has the wide portion 4 as a radiation fin, the heat generated by the wiring layer 3 is shown in FIG. As compared with the conventional electromigration life evaluation wiring structure, the wiring structure can be effectively released to the semiconductor substrate main body 1, but there is a certain limit in increasing the width of the wide portion 4, and therefore, as shown in FIG. It had the same drawbacks as in the case of the conventional wiring structure for evaluating the electromigration life shown in FIG.

Therefore, the present invention does not have the above-mentioned drawbacks.
It proposes a new wiring structure for electromigration life evaluation.

[0009]

The electromigration life evaluation wiring structure according to the first invention of the present application is
A semiconductor device having a structure in which a wiring layer is formed via an interlayer insulating film on a semiconductor substrate body similar to the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. An electromigration life evaluation wiring structure used to evaluate the electromigration life of the wiring layer, wherein: (a) the semiconductor is provided on a semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device; A wiring layer corresponding to the wiring layer of the semiconductor device but wider than that is formed as a heat dissipation layer through an interlayer insulating film corresponding to the interlayer insulating film of the device, and (b). On the wiring layer as the heat dissipation layer, the semi-intermediate insulating film is provided through the other inter-layer insulating film corresponding to the inter-layer insulating film of the semiconductor device so as to extend therethrough. Another wiring layer corresponds to the wiring layer of the body device Electro Migrating - is formed as a Deployment life evaluation layer.

An electromigration life evaluation wiring structure according to the second invention of the present application is formed on a semiconductor substrate body similar to the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. , The wiring layer
An electromigration life evaluation wiring structure used to evaluate the electromigration life of a wiring layer in a semiconductor device having a structure formed via an interlayer insulating film, wherein the semiconductor substrate body of the semiconductor device On the semiconductor substrate body corresponding to (a)
A wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer through an interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, and (b) ) On the wiring layer as the electromigration life evaluation layer, the semiconductor device is covered with another interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, which extends over the wiring layer. However, another wiring layer wider than that corresponding to the wiring layer is formed as a heat dissipation layer.

The electromigration life evaluation wiring structure according to the third invention of the present application is formed on the same semiconductor substrate body as in the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. , The wiring layer
An electromigration life evaluation wiring structure used to evaluate the electromigration life of a wiring layer in a semiconductor device having a structure formed via an interlayer insulating film, wherein the semiconductor substrate body of the semiconductor device On the semiconductor substrate body corresponding to (a)
A wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer through an interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, and (b) ) On the interlayer insulating film, another wiring layer corresponding to the wiring layer of the semiconductor device is formed as a heat dissipation layer in juxtaposition with the wiring layer as the electromigration life evaluation layer. There is.

The electromigration life evaluation wiring structure according to the fourth invention of the present application is the same as the electromigration life evaluation wiring structure according to the first invention of the present application or the third invention of the present application. On the semiconductor substrate body corresponding to the semiconductor substrate body,
On the wiring layer as the electromigration life evaluation layer, the wiring of the semiconductor device is provided through another interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device which covers and extends the wiring layer. A wiring layer corresponding to the layer but wider than that is formed as another heat dissipation layer.

[0013]

[Embodiment 1] Next, a first embodiment of the wiring structure for evaluating electromigration life according to the present invention will be described with reference to FIG.

In FIG. 1, parts corresponding to those in FIG. 6 are designated by the same reference numerals.

The wiring structure for evaluating electromigration life according to the present invention shown in FIG. 1 is provided on a semiconductor substrate body corresponding to the semiconductor substrate body of the above semiconductor device.
(A) A wiring layer corresponding to the wiring layer of the semiconductor device but wider than that is formed as a heat dissipation layer through the interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device. At the same time, (b) via another interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, which extends on the wiring layer as the heat dissipation layer, covering and extending the wiring layer,
Another wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer.

[0016]

Second Embodiment Next, a second embodiment of the electromigration life evaluation wiring structure according to the present invention will be described with reference to FIG.

In FIG. 2, parts corresponding to those in FIG. 1 are designated by the same reference numerals.

The electromigration life evaluation wiring structure according to the present invention shown in FIG. 2 is formed on a semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device, and (a) corresponds to the interlayer insulating film of the semiconductor device. A wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer through the inter-layer insulating film, and (b) the electromigration is performed.
Corresponding to the wiring layer of the above-mentioned semiconductor device via another interlayer insulating film corresponding to the above-mentioned interlayer insulating film of the above-mentioned semiconductor device, covering and extending on the above-mentioned wiring layer as a service life evaluation layer However, another wiring layer wider than that is formed as a heat dissipation layer.

[0019]

Third Embodiment Next, a third embodiment of the wiring structure for evaluating electromigration life according to the present invention will be described with reference to FIG.

In FIG. 3, parts corresponding to those in FIGS. 1 and 2 are designated by the same reference numerals.

The electromigration life evaluation wiring structure according to the present invention shown in FIG. 3 corresponds to the semiconductor substrate body of the semiconductor device in the electromigration life evaluation wiring structure according to the present invention shown in FIG. On the semiconductor substrate body, on the wiring layer as the electromigration life evaluation layer, through another interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device that extends to cover it, A wiring layer corresponding to the wiring layer of the semiconductor device but wider than that is formed as another heat dissipation layer.

[0022]

Fourth Embodiment Next, a fourth embodiment of the wiring structure for electromigration life evaluation according to the present invention will be described with reference to FIG.

In FIG. 4, parts corresponding to those in FIG. 6 are designated by the same reference numerals.

An electromigration life evaluation wiring structure according to the present invention shown in FIG. 4 is provided on a semiconductor substrate body corresponding to a semiconductor substrate body of a semiconductor device, and (a) corresponds to an interlayer insulating film of the semiconductor device. A wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer through the inter-layer insulating film, and (b) on the inter-layer insulating film, Another wiring layer corresponding to the wiring layer of the above semiconductor device is formed as a heat dissipation layer in juxtaposition with the wiring layer as the electromigration life evaluation layer.

[0025]

Fifth Embodiment Next, a fifth embodiment of the wiring structure for evaluating electromigration life according to the present invention will be described with reference to FIG.

5, parts corresponding to those in FIGS. 4 and 3 are designated by the same reference numerals.

An electromigration life evaluation wiring structure according to the present invention shown in FIG. 5 is provided as a wiring as the electromigration life evaluation layer on a semiconductor substrate body corresponding to a semiconductor substrate body of a semiconductor device. On the layer, through the other interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, which extends to cover the layer, it corresponds to the wiring layer of the semiconductor device, but is wider than that. The wiring layer is formed as another heat dissipation layer.

In the above description, only a few examples of the wiring structure for evaluating the electromigration life according to the present invention are shown, and the wiring structure for evaluating the electromigration life according to the present invention shown in FIGS. 1 to 3 is shown. In accordance with the case of the electromigration life evaluation wiring structure according to the present invention shown in FIG. 4, wiring layers 13 are formed on both sides of the wiring layer 3 on the interlayer insulating film forming the wiring layer 3.
It is also possible to adopt a configuration in which the electrodes 14 and 14 are formed, and FIG.
In addition, the wiring structure for evaluating the electromigration life according to the present invention shown in FIG. 5 may have a configuration in which one of the wiring layers 13 and 14 as a heat dissipation layer is omitted. Various modifications and changes could be made without doing so.

[Brief description of drawings]

FIG. 1 is a schematic plan view (FIG. 1A) showing a first embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 1A) and a cross-sectional view taken along line BB thereof (FIG. 1B).

FIG. 2 is a schematic plan view (FIG. 2A) showing a second embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 2A) and a sectional view taken along line BB thereof (FIG. 2B).

FIG. 3 is a schematic plan view (FIG. 3A) showing a third embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 3A) and a sectional view taken along line BB thereof (FIG. 3B).

FIG. 4 is a schematic plan view (FIG. 4A) showing a fourth embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 4A) and a sectional view taken along line BB thereof (FIG. 4B).

FIG. 5 is a schematic plan view (FIG. 5A) showing a fifth embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 5A) and a sectional view taken along line BB thereof (FIG. 5B).

FIG. 6 is a schematic plan view (FIG. 6A) showing a conventional electromigration life evaluation wiring structure and its BB.
It is sectional drawing on a line (FIG. 6B).

FIG. 7 is a schematic plan view (FIG. 7A) showing another conventional wiring structure for evaluating electromigration life and FIG.
FIG. 7B is a cross-sectional view (FIG. 7B) on the line B.

[Explanation of symbols]

 1 semiconductor substrate body 2 interlayer insulating film 3 wiring layer 4 wide part 5 and 6 connection pad

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[Procedure amendment]

[Submission date] January 21, 1994

[Procedure Amendment 1]

[Document name to be amended] Statement

[Correction target item name] Full text

[Correction method] Change

[Correction content]

[Document name] Statement

[Title of Invention] Wiring structure for electromigration life evaluation

[Claims]

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention
The present invention relates to an electromigration life evaluation wiring structure used for evaluating the electromigration life of a wiring layer in a semiconductor device having a structure in which a wiring layer is formed via an interlayer insulating film.

[0002]

2. Description of the Related Art In a semiconductor device having a structure in which a wiring layer is formed on a semiconductor substrate body via an interlayer insulating film, an electromigration used for evaluating the electromigration life of the wiring layer. As a wiring structure for evaluating the application life, conventionally, as shown in FIG. 6, on a semiconductor substrate body 1 corresponding to a semiconductor substrate body of a semiconductor device, (a) an interlayer corresponding to an interlayer insulating film of the semiconductor device. It is proposed that the wiring layer 3 corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer via the insulating film 2. In FIG. 6, reference numerals 5 and 6 denote connection pads integrally formed on the interlayer insulating film 2 at both ends of the wiring layer 3.

Further, in a semiconductor device having a structure in which a wiring layer is formed on a semiconductor substrate body via an interlayer insulating film, an electromigration used for evaluating the electromigration life of the wiring layer. Conventionally, as a wiring structure for evaluating the service life, as shown in FIG.
In the conventional electromigration life evaluation wiring structure shown in FIG. 6, the wiring layer 3 as the electromigration life evaluation layer has a wide portion at a position where a constant interval is kept in the extending direction. Electromigration life evaluation wiring having the same structure as the conventional electromigration life evaluation wiring structure shown in FIG. 6 except that it is formed as having 4 as a heat dissipation fin. A structure is also proposed.

In the case of the conventional electromigration life evaluation wiring structure shown in FIGS. 6 and 7, a current is passed through the connection pads 5 and 6 to the wiring layer 3 so that it can be measured. Then, the wiring layer 3 is evaluated as the electromigration life has expired because the current no longer flows, and the wiring layer 3 is evaluated as the electromigration because the current has decreased.
It can be evaluated that the application life is approaching, and thus the wiring layer of the semiconductor device can be evaluated in the same manner.

[0005]

In the conventional electromigration life evaluation wiring structure shown in FIG. 6, when the electromigration life of the wiring layer 3 is evaluated as described above, the wiring layer 3 is used. Is accompanied by heat generation, and the heat mainly escapes to the semiconductor substrate body 1 through the interlayer insulating film 2. However, since the wiring layer 3 does not have a large area, the heat accompanying the wiring layer 3 is effective. Body 1
Therefore, the evaluation of the electromigration life of the wiring layer 3 is such that the wiring layer 3 has a temperature higher than the maximum temperature of the wiring layer of the semiconductor device when the semiconductor device is used. Therefore, the electromigration life of the wiring layer of the semiconductor device cannot be evaluated correctly.

This is all the more remarkable when the density of the current flowing through the wiring layer 3 is increased and the electromigration life of the wiring layer 3 is evaluated in a short time.

Further, in the case of the conventional electromigration life evaluation wiring structure shown in FIG. 7, since the wiring layer 3 has the wide portion 4 as a radiation fin, the heat generated by the wiring layer 3 is shown in FIG. As compared with the conventional electromigration life evaluation wiring structure, the wiring structure can be effectively released to the semiconductor substrate main body 1, but there is a certain limit in increasing the width of the wide portion 4, and therefore, as shown in FIG. It had the same drawbacks as in the case of the conventional wiring structure for evaluating the electromigration life shown in FIG.

Therefore, the present invention does not have the above-mentioned drawbacks.
It proposes a new wiring structure for electromigration life evaluation.

[0009]

The electromigration life evaluation wiring structure according to the first invention of the present application is
A semiconductor device having a structure in which a wiring layer is formed via an interlayer insulating film on a semiconductor substrate body similar to the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. An electromigration life evaluation wiring structure used to evaluate the electromigration life of the wiring layer, wherein: (a) the semiconductor is provided on a semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device; A wiring layer corresponding to the wiring layer of the semiconductor device but wider than that is formed as a heat dissipation layer through an interlayer insulating film corresponding to the interlayer insulating film of the device, and (b). On the wiring layer as the heat dissipation layer, the semi-intermediate insulating film is provided through the other inter-layer insulating film corresponding to the inter-layer insulating film of the semiconductor device so as to extend therethrough. Another wiring layer corresponds to the wiring layer of the body device Electro Migrating - is formed as a Deployment life evaluation layer.

An electromigration life evaluation wiring structure according to the second invention of the present application is formed on a semiconductor substrate body similar to the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. , The wiring layer
An electromigration life evaluation wiring structure used to evaluate the electromigration life of a wiring layer in a semiconductor device having a structure formed via an interlayer insulating film, wherein the semiconductor substrate body of the semiconductor device On the semiconductor substrate body corresponding to (a)
A wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer through an interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, and (b) ) On the wiring layer as the electromigration life evaluation layer, the semiconductor device is covered with another interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, which extends over the wiring layer. However, another wiring layer wider than that corresponding to the wiring layer is formed as a heat dissipation layer.

The electromigration life evaluation wiring structure according to the third invention of the present application is formed on the same semiconductor substrate body as in the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. , The wiring layer
An electromigration life evaluation wiring structure used to evaluate the electromigration life of a wiring layer in a semiconductor device having a structure formed via an interlayer insulating film, wherein the semiconductor substrate body of the semiconductor device On the semiconductor substrate body corresponding to (a)
A wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer through an interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device, and (b) ) On the interlayer insulating film, another wiring layer corresponding to the wiring layer of the semiconductor device is formed as a heat dissipation layer in juxtaposition with the wiring layer as the electromigration life evaluation layer. There is.

The electromigration life evaluation wiring structure according to the fourth invention of the present application is the same as the electromigration life evaluation wiring structure according to the first invention of the present application or the third invention of the present application. On the semiconductor substrate body corresponding to the semiconductor substrate body,
On the wiring layer as the electromigration life evaluation layer, the wiring of the semiconductor device is provided through another interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device which covers and extends the wiring layer. A wiring layer corresponding to the layer but wider than that is formed as another heat dissipation layer.

[0013]

According to the electromigration life evaluation wiring structure according to the first invention of the present application, as in the case of the conventional electromigration life evaluation wiring structure described above with reference to FIG. A current is passed through a wiring layer corresponding to the wiring layer so that it can be measured, and the current stops flowing, so that the wiring layer is evaluated as having its electromigration life expired. , And because the current has decreased,
The wiring layer can be evaluated as if the electromigration life is near, and thus,
The wiring layer of the semiconductor device can be evaluated in the same manner.

However, in the case of the electromigration life evaluation wiring structure according to the first invention of the present application, the electromigration life of the wiring layer corresponding to the above-described wiring layer of the semiconductor device is evaluated as described above. In this case, the heat accompanying the wiring layer mainly escapes to the semiconductor substrate body via the wiring layer as the heat dissipation layer, and in this case, the wiring layer as the heat dissipation layer is wide, The accompanying heat can be effectively released to the semiconductor substrate body as compared with the case of the conventional electromigration life evaluation wiring structure described in FIGS. 6 and 7.

Therefore, the electromigration of the wiring layer
Even if the evaluation of the switching life is performed in a short time by increasing the density of the current flowing in the wiring layer, the evaluation of the electromigration life of the wiring layer is performed when the wiring layer is a semiconductor device. It is possible to effectively avoid that it is performed in a state in which the temperature is higher than the maximum temperature of the wiring layer of the semiconductor device, and thus, the electromigration life of the wiring layer of the semiconductor device can be improved. Can be evaluated correctly.

According to the wiring structure for evaluating electromigration life according to the first invention of the present application, the wiring layer corresponding to the wiring layer of the semiconductor device in the drawing has the electromigration life evaluation according to the present invention described above with reference to FIG. The wiring structure of the semiconductor device can be evaluated in the same manner as in the case of the wiring structure, and thus the wiring layer of the semiconductor device can be evaluated in the same manner.

In this case, the heat generated by the wiring layer escapes to the atmosphere via the wiring layer serving as a heat dissipation layer, and
In this case, since the wiring layer as the heat dissipation layer is wide,
The heat generated by the wiring layer can be effectively released to the atmosphere as compared with the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7.

Therefore, the electromigration of the wiring layer
The evaluation of the electromigration life can be performed in the same manner as in the case of the wiring structure for electromigration life evaluation according to the first invention of the present application. Therefore, the electromigration life of the wiring layer of the semiconductor device can be correctly evaluated. You can

According to the electromigration life evaluation wiring structure of the third invention of the present application, the wiring layer corresponding to the wiring layer of the semiconductor device is provided with the conventional electromigration life evaluation wiring described above with reference to FIG. It can be evaluated in the same manner as in the case of the structure, and thus the wiring layer of the semiconductor device can be evaluated in the same manner.

Further, in this case, the heat associated with the wiring layer escapes to the atmosphere through the wiring layer serving as the heat dissipation layer.
The heat generated by the wiring layer can be effectively released to the outside as compared with the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7.

Therefore, the electromigration of the wiring layer
The evaluation of the electromigration life can be performed in the same manner as in the case of the wiring structure for electromigration life evaluation according to the first invention of the present application. Therefore, the electromigration life of the wiring layer of the semiconductor device can be correctly evaluated. You can

According to the wiring structure for evaluating electromigration life according to the fourth aspect of the present invention, the wiring layer corresponding to the wiring layer of the semiconductor device is used for evaluating the electromigration life according to the present invention described above with reference to FIG. The wiring structure can be evaluated in the same manner as in the case of the wiring structure, and thus the wiring layer of the semiconductor device can be evaluated in the same manner.

In this case, heat associated with the wiring layer mainly escapes to the main body of the semiconductor substrate via the wiring layer serving as the heat dissipation layer, and also to the atmosphere via the wiring layer serving as another heat dissipation layer. Since it escapes, the heat associated with the wiring layer can be effectively dissipated to the outside as compared with the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7.

Therefore, the evaluation of the electromigration life of the wiring layer 3 is carried out by the electromigration life evaluation wiring structure according to the first invention of the present application or the electromigration life evaluation according to the third invention of the present application. This can be performed in the same manner as in the case of the wiring structure or more, so that the electromigration life of the wiring layer of the semiconductor device can be evaluated more accurately.

[0025]

[Embodiment 1] Next, a first embodiment of the wiring structure for evaluating electromigration life according to the present invention will be described with reference to FIG.

In FIG. 1, parts corresponding to those in FIG. 6 are designated by the same reference numerals.

The wiring structure for electromigration life evaluation according to the present invention shown in FIG. 1 is formed on the semiconductor substrate body 1 corresponding to the semiconductor substrate body of the semiconductor device as shown in FIG.
A wiring layer 11 corresponding to the wiring layer of the semiconductor device but wider than that is formed as a heat dissipation layer via the interlayer insulating film 2 corresponding to the interlayer insulating film of the semiconductor device. b) Corresponding to the wiring layer of the semiconductor device via another interlayer insulating film 7 corresponding to the interlayer insulating film of the semiconductor device, which extends on the wiring layer 11 as the heat dissipation layer. The other wiring layer 3 having the connection pads 5 and 6 is formed as the electromigration life evaluation layer similar to the case of the conventional electromigration life evaluation wiring structure shown in FIG. ing.

The above is the configuration of the first embodiment of the electromigration life evaluation wiring structure according to the present invention.

According to the wiring structure for evaluating electromigration life according to the present invention having such a structure,
As in the case of the conventional electromigration life evaluation wiring structure described above with reference to FIG. 6, the connection pads 5 and 6 are used.
A current is passed through the wiring layer 3 so that it can be measured, and the current stops flowing,
The wiring layer 3 may be evaluated as having its electromigration life expired, or the wiring layer 3 may be evaluated as having its electromigration life shortened due to the reduced current. Therefore, the wiring layer of the semiconductor device can be evaluated in the same manner.

However, in the case of the electromigration life evaluation wiring structure according to the present invention shown in FIG.
When the electromigration life of the wiring layer 3 described above is evaluated as described above, heat generated by the wiring layer 3 mainly causes the interlayer insulating film 7, the wiring layer 11 as the heat dissipation layer, and the interlayer insulating film 2. Through the semiconductor substrate body 1
And then in this case the wiring layer 1 as a heat dissipation layer
Since 1 is wide, the heat generated by the wiring layer 3 can be effectively released to the semiconductor substrate body 1 as compared with the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. it can.

Therefore, even if the electromigration life of the wiring layer 3 is evaluated in a short time by increasing the density of the current flowing in the wiring layer 3, the electromigration life of the wiring layer 3 is evaluated. Can be evaluated by effectively avoiding that the wiring layer 3 has a temperature higher than the maximum temperature of the wiring layer of the semiconductor device when the semiconductor device is used. Therefore, the electromigration life of the wiring layer of the semiconductor device can be correctly evaluated.

[0032]

Second Embodiment Next, a second embodiment of the electromigration life evaluation wiring structure according to the present invention will be described with reference to FIG.

In FIG. 2, parts corresponding to those in FIG. 1 are designated by the same reference numerals.

The electromigration life evaluation wiring structure according to the present invention shown in FIG. 2 is formed on the semiconductor substrate body 1 corresponding to the semiconductor substrate body of the semiconductor device by (a).
Similar to the case of the wiring structure for electromigration life evaluation according to the present invention shown in the figure, which corresponds to the wiring layer of the semiconductor device through the interlayer insulating film 2 corresponding to the interlayer insulating film of the semiconductor device. The wiring layer 3 having the connection pads 5 and 6 is formed as an electromigration life evaluation layer, and (b) on the wiring layer 3 as an electromigration life evaluation layer,
Another wiring layer corresponding to the wiring layer of the semiconductor device, but wider than that, through another interlayer insulating film 7 corresponding to the interlayer insulating film of the semiconductor device, which covers and extends it. 1
2 is formed as a heat dissipation layer.

The above is the configuration of the second embodiment of the wiring structure for evaluating electromigration life according to the present invention.

According to the electromigration life evaluation wiring structure of the present invention having the above-mentioned structure,
As in the case of the conventional electromigration life evaluation wiring structure described above with reference to FIG. 6, the connection pads 5 and 6 are used.
A current is passed through the wiring layer 3 so that it can be measured, and the current stops flowing,
The wiring layer 3 may be evaluated as having its electromigration life expired, or the wiring layer 3 may be evaluated as having its electromigration life shortened due to the reduced current. Therefore, the wiring layer of the semiconductor device can be evaluated in the same manner.

In this case, the heat generated by the wiring layer 3 is
Mainly escapes to the semiconductor substrate body 1 via the interlayer insulating film 2 and escapes to the atmosphere via the interlayer insulating film 7 and the wiring layer 12 as a heat dissipation layer, and in this case, a wiring layer as a heat dissipation layer. Since 11 is wide, heat accompanying the wiring layer 3 can be effectively released to the atmosphere as compared with the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7.

Therefore, even if the electromigration life of the wiring layer 3 is evaluated in a short time by increasing the density of the current flowing through the wiring layer 3, the electromigration life of the wiring layer 3 is evaluated. Can be evaluated by effectively avoiding that the wiring layer 3 has a temperature higher than the maximum temperature of the wiring layer of the semiconductor device when the semiconductor device is used. Therefore, the electromigration life of the wiring layer of the semiconductor device can be correctly evaluated.

[0039]

Third Embodiment Next, a third embodiment of the wiring structure for evaluating electromigration life according to the present invention will be described with reference to FIG.

In FIG. 3, parts corresponding to those in FIGS. 1 and 2 are designated by the same reference numerals.

The wiring structure for evaluating electromigration life according to the present invention shown in FIG. 3 corresponds to the main body of the semiconductor substrate of the semiconductor device in the wiring structure for evaluating electromigration life according to the present invention shown in FIG. On the semiconductor substrate body 1, as the electromigration life evaluation layer, the connection pads 5 and 6 similar to the case of the electromigration life evaluation wiring structure according to the present invention described above with reference to FIGS. 1 and 2. On the wiring layer 3 having a wiring pattern, which corresponds to the wiring layer of the semiconductor device through another interlayer insulating film 8 corresponding to the interlayer insulating film of the semiconductor device which extends over the wiring layer 3, Then, the wide wiring layer 12 is formed as another heat dissipation layer.

The above is the configuration of the third embodiment of the wiring structure for electromigration life evaluation according to the present invention.

According to the wiring structure for evaluating electromigration life according to the present invention having such a structure,
Similar to the case of the electromigration life evaluation wiring structure according to the present invention described above with reference to FIG. 1, the connection pad 5 is used.
A current is passed through the wiring layer 3 through 6 and 6 so that it can be measured, and the current stops flowing, so that the wiring layer 3 is evaluated as having its electromigration life expired. Or the current is reduced, the wiring layer 3 is connected to the electromigration
It can be evaluated that the application life is approaching, and thus the wiring layer of the semiconductor device can be evaluated in the same manner.

In this case, the heat generated by the wiring layer 3 is
Mainly, the interlayer insulating film 7 and the wiring layer 11 as a heat dissipation layer
And escapes to the semiconductor substrate body 1 through the interlayer insulating film 2 in order, and escapes to the atmosphere through the interlayer insulating film 8 and the wiring layer 12 as a heat dissipation layer, and in this case, a wiring layer as a heat dissipation layer. Since 11 and 12 are also wide, the heat associated with the wiring layer 3 is effectively released to the outside as compared with the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. be able to.

Therefore, even if the electromigration life of the wiring layer 3 is evaluated in a short time by increasing the density of the current flowing through the wiring layer 3, the electromigration life of the wiring layer 3 is evaluated. It can be effectively avoided that the wiring layer 3 is evaluated in a state in which the wiring layer 3 has a temperature higher than the maximum temperature of the wiring layer of the semiconductor device when the semiconductor device is used, Therefore, the electromigration life of the wiring layer of the semiconductor device can be correctly evaluated.

[0046]

Fourth Embodiment Next, a fourth embodiment of the wiring structure for electromigration life evaluation according to the present invention will be described with reference to FIG.

In FIG. 4, parts corresponding to those in FIG. 6 are designated by the same reference numerals.

An electromigration life evaluation wiring structure according to the present invention shown in FIG. 4 is formed on a semiconductor substrate main body 1 corresponding to a semiconductor substrate main body of a semiconductor device as shown in FIG.
As in the case of the conventional wiring structure for electromigration life evaluation, which corresponds to the wiring layer of the semiconductor device via the interlayer insulating film 2 corresponding to the interlayer insulating film of the semiconductor device, which is described above with reference to FIG. The wiring layer 3 having the connection pads 5 and 6 is formed as the electromigration life evaluation layer, and (b) the wiring as the electromigration life evaluation layer on the interlayer insulating film 2. Other wiring layers 13 and 14 corresponding to the wiring layers of the semiconductor device are formed adjacent to the layer 3 as heat dissipation layers.

The above is the configuration of the fourth embodiment of the electromigration life evaluation wiring structure according to the present invention.

According to the wiring structure for evaluating electromigration life according to the present invention having such a structure,
As in the case of the conventional electromigration life evaluation wiring structure described above with reference to FIG. 6, the connection pads 5 and 6 are used.
A current is passed through the wiring layer 3 so that it can be measured, and the current stops flowing,
The wiring layer 3 may be evaluated as having its electromigration life expired, or the wiring layer 3 may be evaluated as having its electromigration life shortened due to the reduced current. Therefore, the wiring layer of the semiconductor device can be evaluated in the same manner.

However, in the case of the electromigration life evaluation wiring structure according to the present invention shown in FIG.
When the electromigration life of the wiring layer 3 described above is evaluated as described above, the heat associated with the wiring layer 3 is mainly passed through the interlayer insulating film 2 in sequence, and also the wiring layer 13 serving as a heat dissipation layer. And 14 and the interlayer insulating film 2 to escape to the semiconductor substrate body 1 and escape to the atmosphere via the wiring layers 13 and 14 as heat dissipation layers.
The heat generated by the wiring layer 3 can be effectively released to the outside as compared with the case of the conventional electromigration life evaluation wiring structure described above with reference to FIGS. 6 and 7. This is
This is all the more true if the wiring layers 13 and 14 serving as heat dissipation layers are widened.

Therefore, even if the electromigration life of the wiring layer 3 is evaluated in a short time by increasing the density of the current flowing through the wiring layer 3, the electromigration life of the wiring layer 3 is evaluated. It can be effectively avoided that the wiring layer 3 is evaluated in a state in which the wiring layer 3 has a temperature higher than the maximum temperature of the wiring layer of the semiconductor device when the semiconductor device is used, Therefore, the electromigration life of the wiring layer of the semiconductor device can be correctly evaluated.

[0053]

Fifth Embodiment Next, a fifth embodiment of the wiring structure for evaluating electromigration life according to the present invention will be described with reference to FIG.

In FIG. 5, parts corresponding to those in FIGS. 3 and 4 are designated by the same reference numerals.

The electromigration life evaluation wiring structure according to the present invention shown in FIG. 5 corresponds to the semiconductor substrate body of the semiconductor device in the electromigration life evaluation wiring structure according to the present invention shown in FIG. On the semiconductor substrate body 1 and on the wiring layer 3 as the electromigration life evaluation layer, the wiring layer 3 is covered and extended as in the case of the electromigration life evaluation wiring structure according to the present invention shown in FIG. The wiring layer 12 corresponding to the wiring layer of the semiconductor device is widened as another heat dissipation layer, which corresponds to the wiring layer of the semiconductor device, via the other interlayer insulating film 7 corresponding to the interlayer insulating film of the semiconductor device. Has been formed.

The above is the configuration of the fifth embodiment of the electromigration life evaluation wiring structure according to the present invention.

According to the electromigration life evaluation wiring structure of the present invention having the above-mentioned structure,
As in the case of the wiring structure for evaluating electromigration life according to the present invention described above with reference to FIGS. 3 and 4, a current can be measured in the wiring layer 3 via the connection pads 5 and 6. , The current flows through the wiring layer 3 and the electromigration
It is possible to evaluate that the lifetime of the semiconductor device has expired, or that the current has decreased so that the wiring layer 3 can be evaluated as having a short electromigration lifetime. The wiring layer can be evaluated similarly.

In this case, the heat generated by the wiring layer 3 is
Mainly via the interlayer insulating film 2 and via the wiring layers 13 and 14 as the heat dissipation layer, escape to the semiconductor substrate body 1 and via the interlayer insulating film 7 and the wiring layer 12 as the heat dissipation layer, Also, escape to the atmosphere through the wiring layers 13 and 14 as the heat dissipation layer, the interlayer insulating film 7 and the wiring layer 12 as the heat dissipation layer, and in this case, the wiring layer 11 as the heat dissipation layer is wide. Since it is also, wiring layer 3
The heat associated with the above can be effectively dissipated to the outside as compared with the case of the conventional wiring structure for evaluating the electromigration life described above with reference to FIGS. 6 and 7.

Therefore, even if the electromigration life of the wiring layer 3 is evaluated in a short time by increasing the density of the current flowing through the wiring layer 3, the electromigration life of the wiring layer 3 is evaluated. It can be effectively avoided that the wiring layer 3 is evaluated in a state in which the wiring layer 3 has a temperature higher than the maximum temperature of the wiring layer of the semiconductor device when the semiconductor device is used, Therefore, the electromigration life of the wiring layer of the semiconductor device can be correctly evaluated.

In the above description, only a few examples of the wiring structure for evaluating electromigration life according to the present invention are shown, and the wiring structure for evaluating electromigration life according to the present invention shown in FIGS. 1 to 3 is shown. In accordance with the case of the electromigration life evaluation wiring structure according to the present invention shown in FIG. 4, wiring layers 13 are formed on both sides of the wiring layer 3 on the interlayer insulating film forming the wiring layer 3.
It is also possible to adopt a configuration in which the electrodes 14 and 14 are formed, and FIG.
In addition, the wiring structure for evaluating the electromigration life according to the present invention shown in FIG. 5 may have a configuration in which one of the wiring layers 13 and 14 as a heat dissipation layer is omitted. Various modifications and changes could be made without doing so.

[Brief description of drawings]

FIG. 1 is a schematic plan view (FIG. 1A) showing a first embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 1A) and a cross-sectional view taken along line BB thereof (FIG. 1B).

FIG. 2 is a schematic plan view (FIG. 2A) showing a second embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 2A) and a sectional view taken along line BB thereof (FIG. 2B).

FIG. 3 is a schematic plan view (FIG. 3A) showing a third embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 3A) and a sectional view taken along line BB thereof (FIG. 3B).

FIG. 4 is a schematic plan view (FIG. 4A) showing a fourth embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 4A) and a sectional view taken along line BB thereof (FIG. 4B).

FIG. 5 is a schematic plan view (FIG. 5A) showing a fifth embodiment of a wiring structure for evaluating electromigration life according to the present invention (FIG. 5A) and a sectional view taken along line BB thereof (FIG. 5B).

FIG. 6 is a schematic plan view (FIG. 6A) showing a conventional electromigration life evaluation wiring structure and its BB.
It is sectional drawing on a line (FIG. 6B).

FIG. 7 is a schematic plan view (FIG. 7A) showing another conventional wiring structure for evaluating electromigration life and FIG.
FIG. 7B is a cross-sectional view (FIG. 7B) on the line B.

[Explanation of reference numerals] 1 semiconductor substrate main body 2 interlayer insulating film 3 wiring layer 4 wide portion 5, 6 connection pad 7, 8 interlayer insulating film 11, 12, 13, 14 wiring layer as a heat dissipation layer

Claims (4)

[Claims] 1. In a semiconductor device having a structure in which a wiring layer is formed on a main body of a semiconductor substrate via an interlayer insulating film, an electromigration that is used to evaluate the electromigration life of the wiring layer. In the wiring structure for evaluating the lifetime of the semiconductor, the semiconductor is formed on the semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device, and (a) via the interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device. A wiring layer corresponding to the wiring layer of the device but wider than that is formed as a heat dissipation layer, and (b) extends over the wiring layer as the heat dissipation layer so as to cover it. ,
Another wiring layer corresponding to the wiring layer of the semiconductor device is formed as an electromigration life evaluation layer via another interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device. A wiring structure for electromigration life evaluation, which is characterized in that 2. In a semiconductor device having a structure in which a wiring layer is formed on a semiconductor substrate body via an interlayer insulating film, an electromigration that is used to evaluate the electromigration life of the wiring layer. In the wiring structure for evaluating the lifetime of the semiconductor, the semiconductor is formed on the semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device, and (a) via the interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device. A wiring layer corresponding to the wiring layer of the device is formed as an electromigration life evaluation layer, and (b) covers the wiring layer as the electromigration life evaluation layer. It corresponds to the wiring layer of the semiconductor device through another extended interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device. Deployment life evaluation wiring assembly - Electro Migrating the other wiring layers of the wide compared to it, characterized in that it is formed as a heat radiating layer. 3. An electromigration that is used for evaluating the electromigration life of a wiring layer in a semiconductor device having a structure in which a wiring layer is formed on a semiconductor substrate body with an interlayer insulating film interposed therebetween. In the wiring structure for evaluating the lifetime of the semiconductor, the semiconductor is formed on the semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device, and (a) via the interlayer insulating film corresponding to the interlayer insulating film of the semiconductor device. A wiring layer corresponding to the wiring layer of the device is formed as the electromigration life evaluation layer, and (b) a wiring layer as the electromigration life evaluation layer on the interlayer insulating film. Another wiring layer corresponding to the wiring layer of the semiconductor device is formed as a heat-dissipating layer in juxtaposition with the semiconductor device. Migrating - Deployment life evaluation wiring assembly. 4. The wiring structure for evaluating electromigration life according to claim 1 or 3, wherein the electromigration life evaluation is performed on a semiconductor substrate body corresponding to the semiconductor substrate body of the semiconductor device. On the wiring layer as the working layer, the wiring layer of the semiconductor device is provided through another interlayer insulating film that covers and extends the interlayer insulating film of the semiconductor device. In comparison with that, a wider wiring layer is formed as another heat dissipation layer, which is an electromigration.
Wiring structure for evaluation of service life.