JPH0725801Y2 - Development bias voltage generator - Google Patents
Development bias voltage generatorInfo
- Publication number
- JPH0725801Y2 JPH0725801Y2 JP1987037108U JP3710887U JPH0725801Y2 JP H0725801 Y2 JPH0725801 Y2 JP H0725801Y2 JP 1987037108 U JP1987037108 U JP 1987037108U JP 3710887 U JP3710887 U JP 3710887U JP H0725801 Y2 JPH0725801 Y2 JP H0725801Y2
- Authority
- JP
- Japan
- Prior art keywords
- voltage
- constant voltage
- bias voltage
- developing bias
- constant
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000003990 capacitor Substances 0.000 description 2
- 239000000919 ceramic Substances 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012423 maintenance Methods 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
Landscapes
- Developing For Electrophotography (AREA)
- Electrostatic Charge, Transfer And Separation In Electrography (AREA)
Description
【考案の詳細な説明】 〔産業上の利用分野〕 本考案は構成の簡素化およびコストダウンを図った現像
バイアス電圧発生装置に関する。DETAILED DESCRIPTION OF THE INVENTION [Industrial field of application] The present invention relates to a developing bias voltage generator having a simplified structure and reduced cost.
従来の現像バイアス電圧発生装置として、例えば、第３
図に示すものがある。この現象バイアス電圧発生装置は
交流電源A.C.100Vから変圧器Ｔを介して交流電圧を入力
し、ダイオードD1、D2、D3の整流とコンデンサC1、C2、
C3の充電電圧に基づいて抵抗R1を介してバリスタCRの端
子間に所定の定電圧を出力し、この定電圧を可変抵抗VR
と固定抵抗R2によって分圧することによって出力端子DB
に250V〜300Vの現像バイアスを出力している。As a conventional developing bias voltage generator, for example, a third
Some are shown in the figure. This behavior bias voltage generator inputs an AC voltage via a transformer T from the AC power source AC100V, diodes D 1, D 2, rectifier and capacitor C 1 of D 3, C 2,
Outputs a predetermined constant voltage across the varistor CR terminal via the resistor R 1 based on the charging voltage of the C 3, the variable resistor VR of the constant voltage
And a fixed resistor R 2
Outputs a developing bias of 250V to 300V.
しかし、従来の現像バイアス電圧発生装置は、複数のダ
イオードと複数のコンデンサによって所定の直流電圧を
得ているため、回路構成が複雑化し、また、部品数の増
加によりコストアップするという不都合がある。However, since the conventional developing bias voltage generator obtains a predetermined DC voltage by a plurality of diodes and a plurality of capacitors, it has a disadvantage that the circuit configuration becomes complicated and the cost increases due to an increase in the number of parts.
本考案は上記した不都合を解消するため、感光体を帯電
する帯電器のスクリーン・グリッド電極と接地電位との
間に第１の定電圧を発生する第１の定電圧発生素子と、
第１の定電圧発生素子と並列に接続され、第１の定電圧
より小なる第２の定電圧を発生する第２の定電圧発生素
子と、第１の定電圧と第２の定電圧の差電圧を所定の比
に分圧して現像バイアス電圧として出力する抵抗分圧手
段との直列接続回路より構成される現像バイアス電圧発
生装置を提供する。このような回路構成とすることによ
って既存の直流電圧が利用できるので、交流を直流に変
圧する必要もなくなり、望ましくは定電圧化処理を経て
現像機へ出力するだけで良いので、構成の簡素化とコス
トダウンが図れる。In order to solve the above-mentioned inconvenience, the present invention comprises a first constant voltage generating element for generating a first constant voltage between the screen grid electrode of the charger for charging the photosensitive member and the ground potential,
A second constant voltage generating element connected in parallel with the first constant voltage generating element for generating a second constant voltage smaller than the first constant voltage; and a first constant voltage and a second constant voltage. Provided is a developing bias voltage generating device including a series connection circuit with a resistance voltage dividing means for dividing a differential voltage into a predetermined ratio and outputting the divided voltage as a developing bias voltage. With such a circuit configuration, the existing DC voltage can be used, so that it is not necessary to transform AC into DC, and it is preferable to output the voltage to the developing machine after the constant voltage processing, thus simplifying the configuration. And the cost can be reduced.
以下、本考案の現像バイアス電圧発生装置を詳細に説明
する。Hereinafter, the developing bias voltage generator of the present invention will be described in detail.
第１図は本考案の一実施例を示し、直流電圧発生回路１
は交流電源２から交流電圧を入力して直流電圧を発生
し、帯電器３の放電電極3aに印加される。帯電器３のス
クリーングリッド電極3bには900Vの直流電圧が印加され
ており、現像機４の分圧回路５に入力している。帯電器
３および現像機４は感光体ドラム６に近接して配置され
ており、また、両者の間に露光スリット７が、現像機４
の後段に転写コロトロン８が設けられている。９は反射
ミラーである。FIG. 1 shows an embodiment of the present invention, which is a DC voltage generating circuit 1
The AC voltage is input from the AC power supply 2 to generate a DC voltage, which is applied to the discharge electrode 3 a of the charger 3. A DC voltage of 900V is applied to the screen grid electrode 3b of the charger 3 and is input to the voltage dividing circuit 5 of the developing machine 4. The charging device 3 and the developing device 4 are arranged close to the photoconductor drum 6, and an exposure slit 7 is provided between the charging device 3 and the developing device 4.
The transfer corotron 8 is provided in the subsequent stage. Reference numeral 9 is a reflection mirror.
以上の構成において、複写機の駆動により感光体ドラム
６が時計方向に回転すると初期化が行われた後、帯電器
３によって感光体ドラム６が帯電を受ける。プラテン上
に置かれた原稿の反射光像が反射ミラー９によって反射
されて露光スリット７を介して感光体ドラム６を露光す
る。この露光によって感光体ドラム６に静電潜像を形成
する。帯電器３のスクリーン・グリッド電極3bの直流電
圧は分圧回路５によって250V〜300Vに分圧され、現像機
４の現像バイアス電圧として現像ロールに印加される。
これによって静電潜像はトナー像に現像される。トナー
像は転写コロトロン８によって記録紙に転写される。In the above structure, when the photoconductor drum 6 is rotated clockwise by the driving of the copying machine, initialization is performed, and then the photoconductor drum 6 is charged by the charger 3. The reflected light image of the document placed on the platen is reflected by the reflection mirror 9 and the photosensitive drum 6 is exposed through the exposure slit 7. By this exposure, an electrostatic latent image is formed on the photosensitive drum 6. The DC voltage of the screen grid electrode 3b of the charger 3 is divided into 250V to 300V by the voltage dividing circuit 5 and applied to the developing roll as the developing bias voltage of the developing machine 4.
As a result, the electrostatic latent image is developed into a toner image. The toner image is transferred onto the recording paper by the transfer corotron 8.
第２図は分圧回路５を示し、帯電器３のスクリーン・グ
リッド電極3bの直流電圧はバリスタ（セラミック）CR1
に印加されて900Vに定電圧化されている。この900Vの直
流電圧は定電圧値550Vのバリスタ（セラミック）CR2と2
00KΩの可変抵抗VR（可変出力端子DBを有する）と、300
KΩの固定抵抗Ｒによって分圧され、可変出力端子より2
50V〜300Vの現像バイアス電圧が出力される。この現像
バイアス電圧のセットは製造時、あるいはメンテナンス
時に行うことができる。FIG. 2 shows the voltage dividing circuit 5, in which the DC voltage of the screen grid electrode 3b of the charger 3 is a varistor (ceramic) CR 1
It is applied to and is made a constant voltage to 900V. This 900V DC voltage is a constant voltage 550V varistor (ceramic) CR 2 and 2
00KΩ variable resistor VR (with variable output terminal DB), 300
It is divided by the fixed resistance R of KΩ, and 2 from the variable output terminal.
Development bias voltage of 50V-300V is output. This development bias voltage can be set during manufacturing or maintenance.
以上説明した通り、本考案の現像バイアス電圧発生装置
によると、感光体を帯電する帯電器のスクリーン・グリ
ッド電極と接地電位との間に第１の定電圧を発生する第
１の定電圧発生素子と、第１の定電圧発生素子と並列に
接続され、第１の定電圧より小なる第２の定電圧を発生
する第２の定電圧発生素子と、第１の定電圧と第２の定
電圧の差電圧を所定の比に分圧して現像バイアス電圧と
して出力する抵抗分圧手段との直列接続回路より構成さ
れるようにしたため、回路構成の簡素化およびコストダ
ウンを図ることができる。As described above, according to the developing bias voltage generator of the present invention, the first constant voltage generating element for generating the first constant voltage between the screen grid electrode of the charger for charging the photoconductor and the ground potential. A second constant voltage generating element that is connected in parallel with the first constant voltage generating element and that generates a second constant voltage that is lower than the first constant voltage; and a first constant voltage and a second constant voltage. Since the voltage difference voltage is divided into a predetermined ratio and the resistance dividing means for outputting the voltage as the developing bias voltage is connected in series, the circuit configuration can be simplified and the cost can be reduced.
第１図は本考案の一実施例を示す説明図。 第２図は第１図の実施例の具体例を示す説明図。第３図
は従来の現像バイアス電圧発生装置を示す説明図。 符号の説明 １……直流電圧発生回路 ２……交流電源 ３……帯電器 3a……放電電極 3b……スクリーン・グリッド電極 ４……現像機 ５……分圧回路FIG. 1 is an explanatory view showing an embodiment of the present invention. FIG. 2 is an explanatory view showing a concrete example of the embodiment shown in FIG. FIG. 3 is an explanatory view showing a conventional developing bias voltage generator. Explanation of symbols 1 …… DC voltage generating circuit 2 …… AC power supply 3 …… Charger 3a …… Discharge electrode 3b …… Screen / grid electrode 4 …… Developer 5 …… Voltage dividing circuit
Claims (1)
する現像バイアス電圧発生装置であって、 感光体を帯電する帯電器のスクリーン・グリッド電極と
接地電位との間に第１の定電圧を発生する第１の定電圧
発生素子と、前記第１の定電圧発生素子と並列に接続さ
れ、前記第１の定電圧より小なる第２の定電圧を発生す
る第２の定電圧発生素子と、前記第１の定電圧と前記第
２の定電圧の差電圧を所定の比に分圧して現像バイアス
電圧として出力する抵抗分圧手段との直列接続回路より
構成されることを特徴とする現像バイアス電圧発生装
置。1. A developing bias voltage generator for outputting a predetermined DC voltage to a developing bias means, wherein a first constant voltage is applied between a screen grid electrode of a charger for charging a photosensitive member and a ground potential. A first constant voltage generating element for generating, and a second constant voltage generating element connected in parallel with the first constant voltage generating element for generating a second constant voltage smaller than the first constant voltage. , A series connection circuit of a resistance voltage dividing means for dividing the voltage difference between the first constant voltage and the second constant voltage into a predetermined ratio and outputting the divided voltage as a developing bias voltage. Bias voltage generator.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987037108U JPH0725801Y2 (en) | 1987-03-13 | 1987-03-13 | Development bias voltage generator |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987037108U JPH0725801Y2 (en) | 1987-03-13 | 1987-03-13 | Development bias voltage generator |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63144645U JPS63144645U (en) | 1988-09-22 |
| JPH0725801Y2 true JPH0725801Y2 (en) | 1995-06-07 |
Family
ID=30848138
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987037108U Expired - Lifetime JPH0725801Y2 (en) | 1987-03-13 | 1987-03-13 | Development bias voltage generator |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0725801Y2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5321568B2 (en) * | 2010-11-30 | 2013-10-23 | ブラザー工業株式会社 | Image forming apparatus |
Family Cites Families (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5246839U (en) * | 1975-09-30 | 1977-04-02 | ||
| JPS6127147U (en) * | 1984-07-24 | 1986-02-18 | 沖電気工業株式会社 | electrophotographic equipment |
| JPS61130952U (en) * | 1985-02-01 | 1986-08-15 |
-
1987
- 1987-03-13 JP JP1987037108U patent/JPH0725801Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63144645U (en) | 1988-09-22 |
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