JPH07320995A - Polishing apparatus, polishing method and laminating method - Google Patents
Polishing apparatus, polishing method and laminating methodInfo
- Publication number
- JPH07320995A JPH07320995A JP10865194A JP10865194A JPH07320995A JP H07320995 A JPH07320995 A JP H07320995A JP 10865194 A JP10865194 A JP 10865194A JP 10865194 A JP10865194 A JP 10865194A JP H07320995 A JPH07320995 A JP H07320995A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor substrate
- polishing
- substrate
- pad
- bonding
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Landscapes
- Mechanical Treatment Of Semiconductor (AREA)
- Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
Abstract
(57)【要約】
【目的】 半導体基板に平坦面がを高精度に形成できる
研磨装置および基板の張り合わせを良好に行える張り合
わせ方法を提供する。
【構成】 研磨装置では、吸引口３５から供給される吸
引力が、多孔質の中実部３３および多孔質弾性のパッド
３２を介して伝達され、パッド３２の一方の面に半導体
基板３１が吸着される。一方、張り合わせ装置では、張
り合わせを行う一方の基板に所定の剛性を有する補強部
材を装着し、この補強手段の剛性によって、張り合わせ
時における基板の反りを制御する。
(57) [Summary] [PROBLEMS] To provide a polishing apparatus capable of forming a flat surface on a semiconductor substrate with high accuracy and a bonding method capable of favorably bonding the substrates. In the polishing apparatus, the suction force supplied from the suction port 35 is transmitted through the porous solid portion 33 and the porous elastic pad 32, and the semiconductor substrate 31 is attracted to one surface of the pad 32. To be done. On the other hand, in the laminating apparatus, a reinforcing member having a predetermined rigidity is attached to one of the substrates to be laminated, and the rigidity of the reinforcing means controls the warpage of the substrates during the laminating.
Description
【０００１】[0001]
【産業上の利用分野】本発明は、半導体基板を研磨して
鏡面を形成する研磨装置および研磨方法と、ＳＯＩ構造
の半導体基板を製造する際に用いられる張り合わせ方法
に関する。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a polishing apparatus and a polishing method for polishing a semiconductor substrate to form a mirror surface, and a bonding method used for manufacturing a semiconductor substrate having an SOI structure.
【０００２】[0002]
【従来の技術】例えば、半導体技術の分野では、高性能
化および高集積化を図るため、ＳＯＩ構造の半導体装置
が盛んに開発されている。ＳＯＩ構造の半導体装置を製
造するための手段として、半導体基板相互を張り合わせ
る技術が開発されている。半導体基板を張り合わせるに
は、例えば、張り合わせようとする半導体基板相互の面
を研磨して平坦化し、その平坦面相互を、清浄な条件下
で接触させ、両面に存在する水ないし水酸基の作用によ
る水素結合によって仮接着し、その後、熱処理すること
などにより、完全な張り合わせ基板が完成する。熱処理
後の基板相互の張り合わせ強度は、一般に、２００ｋｇ
／ｃｍ2 以上であり、場合によっては、２０００ｋｇ／
ｃｍ2 にもなる。2. Description of the Related Art For example, in the field of semiconductor technology, a semiconductor device having an SOI structure has been actively developed in order to achieve high performance and high integration. As a means for manufacturing a semiconductor device having an SOI structure, a technique of bonding semiconductor substrates to each other has been developed. To bond the semiconductor substrates, for example, the surfaces of the semiconductor substrates to be bonded are polished to be flat, the flat surfaces are brought into contact with each other under clean conditions, and water or a hydroxyl group existing on both surfaces acts. Temporary bonding is carried out by hydrogen bonding, and then heat treatment or the like is completed to complete a bonded substrate. Bonding strength between substrates after heat treatment is generally 200kg
/ Cm 2 or more, and in some cases 2000 kg /
It can also be cm 2 .
【０００３】このような張り合わせ基板の製造方法にお
いては、半導体基板に平坦面を高精度に形成すること、
および、半導体基板相互の張り合わせを良好に行うこと
が要求される。In such a method for manufacturing a laminated substrate, a flat surface is formed on a semiconductor substrate with high precision,
In addition, it is required that the semiconductor substrates be properly bonded to each other.
【０００４】先ず、従来の張り合わせ基板の製造方法に
おける半導体基板の平坦面の形成方法について説明す
る。半導体基板の平坦面の形成は、例えば、図５（Ｃ）
に示すように、表面に研磨用パッド８を貼り付けた研磨
用定磐９を回転させ、保持具１０でチャックした半導体
基板１の一方の面を、回転した研磨用パッド８に接触さ
せて行う。図５（Ａ）は、図５（Ｃ）に示す保持具１０
の断面図である。図５（Ａ）に示すように、保持具１０
は、いわゆるソフトチャッキング方式の保持具であり、
ワークプレート２の表面にポリウレタンの多孔質弾性パ
ッド３が貼り付けてあり、半導体基板１の外周をガラス
エポキシ樹脂製のリング４で拘束してチャックする。保
持具１０によれば、多孔質弾性パッド３の含水量によっ
て、チャック時に生じる半導体基板１のひずみを低減す
ることを目的とする。First, a method for forming a flat surface of a semiconductor substrate in a conventional method for manufacturing a bonded substrate stack will be described. The flat surface of the semiconductor substrate is formed, for example, in FIG.
As shown in FIG. 3, the polishing pad 9 having the polishing pad 8 attached to its surface is rotated, and one surface of the semiconductor substrate 1 chucked by the holder 10 is brought into contact with the rotated polishing pad 8. . FIG. 5 (A) shows the holder 10 shown in FIG. 5 (C).
FIG. As shown in FIG. 5A, the holder 10
Is a so-called soft chucking holder,
A porous polyurethane elastic pad 3 is attached to the surface of the work plate 2, and the periphery of the semiconductor substrate 1 is constrained by a glass epoxy resin ring 4 for chucking. According to the holder 10, the water content of the porous elastic pad 3 is intended to reduce the strain of the semiconductor substrate 1 that occurs during chucking.
【０００５】従来では、図５（Ａ）に示す保持具１０の
他に、図５（Ｂ）に示す保持具１１も用いられている。
図５（Ｂ）に示すように、保持具１１は、ガイド部６の
内側に外側に向かって突き出た複数の吸引口５を有し、
これらの吸引口５に半導体基板１の一方の面を真空吸着
させて半導体基板１をチャックする。Conventionally, in addition to the holder 10 shown in FIG. 5A, a holder 11 shown in FIG. 5B is also used.
As shown in FIG. 5 (B), the holder 11 has a plurality of suction ports 5 projecting outward inside the guide portion 6,
The semiconductor substrate 1 is chucked by vacuum suctioning one surface of the semiconductor substrate 1 to these suction ports 5.
【０００６】次に、従来の半導体基板の張り合わせ方法
について説明する。図６は、従来の半導体基板の張り合
わせ方法について説明するための断面図である。図６に
示すように、従来では、半導体基板１３を固定吸着保持
具１２により平坦に保持し、他方の半導体基板１４を、
その研磨面中央部が凸状になるように保持する可動吸着
保持具１５で保持する。そして、可動吸着保持具１５を
固定吸着保持具１２に対して近づけ、半導体基板１４の
研磨面中央部を他方の半導体基板１３の研磨面に接触さ
せ、その後、可動吸着保持具１５による吸着を解除する
ことにより、両半導体基板１３、１４相互を、間に気泡
が入らないように仮吸着する。Next, a conventional bonding method for semiconductor substrates will be described. FIG. 6 is a cross-sectional view for explaining a conventional semiconductor substrate bonding method. As shown in FIG. 6, conventionally, the semiconductor substrate 13 is held flat by the fixed suction holder 12, and the other semiconductor substrate 14 is
It is held by a movable suction holder 15 that holds the polishing surface so that the central portion thereof is convex. Then, the movable suction holder 15 is brought closer to the fixed suction holder 12, the central portion of the polishing surface of the semiconductor substrate 14 is brought into contact with the polishing surface of the other semiconductor substrate 13, and then the suction by the movable suction holder 15 is released. By doing so, the two semiconductor substrates 13 and 14 are temporarily adsorbed to each other so that air bubbles do not enter between them.
【０００７】図７は、従来の張り合わせ基板の製造方法
における半導体基板の張り合わせ方法のその他の例につ
いて説明するための断面図である。この張り合わせ方法
は、張り合わせる一方の半導体基板１８を固定吸着保持
具１９に真空吸着させ、張り合わせる他方の半導体基板
１７を可動吸着保持具１６に真空吸着させる。そして、
可動吸着保持具１６を固定吸着保持具１９に近づけ、半
導体基板１７と半導体基板１８と接触して張り合わせ
る。FIG. 7 is a cross-sectional view for explaining another example of a semiconductor substrate bonding method in a conventional bonded substrate manufacturing method. In this bonding method, one semiconductor substrate 18 to be bonded is vacuum-sucked to the fixed suction holder 19, and the other semiconductor substrate 17 to be bonded is vacuum-sucked to the movable suction holder 16. And
The movable suction holder 16 is brought close to the fixed suction holder 19, and the semiconductor substrate 17 and the semiconductor substrate 18 are brought into contact with each other and bonded.
【０００８】[0008]
【発明が解決しようとする課題】しかし、上述した図５
（Ａ）に示す保持具１０を用いた場合、半導体基板１自
身のひずみは十分に低減できず、このひずみによって、
研磨用パッド８側に突き出た部分の研磨量が多くなり、
平坦面に研磨ムラが生じるという問題がある。また、上
述した図５（Ｂ）に示す保持具１１を用いて半導体基板
に平坦面を形成した場合、半導体基板１のうち、吸引口
５に吸着された部分以外の部分が研磨用定磐９に向かっ
て突出し、この部分の研磨量が多くなる。その結果、半
導体基板１の平坦面には凹部が生じ、厚さにバラツキや
ディンプルが生じるという問題がある。However, FIG. 5 described above is used.
When the holder 10 shown in (A) is used, the strain of the semiconductor substrate 1 itself cannot be sufficiently reduced, and this strain causes
The polishing amount of the portion protruding to the polishing pad 8 side increases,
There is a problem that uneven polishing occurs on the flat surface. Further, when a flat surface is formed on the semiconductor substrate by using the holder 11 shown in FIG. 5 (B) described above, the portion of the semiconductor substrate 1 other than the portion sucked by the suction port 5 is used as a polishing container 9 And the amount of polishing at this portion increases. As a result, there is a problem that a recess is formed on the flat surface of the semiconductor substrate 1 and variations in thickness and dimples occur.
【０００９】また、図６に示す従来の張り合わせ方法で
は、可動吸着保持具１５による吸着を解除した段階で、
半導体基板１４の周辺部が瞬間的に他方の半導体基板１
３に対して張り合わせられることになり、以前として気
泡が残った状態で張り合わせが行われる可能性がある。
また、半導体基板１４を反らせた状態から、瞬間的に張
り合わせするため、半導体基板に既に形成してあるパタ
ーンが伸縮したりするなどのおそれもある。特に、パタ
ーンの微細化が進んでいる今日では、パターンの伸縮を
生じさせるおれれがある張り合わせ方法は、好ましくな
い。In the conventional laminating method shown in FIG. 6, when the suction by the movable suction holder 15 is released,
The peripheral portion of the semiconductor substrate 14 is instantaneously the other semiconductor substrate 1
3 will be pasted, and there is a possibility that the pasting will be performed in a state where air bubbles remain.
Further, since the semiconductor substrate 14 is momentarily attached from the warped state, the pattern already formed on the semiconductor substrate may expand or contract. In particular, as the patterns are becoming finer today, the laminating method that causes the expansion and contraction of the patterns is not preferable.
【００１０】さらに、図７に示す従来の張り合わせ方法
では、半導体基板１７と半導体基板１８との間に気泡が
残った状態で張り合わせが行われてしまうという問題が
ある。Further, in the conventional bonding method shown in FIG. 7, there is a problem that the bonding is performed in a state where bubbles remain between the semiconductor substrate 17 and the semiconductor substrate 18.
【００１１】本発明は、上述した従来技術の問題を解決
し、半導体基板に平坦面を高精度に形成できる研磨装置
およびその方法を提供することを第１の目的とする。ま
た、本発明は、ＳＯＩ構造の半導体基板を張り合わせ方
式で製造する際に、半導体基板相互の張り合わせを良好
に行うことができる張り合わせ方法を提供することを第
２の目的とする。A first object of the present invention is to provide a polishing apparatus and method capable of solving the above-mentioned problems of the prior art and forming a flat surface on a semiconductor substrate with high accuracy. A second object of the present invention is to provide a bonding method capable of favorably bonding the semiconductor substrates to each other when manufacturing the SOI structure semiconductor substrates by a bonding method.
【００１２】[0012]
【課題を解決するための手段】上述した従来技術の問題
を解決し上述した第１の目的を達成するために、本発明
の研磨装置は、多孔質弾性部材で構成され、前記半導体
基板の裏面を吸着するパッドと、前記パッドに装着され
た多孔質剛性部材と、前記パッドに前記半導体基板が吸
着されるように前記多孔質剛性部材側から真空吸引力を
供給する吸引手段と、前記半導体基板の表面を研磨する
研磨手段とを有する。In order to solve the above-mentioned problems of the prior art and achieve the above-mentioned first object, the polishing apparatus of the present invention comprises a porous elastic member, and the back surface of the semiconductor substrate. Pad, a porous rigid member mounted on the pad, suction means for supplying a vacuum suction force from the porous rigid member side so that the semiconductor substrate is attracted to the pad, and the semiconductor substrate Polishing means for polishing the surface of the.
【００１３】また、本発明の研磨方法は、上述した第１
の目的を達成するために、多孔質弾性部材で構成される
パッドの一方の面から供給された真空吸引力によって、
前記パッドの他方の面に半導体基板の裏面を吸着し、前
記パッドに吸着された前記半導体基板の表面と、研磨手
段とを接触させ、前記半導体基板の表面と前記研磨手段
とを相対的に移動させて前記半導体基板の表面を研磨す
る。Further, the polishing method of the present invention is the above-mentioned first method.
In order to achieve the purpose of, by the vacuum suction force supplied from one surface of the pad composed of a porous elastic member,
The back surface of the semiconductor substrate is attracted to the other surface of the pad, the surface of the semiconductor substrate attracted to the pad is brought into contact with a polishing means, and the surface of the semiconductor substrate and the polishing means are relatively moved. Then, the surface of the semiconductor substrate is polished.
【００１４】また、本発明の張り合わせ方法は、上述し
た第２の目的を達成するために、第１の基板を第１の吸
着手段に吸着固定し、第２の基板に強度を持たせて基板
のソリを制御する補強手段を第２の基板の一方の面に装
着し、前記補強手段が設けられた第２の基板の他方の面
を第１の基板の表面で浮かせ、前記第１の基板の表面と
前記第２の基板の他方の面とを徐々に接合させる。Further, according to the bonding method of the present invention, in order to achieve the above-mentioned second object, the first substrate is adsorbed and fixed to the first adsorbing means, and the second substrate is made to have strength. The reinforcing means for controlling the warp of the second substrate is attached to one surface of the second substrate, and the other surface of the second substrate provided with the reinforcing means is floated on the surface of the first substrate, And the other surface of the second substrate are gradually joined.
【００１５】[0015]
【作用】本発明の研磨装置およびそれを用いた研磨方法
では、吸引手段からの吸引力をパッドの一方の面に供給
した状態で、パッドの他方の面を半導体基板の裏面に近
づける。パッドは多孔質弾性部材で構成されるため、パ
ッドの一方の面に供給された吸引手段からの吸引力はパ
ッドの他方の面の全面に伝達され、この吸引力によっ
て、パッドの他方の面に半導体基板が吸着される。この
とき、パッドが孔の間隔の密な多孔質部材であることか
ら、半導体基板の裏面には、吸引手段からの吸引力がム
ラなく供給される。また、パッドが弾性部材であること
から、半導体基板の裏面にキズを付けることを抑制でき
ると共に、研磨手段に何らかの原因で振れが生じた場合
でも、この振れがパッドによって吸収される。さらに
は、パッドの一方の面に装着される多孔質剛性部材によ
って、パッドが変形することが抑制される。また、多孔
質剛性部材も多孔質なので、吸引手段からの吸引力がパ
ッド全体に伝達され、吸引ムラが生じることもない。そ
の結果、半導体基板をパッドの他方の面に高い平坦性を
もって吸着できる。そして、パッドの他方の面に吸着さ
れた状態で、半導体基板の表面が研磨手段によって研磨
される。In the polishing apparatus of the present invention and the polishing method using the same, the other surface of the pad is brought closer to the back surface of the semiconductor substrate while the suction force from the suction means is supplied to one surface of the pad. Since the pad is made of a porous elastic member, the suction force from the suction means supplied to one surface of the pad is transmitted to the entire surface of the other surface of the pad, and this suction force causes the other surface of the pad to be absorbed. The semiconductor substrate is adsorbed. At this time, since the pad is a porous member in which holes are closely spaced, the suction force from the suction unit is uniformly supplied to the back surface of the semiconductor substrate. Further, since the pad is an elastic member, it is possible to prevent the back surface of the semiconductor substrate from being scratched, and even if the polishing means is shaken for some reason, the shake is absorbed by the pad. Furthermore, the porous rigid member mounted on one surface of the pad suppresses deformation of the pad. Further, since the porous rigid member is also porous, the suction force from the suction means is transmitted to the entire pad, and uneven suction does not occur. As a result, the semiconductor substrate can be attracted to the other surface of the pad with high flatness. Then, the surface of the semiconductor substrate is polished by the polishing means while being attracted to the other surface of the pad.
【００１６】本発明の張り合わせ方法では、第１の基板
が第１の吸着手段に吸着される。補強手段が第２の基板
の一方の面に装着される。補強手段が装着された第２の
基板の他方の面と、第１の基板の表面とが近づけられ、
第２の基板は第１の基板の表面で浮いた状態になる。次
に、前記第１の基板の表面と前記第２の基板の他方の面
とを、例えば中央部から徐々に接合を進行させて前記第
１の基板と前記第２の基板とが張り合わせられる。この
張り合わせの過程において、補強手段によって、第２の
基板には所定の強度が与えられ、第２の基板のソリが制
御される。その結果、基板に形成されたパターンの伸縮
を抑制でき、次工程でのマスク合わせ時のズレが抑制で
きるため、かかるズレによる製造歩留りの低下を抑制で
きる。In the laminating method of the present invention, the first substrate is adsorbed by the first adsorbing means. The reinforcing means is attached to one surface of the second substrate. The other surface of the second substrate on which the reinforcing means is mounted and the surface of the first substrate are brought close to each other,
The second substrate floats on the surface of the first substrate. Next, the front surface of the first substrate and the other surface of the second substrate are gradually bonded from, for example, the central portion, and the first substrate and the second substrate are bonded together. In the process of bonding, the reinforcing means gives a predetermined strength to the second substrate and controls the warp of the second substrate. As a result, the expansion and contraction of the pattern formed on the substrate can be suppressed, and the deviation at the time of mask alignment in the next step can be suppressed, so that the reduction in manufacturing yield due to the deviation can be suppressed.
【００１７】[0017]
【実施例】以下、本発明の一実施例に係わる研磨装置お
よびその方法と、張り合わせ装置およびその方法とを図
面を参照しつつ詳細に説明する。先ず、本実施例の研磨
装置およびその方法について説明する。図１（Ａ）は本
発明の一実施例に係わる研磨装置に用いられる可動吸着
保持具３０を説明するための概略断面図、図１（Ｂ）は
図１（Ａ）に示す可動吸着保持具３０を用いた本実施例
の研磨装置３６を説明するための概略断面図である。図
１（Ａ）に示すように、可動吸着保持具３０は、上面に
通孔３５を有し内部に多孔質剛性部材３３を格納した円
筒型のガイド部３４と、このガイド部３４の底面部とな
るパッド３２と、通孔３５を介してガイド部３４の内部
に真空吸引力を供給する真空吸引部（図示せず）とを有
する。DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A polishing apparatus and its method, a laminating apparatus and its method according to an embodiment of the present invention will be described in detail below with reference to the drawings. First, the polishing apparatus and method of this embodiment will be described. FIG. 1A is a schematic sectional view for explaining a movable suction holder 30 used in a polishing apparatus according to an embodiment of the present invention, and FIG. 1B is a movable suction holder shown in FIG. FIG. 7 is a schematic cross-sectional view for explaining a polishing device 36 of this embodiment using 30. As shown in FIG. 1A, a movable suction holder 30 has a cylindrical guide portion 34 having a through hole 35 on the upper surface and a porous rigid member 33 housed therein, and a bottom portion of the guide portion 34. And a vacuum suction portion (not shown) that supplies a vacuum suction force to the inside of the guide portion 34 through the through hole 35.
【００１８】多孔質剛性部材３３は、多孔質であるポー
ラス状のセラミックを用いて構成され、通孔３５を介し
て供給された真空吸引力をパッド３２に伝達する。多孔
質剛性部材３３は、例えば、ガイド部３４の内部形状に
応じた円柱型をしている。多孔質弾性部材３３は、多孔
質であることと、所定の剛性を有することが要求され、
この要求が満たされれば、多孔質セラミックス以外に、
多孔質硬質剛性樹脂などを用いることができる。The porous rigid member 33 is made of porous porous ceramics and transmits the vacuum suction force supplied through the through hole 35 to the pad 32. The porous rigid member 33 has, for example, a cylindrical shape corresponding to the internal shape of the guide portion 34. The porous elastic member 33 is required to be porous and have a predetermined rigidity,
If this requirement is met, in addition to porous ceramics,
A porous hard rigid resin or the like can be used.
【００１９】ガイド部３４は、真空吸着部から通孔３５
を介して多孔質剛性部材３３に伝達される真空吸引力を
保持する役割を有し、外部との空気の出入りをシールド
する。パッド３２は、多孔質弾性部材であるポーラス状
の発砲ウレタンを用いて構成され、ガイド部３４の底部
となる薄板形状を有し、多孔質剛性部材３３を介して伝
達された真空吸引部からの真空吸引力を外部に伝達す
る。パッド３２は、多孔質であることと、所定の弾性を
有することが要求され、この要求が満たされれば、発泡
ウレタン以外に、その他の軟質多孔質合成樹脂、多孔質
ゴムなどを用いることができる。また、パッド３２は、
多孔質剛性部材３３に比較して薄いことが好ましく、具
体的には、その膜厚は０．２〜１．０ｍｍ程度が好まし
い。The guide portion 34 extends from the vacuum suction portion to the through hole 35.
It has a role of holding the vacuum suction force transmitted to the porous rigid member 33 via, and shields the inflow and outflow of air with the outside. The pad 32 is formed by using porous foamed urethane which is a porous elastic member, has a thin plate shape that serves as a bottom portion of the guide portion 34, and is provided from the vacuum suction portion transmitted through the porous rigid member 33. Transmits vacuum suction force to the outside. The pad 32 is required to be porous and have a predetermined elasticity. If this requirement is satisfied, other soft porous synthetic resin, porous rubber or the like can be used in addition to urethane foam. . The pad 32 is
It is preferably thinner than the porous rigid member 33, and specifically, the thickness thereof is preferably about 0.2 to 1.0 mm.
【００２０】本実施例の研磨装置３６は、図１（Ｂ）に
示すように、上述した可動吸着保持具３０と、回転軸３
８ａを中心として回転する研磨用定磐３８と、研磨用定
磐３８の表面に貼り付けられた研磨用パッド３７とを有
する。The polishing apparatus 36 of this embodiment, as shown in FIG. 1B, has the above-described movable suction holder 30 and the rotary shaft 3.
The polishing pad 38 rotates around 8a, and the polishing pad 37 attached to the surface of the polishing pad 38.
【００２１】研磨装置３６の作用について説明する。研
磨用定磐３８は回転軸３８ａを中心として回転する。次
に、可動吸着保持具３０を、真空吸着部からの真空吸引
を行った状態で、パッド３２を半導体基板３１の一方の
面に近づける。パッド３２が半導体基板３１の一方の面
に近づくと、多孔質剛性部材３３およびパッド３２を介
して伝達される真空吸引力によって半導体基板３１の裏
面がパッド３２に吸着され、半導体基板３１のチャック
が行われる。このとき、パッド３２が孔の間隔の密な多
孔質部材であることから、半導体基板３１の裏面には、
真空吸着部からの吸引力がムラなく供給される。また、
パッド３１が弾性部材であることから、半導体基板３１
の裏面にキズを付けることを抑制できる。さらには、パ
ッド３２の一方の面に装着される多孔質剛性部材３３に
よって、パッド３２が変形することが抑制される。ま
た、多孔質剛性部材３３も多孔質なので、吸引手段から
の吸引力がパッド全体に伝達され、吸引ムラが生じるこ
ともない。その結果、半導体基板３１をパッド３２の他
方の面に高い平坦性をもって吸着できる。The operation of the polishing device 36 will be described. The polishing container 38 rotates about a rotation shaft 38a. Next, the pad 32 is brought close to one surface of the semiconductor substrate 31 while the movable suction holder 30 is vacuum-sucked from the vacuum suction part. When the pad 32 approaches one surface of the semiconductor substrate 31, the back surface of the semiconductor substrate 31 is attracted to the pad 32 by the vacuum suction force transmitted through the porous rigid member 33 and the pad 32, and the chuck of the semiconductor substrate 31 is removed. Done. At this time, since the pad 32 is a porous member in which holes are closely spaced, the back surface of the semiconductor substrate 31 is
The suction force from the vacuum suction unit is supplied evenly. Also,
Since the pad 31 is an elastic member, the semiconductor substrate 31
It is possible to suppress scratches on the back surface of the. Further, the porous rigid member 33 mounted on one surface of the pad 32 suppresses the deformation of the pad 32. Further, since the porous rigid member 33 is also porous, the suction force from the suction means is transmitted to the entire pad, and uneven suction does not occur. As a result, the semiconductor substrate 31 can be attracted to the other surface of the pad 32 with high flatness.
【００２２】次に、可動吸着保持具３０を移動し、パッ
ド３２に吸着された半導体基板３１の他方の面を、研磨
用定磐３８に応じて回転する研磨用パッド３７に平坦に
接触させる。これによって、半導体基板３１の他方の面
は、回転する研磨用パッド３７で研磨されて平坦化され
る。このとき、パッド３２は高い弾性を有する発砲ウレ
タンを材質としていることから、研磨用定磐３８の振れ
が生じた場合でも、パッド３２が振れによる衝撃を緩和
する役割を果たす。そのため、研磨用定磐３８に振れが
生じた場合でも、半導体基板３１の研磨面にダメージが
生じることを抑制できる。Next, the movable suction holder 30 is moved so that the other surface of the semiconductor substrate 31 sucked by the pad 32 is brought into flat contact with the polishing pad 37 which rotates according to the polishing container 38. As a result, the other surface of the semiconductor substrate 31 is polished and flattened by the rotating polishing pad 37. At this time, since the pad 32 is made of foamed urethane having high elasticity, the pad 32 plays a role of alleviating the shock due to the shake even when the polishing fixed rocket 38 shakes. Therefore, even when the polishing surface 38 is shaken, it is possible to prevent the polishing surface of the semiconductor substrate 31 from being damaged.
【００２３】また、半導体基板３１は高精度な平坦性を
もって可動吸着保持具３０にチャックされているため、
研磨用パッド３７による半導体基板３１の研磨も高精度
な平坦性をもって行われる。その結果、半導体基板３１
には、ディンプルの発生が非常に少ない高精度に平坦化
された研磨面が形成される。特に、研磨時の荷重が軽い
場合には、研磨面は、半導体基板３１のソリの影響を受
けやすくなるが、本実施例では、かかる場合にも、高精
度に平坦化された研磨面を半導体基板に形成できる。Further, since the semiconductor substrate 31 is chucked to the movable suction holder 30 with high precision flatness,
The polishing of the semiconductor substrate 31 by the polishing pad 37 is also performed with high precision flatness. As a result, the semiconductor substrate 31
A highly polished flat surface with very few dimples is formed on the surface. In particular, when the load during polishing is light, the polishing surface is easily affected by the warp of the semiconductor substrate 31, but in the present embodiment, even in such a case, the polishing surface that is highly accurately flattened is a semiconductor. It can be formed on a substrate.
【００２４】次に、本実施例の張り合わせ方法について
説明する。図２（Ａ）は本実施例の張り合わせ方法を説
明するための概略断面図、図３，４は本実施例の張り合
わせ方法を用いてＳＯＩ構造の半導体装置を製造する例
を示す要部断面図である。図２〜４は、本実施例の張り
合わせ方法を用いて、半導体基板相互の張り合わせを実
現し、例えばＳＯＩ構造の半導体基板を得る例を示して
いる。Next, the bonding method of this embodiment will be described. 2A is a schematic cross-sectional view for explaining the bonding method of the present embodiment, and FIGS. 3 and 4 are main-part cross-sectional views showing an example of manufacturing a semiconductor device having an SOI structure using the bonding method of the present embodiment. Is. 2 to 4 show an example in which the semiconductor substrates are bonded to each other by using the bonding method of this embodiment to obtain a semiconductor substrate having an SOI structure, for example.
【００２５】図２（Ａ）に示すように、本実施例の張り
合わせ方法では、張り合わせを行おうとする一方の半導
体基板４２をチャックする固定吸着保持具４１と、張り
合わせを行おうとする他方の半導体基板４３に装着され
る補強部材４４と、半導体基板４３の中央付近の一点を
半導体基板４２に向かって（図中矢印の向きに向かっ
て）押圧する押圧部（図示せず）とを用いる。固定吸着
保持具４１は、一方の半導体基板４２を、平坦性を保持
しつつ固定する。As shown in FIG. 2A, in the bonding method of this embodiment, a fixed suction holder 41 for chucking one semiconductor substrate 42 to be bonded and the other semiconductor substrate to be bonded are used. A reinforcing member 44 attached to the semiconductor substrate 43 and a pressing portion (not shown) that presses a point near the center of the semiconductor substrate 43 toward the semiconductor substrate 42 (in the direction of the arrow in the figure) are used. The fixed suction holder 41 fixes one semiconductor substrate 42 while maintaining flatness.
【００２６】押圧部は、フリーな状態にある半導体基板
４３の一点を半導体基板４２に向かって押圧し、半導体
基板４３と半導体基板４２との間で、水素結合を利用し
た張り合わせを押圧部から周縁部に向かって進行させ
る。このとき、未だ張り合わせが行われていない周縁部
では、基板相互間に数μｍの隙間を有し、この隙間に存
在する空気による反発力によって基板相互間に所定間隔
を保持している。従って、張り合わせが進行している過
程においては、半導体基板４２にはソリが生じている。
このように、半導体基板４２にソリを発生させながら、
押圧部から周縁部に張り合わせを進行させるのは、半導
体基板４２，４３相互間の気泡を外側に押し出せながら
張り合わせを行うことで、張り合わせ面に気泡が残存す
ることを防止するためである。The pressing portion presses one point of the semiconductor substrate 43 in a free state toward the semiconductor substrate 42, and the bonding using hydrogen bonding between the semiconductor substrate 43 and the semiconductor substrate 42 is made peripheral from the pressing portion. Proceed to the club. At this time, in the peripheral portion where the bonding is not performed yet, there is a gap of several μm between the substrates, and a predetermined gap is maintained between the substrates by the repulsive force of the air present in the gap. Therefore, warpage occurs in the semiconductor substrate 42 during the process of bonding.
In this way, while warping the semiconductor substrate 42,
The reason for adhering the bonding from the pressing portion to the peripheral portion is to prevent the bubbles from remaining on the bonding surface by performing the bonding while pushing the bubbles between the semiconductor substrates 42 and 43 to the outside.
【００２７】補強部材４４は、例えば、半導体基板４３
の平面方向の形状に応じた形状をしたポリテトラフルオ
ルエチレンなどのフッ素樹脂製の部材で構成され、張り
合わせを行う半導体基板４３に真空状態で装着される。
補強部材４４は、所定の厚みを有し、その厚みに応じて
半導体基板４３のソリを制御する。The reinforcing member 44 is, for example, the semiconductor substrate 43.
Is formed of a member made of fluororesin such as polytetrafluoroethylene having a shape corresponding to the shape in the plane direction, and is mounted in a vacuum state on the semiconductor substrate 43 to be bonded.
The reinforcing member 44 has a predetermined thickness and controls the warp of the semiconductor substrate 43 according to the thickness.
【００２８】このように、半導体基板４３のソリを制御
するのは以下の理由による。前述したように、半導体基
板４２にはソリが生じており、このソリに応じて半導体
基板４２は部分的に伸びた状態になっている。従って、
半導体基板４２は部分的に伸ばされながら半導体基板４
３と張り合わされる。一方、半導体基板４３も固定吸着
保持具４１にチャックされた状態では、所定の伸びを有
している。そのため、張り合わせによって半導体基板４
３に伸縮があると、マスク合わせ時に合わせズレが生じ
る。従って、本実施例では、補強部材４４の厚みを調整
することで、張り合わせの際に、半導体基板４３の伸び
を制御し、伸縮を最小限にする。すなわち、補強部材４
４の厚みを調整することで、補強部材４４に吸着された
半導体基板４３の剛性を調整し、これによって、半導体
基板４３のソリを調整する。張り合わせ後には、補強部
材４４と半導体基板４３との真空吸着を解除し、補強部
材４４は取り除く。The warp of the semiconductor substrate 43 is controlled in this way for the following reasons. As described above, the semiconductor substrate 42 is warped, and the semiconductor substrate 42 is in a partially expanded state in response to the warpage. Therefore,
The semiconductor substrate 42 is partially stretched while the semiconductor substrate 4 is being stretched.
It is pasted with 3. On the other hand, the semiconductor substrate 43 also has a predetermined elongation when chucked to the fixed suction holder 41. Therefore, the semiconductor substrate 4 can be attached by bonding.
If 3 has expansion and contraction, misalignment will occur during mask alignment. Therefore, in this embodiment, by adjusting the thickness of the reinforcing member 44, the expansion of the semiconductor substrate 43 is controlled and the expansion and contraction is minimized during the bonding. That is, the reinforcing member 4
By adjusting the thickness of the semiconductor substrate 43, the rigidity of the semiconductor substrate 43 adsorbed by the reinforcing member 44 is adjusted, and thus the warp of the semiconductor substrate 43 is adjusted. After the bonding, the vacuum suction between the reinforcing member 44 and the semiconductor substrate 43 is released, and the reinforcing member 44 is removed.
【００２９】次に、本実施例の張り合わせ方法が用いら
れるＳＯＩ構造の半導体装置を製造する方法について説
明する。本実施例で用いる半導体基板４２には、例えば
図３に示すような方法で薄膜が成膜してある。すなわ
ち、同図（Ａ）に示すように、半導体基板４２の表面に
は、素子分離用段差が形成され、同図（Ｂ）に示すよう
に、その表面に酸化シリコンなどで構成される絶縁膜４
５が熱酸化などの手段で成膜される。そして、同図
（ｃ）に示すように、絶縁膜４５の上に、例えばポリシ
リコン膜などで構成される平坦化層４６がＣＶＤ法など
で成膜され、同図（ｃ）に示すように、平坦化層４６の
表面が平坦に研磨される。Next, a method of manufacturing a semiconductor device having an SOI structure using the bonding method of this embodiment will be described. A thin film is formed on the semiconductor substrate 42 used in this embodiment by a method shown in FIG. 3, for example. That is, as shown in FIG. 4A, an element isolation step is formed on the surface of the semiconductor substrate 42, and an insulating film made of silicon oxide or the like is formed on the surface as shown in FIG. Four
5 is formed by means such as thermal oxidation. Then, as shown in FIG. 7C, a planarizing layer 46 made of, for example, a polysilicon film is formed on the insulating film 45 by a CVD method or the like, and as shown in FIG. The surface of the flattening layer 46 is polished flat.
【００３０】ＳＯＩ構造の半導体装置を製造するために
は、一方の半導体基板４２の表面に成膜しある平坦化層
４６の表面を研磨し、その研磨面に対し、図４（ｅ）に
示すように、他方の半導体基板４３の研磨面を張り合わ
せる。張り合わせ後には、同図（ｆ），（ｇ）に示すよ
うに、一方の半導体基板４２の表面を素子分離用段差部
分まで研磨することにより、絶縁膜４５上に分離された
半導体層４２ａを得る。このようなＳＯＩ構造を採用す
ることにより、ＳＲＡＭ、ＤＲＡＭおよびその他の半導
体装置の高集積化および高性能化などを実現できる。In order to manufacture a semiconductor device having an SOI structure, the surface of the flattening layer 46 formed on the surface of one semiconductor substrate 42 is polished, and the polished surface is shown in FIG. 4 (e). In this manner, the polishing surface of the other semiconductor substrate 43 is attached. After the bonding, as shown in FIGS. 6F and 6G, the surface of one semiconductor substrate 42 is polished to the step portion for element isolation, thereby obtaining the semiconductor layer 42a separated on the insulating film 45. . By adopting such an SOI structure, high integration and high performance of SRAM, DRAM and other semiconductor devices can be realized.
【００３１】本実施例の張り合わせ方法は、このような
ＳＯＩ構造の半導体装置を得るための一手段として用い
ることができる。すなわち、先ず、張り合わせ工程に先
立ち、半導体基板４２，４３の張り合わせ面の研磨を行
う。研磨に際しては、例えば、前述した図１に示す研磨
装置３６を用いることが好ましい。研磨装置３６による
半導体基板４２，４３の研磨が終了した後に、半導体基
板４２，４３の研磨面同士の水素結合力を十分に利用す
るため、研磨面の親水性処理を行うことが好ましい。親
水性処理は、まずフッ酸などで半導体基板４２，４３の
表面を洗浄し、その後直ちにアンモニア−過酸化水素水
混合液で処理することなどにより行われる。場合によっ
ては、フッ酸処理は省略しても良い。このような処理に
より、基板表面がＯＨリッチとなり、結合力が高まると
考えられる。The bonding method of this embodiment can be used as one means for obtaining a semiconductor device having such an SOI structure. That is, first, prior to the bonding step, the bonding surfaces of the semiconductor substrates 42 and 43 are polished. At the time of polishing, for example, it is preferable to use the above-described polishing apparatus 36 shown in FIG. After the polishing of the semiconductor substrates 42, 43 by the polishing device 36 is completed, it is preferable to perform hydrophilic treatment on the polished surfaces of the semiconductor substrates 42, 43 in order to fully utilize the hydrogen bonding force between the polished surfaces. The hydrophilic treatment is performed by first cleaning the surfaces of the semiconductor substrates 42 and 43 with hydrofluoric acid or the like, and then immediately treating with a solution of ammonia-hydrogen peroxide mixture. In some cases, the hydrofluoric acid treatment may be omitted. It is considered that such a treatment makes the substrate surface OH rich and enhances the bonding force.
【００３２】次に、図２（Ａ）に示すように、張り合わ
せる一方の半導体基板４２を、その平坦性を保持しつ
つ、しかも研磨面が上に位置するように、固定吸着保持
具４１でチャックする。このとき、半導体基板４３は所
定の伸びを有した状態で、固定吸着保持具４１に固定さ
れている。また、張り合わせる他方の半導体基板４３の
研磨面の裏面に、補強部材４４を真空密着させる。Next, as shown in FIG. 2 (A), one of the semiconductor substrates 42 to be bonded together is fixed by the fixed suction holder 41 so that the flatness thereof is maintained and the polishing surface is positioned above. Chuck. At this time, the semiconductor substrate 43 is fixed to the fixed suction holder 41 while having a predetermined extension. Further, the reinforcing member 44 is brought into vacuum contact with the back surface of the polishing surface of the other semiconductor substrate 43 to be bonded.
【００３３】そして、補強部材４４と共に半導体基板４
３を移動させて、半導体基板４３の研磨面を半導体基板
４２の研磨面に近づける。そして、これらの基板同士が
接触しない距離以上（例えば１ｍｍ）離れた位置で補強
部材４４が装着された半導体４３を半導体基板４２に向
かって落下させる。このとき、半導体基板４２と４３と
が数μｍの間隔になると、空気の粘性抵抗によって、半
導体基板４３が４２の上にわずかな間隔で浮上した状態
（フリーな状態）になる。これは、半導体基板４３と４
２間の静電気力等の作用も寄与していると考えられる。Then, together with the reinforcing member 44, the semiconductor substrate 4
3 is moved to bring the polishing surface of the semiconductor substrate 43 close to the polishing surface of the semiconductor substrate 42. Then, the semiconductor 43 to which the reinforcing member 44 is attached is dropped toward the semiconductor substrate 42 at a position separated by a distance (for example, 1 mm) or more where these substrates do not contact each other. At this time, when the distance between the semiconductor substrates 42 and 43 is several μm, the semiconductor substrate 43 floats above the 42 at a slight distance (free state) due to viscous resistance of air. This is the semiconductor substrate 43 and 4
It is considered that the action of electrostatic force between the two also contributes.
【００３４】そして、押圧部によって、半導体基板４３
の裏面の中央付近の一点を半導体基板４２に向かって押
圧し、当該押圧部を半導体基板４２に圧接する。これに
よって、半導体基板４２，４３相互間の張り合わせが、
当該押圧部から周縁部に向かって進行する。このとき、
未だ張り合わせが行われていない周縁部では、基板相互
間に数μｍの隙間を有し、この隙間に存在する空気によ
る反発力によって基板相互間に所定間隔を保持してい
る。従って、張り合わせが進行している過程において
は、半導体基板４３にはソリが生じており、半導体基板
４２はソリに応じて部分的に延ばされながら半導体基板
４２に張り合わされる。そのため、半導体基板４３に
は、半導体基板４３と接着後、縮もうとする力が働く。
本実施例では、半導体基板４３のソリは、補強部材４４
の厚みによって接着時のソリが調整される。Then, the semiconductor substrate 43 is pressed by the pressing portion.
A point in the vicinity of the center of the back surface of is pressed toward the semiconductor substrate 42, and the pressing portion is pressed against the semiconductor substrate 42. As a result, the bonding between the semiconductor substrates 42 and 43 is
It advances from the pressing portion toward the peripheral portion. At this time,
In the peripheral portion where the bonding is not performed yet, there is a gap of several μm between the substrates, and a predetermined gap is maintained between the substrates by the repulsive force of the air present in the gap. Therefore, warpage occurs in the semiconductor substrate 43 during the process of bonding, and the semiconductor substrate 42 is bonded to the semiconductor substrate 42 while being partially extended according to the warpage. Therefore, the semiconductor substrate 43 is subjected to a force of shrinking after being bonded to the semiconductor substrate 43.
In this embodiment, the warp of the semiconductor substrate 43 is caused by the reinforcing member 44.
The warp during bonding is adjusted by the thickness of the.
【００３５】そのため、半導体基板４２のソリを調整す
ることで、張り合わせの際に、半導体基板４３による伸
縮を抑制でき、結果として半導体基板４２のパターン伸
縮が抑制される。従って、パターンの微細化が進んだＬ
ＳＩに対しても、十分な張り合わせ精度を持つことが可
能となる。Therefore, by adjusting the warp of the semiconductor substrate 42, expansion and contraction by the semiconductor substrate 43 can be suppressed at the time of bonding, and as a result, pattern expansion and contraction of the semiconductor substrate 42 can be suppressed. Therefore, L, which has a finer pattern
It is possible to have sufficient bonding accuracy even for SI.
【００３６】半導体基板４２，４３相互間の水素結合に
よる張り合わせが完全に終了すると、半導体基板４３か
ら補強部材４４が外され、次に、固定吸着保持具４１に
よる半導体基板４２の吸着が解除され、張り合わせが完
了する。When the bonding by hydrogen bonding between the semiconductor substrates 42 and 43 is completed, the reinforcing member 44 is removed from the semiconductor substrate 43, and then the suction of the semiconductor substrate 42 by the fixed suction holder 41 is released. The pasting is completed.
【００３７】上述したように、本実施例の張り合わせ方
法によれば、張り合わせを行う半導体基板の伸びを高精
度に制御できる。その結果、半導体基板４２の張り合わ
せを高精度に行うことができ、張り合わせに伴うパター
ンズレに起因する歩留りの低下を抑制できる。また、微
細化が進ＬＳＩの製造にも有効に対応できる。As described above, according to the bonding method of this embodiment, the elongation of the semiconductor substrate to be bonded can be controlled with high accuracy. As a result, it is possible to bond the semiconductor substrates 42 with high accuracy, and it is possible to suppress a decrease in yield due to a pattern shift due to the bonding. Further, miniaturization can effectively deal with the manufacture of advanced LSI.
【００３８】次に、本発明の張り合わせ方法のその他の
実施例について説明する。図２（Ｂ）は、本発明の張り
合わせ方法のその他の実施例を説明するための概略断面
図である。図２（Ｂ）に示すように、本実施例では、半
導体基板４３の一方の面に酸化膜５１を積層し、この酸
化膜５１の厚みを適切に調整することで、酸化膜５１の
剛性によって半導体基板４３のソリを制御する。酸化膜
５１は、張り合わせ終了後に除去されても良いが、デバ
イスの種類によっては、そのまま残しても良い。本実施
例によっても、前述した実施例の同様の効果を得ること
ができる。本実施例では、酸化膜５１以外に、窒化膜、
その他の膜を用いてもよい。Next, another embodiment of the laminating method of the present invention will be described. FIG. 2 (B) is a schematic sectional view for explaining another embodiment of the bonding method of the present invention. As shown in FIG. 2B, in this embodiment, the oxide film 51 is laminated on one surface of the semiconductor substrate 43, and the thickness of the oxide film 51 is appropriately adjusted, so that the rigidity of the oxide film 51 can be improved. The warpage of the semiconductor substrate 43 is controlled. The oxide film 51 may be removed after the bonding is completed, but may be left as it is depending on the type of device. According to this embodiment, the same effect as that of the above-described embodiment can be obtained. In this embodiment, in addition to the oxide film 51, a nitride film,
Other films may be used.
【００３９】また、上述した実施例では、基板相互間の
張り合わせを押圧手段による押圧力によって進行させた
が、例えば、磁力発生装置からの磁力によって基板相互
間の張り合わせを進行させてもよい。Further, in the above-mentioned embodiment, the bonding between the substrates is promoted by the pressing force of the pressing means, but the bonding between the substrates may be promoted by the magnetic force from the magnetic force generator.
【００４０】[0040]
【発明の効果】本発明の研磨装置および研磨方法によれ
ば、半導体基板をパッドに高精度な平坦性を有して吸着
できる。その結果、半導体基板の研磨を高精度に行うこ
とが可能になり、厚さのバラツキが少なく、ダメージの
少ない高精度な平坦面を有する半導体基板を得ることが
できる。また、本発明の研磨装置および研磨方法によれ
ば、移動手段の振れによる研磨の影響を低減できる。ま
た、本発明の張り合わせ方法によれば、張り合わせ時に
おける第２の基板の伸縮を適切に制御できる。そのた
め、張り合わせ時において、基板に形成されたパターン
が次工程においてズレることを防止でき、当該ズレによ
る歩留り低下を抑制できる。その結果、微細化が進むＬ
ＳＩに対応した張り合わせを行うことができる。According to the polishing apparatus and the polishing method of the present invention, a semiconductor substrate can be adsorbed on a pad with high precision flatness. As a result, it is possible to polish the semiconductor substrate with high accuracy, and it is possible to obtain a semiconductor substrate having a highly accurate flat surface with less variation in thickness and less damage. Further, according to the polishing apparatus and the polishing method of the present invention, it is possible to reduce the influence of polishing due to the shake of the moving means. Further, according to the bonding method of the present invention, expansion and contraction of the second substrate during bonding can be appropriately controlled. Therefore, at the time of bonding, the pattern formed on the substrate can be prevented from shifting in the next step, and the yield reduction due to the shifting can be suppressed. As a result, L is becoming smaller
Bonding corresponding to SI can be performed.
【図１】（Ａ）は本発明の一実施例に係わる研磨装置に
用いられる可動吸着保持具を説明するための概略断面
図、（Ｂ）は（Ａ）に示す可動吸着保持具を用いた本実
施例の研磨装置を説明するための概略断面図である。1A is a schematic sectional view for explaining a movable suction holder used in a polishing apparatus according to an embodiment of the present invention, and FIG. 1B is a movable suction holder shown in FIG. It is a schematic sectional drawing for demonstrating the polishing device of a present Example.
【図２】（Ａ）は本発明の実施例に係わる張り合わせ方
法を説明するための概略断面図、（Ｂ）は本発明の実施
例に係わる張り合わせ方法のその他の例を説明するため
の図である。FIG. 2A is a schematic sectional view for explaining a bonding method according to an embodiment of the present invention, and FIG. 2B is a view for explaining another example of a bonding method according to the embodiment of the present invention. is there.
【図３】（ａ）〜（ｄ）は、本発明の実施例に係わる張
り合わせ方法を用いてＳＯＩ構造の半導体装置を製造す
る例を示す要部断面図である。FIGS. 3A to 3D are cross-sectional views of essential parts showing an example of manufacturing a semiconductor device having an SOI structure by using a bonding method according to an embodiment of the present invention.
【図４】（ｅ）〜（ｇ）は、本発明の実施例に係わる張
り合わせ方法を用いてＳＯＩ構造の半導体装置を製造す
る例を示す要部断面図である。FIGS. 4 (e) to 4 (g) are cross-sectional views of essential parts showing an example of manufacturing a semiconductor device having an SOI structure by using the bonding method according to the embodiment of the present invention.
【図５】（Ａ）〜（Ｃ）は従来の研磨装置を説明するた
めの図である。5A to 5C are views for explaining a conventional polishing apparatus.
【図６】（Ａ）〜（Ｃ）は従来の張り合わせ装置を説明
するための図である。6A to 6C are views for explaining a conventional laminating apparatus.
【図７】従来の張り合わせ装置のその他の例を説明する
ための図である。FIG. 7 is a diagram for explaining another example of the conventional laminating apparatus.
３０・・・可動吸着保持具 ３１、４２、４３・・・半導体基板 ３２・・・パッド ３３・・・多孔質剛性部材 ３４・・・ガイド部 ３５・・・通孔 ３７・・・研磨用パッド ３８・・・研磨用定磐 ４４・・・補強部材 ４１・・・固定吸着保持具 ５１・・・酸化膜 30 ... Movable suction holding tool 31, 42, 43 ... Semiconductor substrate 32 ... Pad 33 ... Porous rigid member 34 ... Guide part 35 ... Through hole 37 ... Polishing pad 38 ... Polishing vane 44 ... Reinforcing member 41 ... Fixed adsorption holder 51 ... Oxide film
Claims (5)
る研磨装置において、 多孔質弾性部材で構成され、前記半導体基板の裏面を吸
着するパッドと、 前記パッドに装着された多孔質剛性部材と、 前記パッドに前記半導体基板が吸着されるように前記多
孔質剛性部材側から真空吸引力を供給する吸引手段と、 前記半導体基板の表面を研磨する研磨手段とを有する研
磨装置。1. A polishing apparatus for polishing the surface of a semiconductor substrate to form a mirror surface, comprising: a pad made of a porous elastic member for adsorbing the back surface of the semiconductor substrate; and a porous rigid member mounted on the pad. And a suction means for supplying a vacuum suction force from the side of the porous rigid member so that the semiconductor substrate is attracted to the pad, and a polishing means for polishing the surface of the semiconductor substrate.
る研磨方法において、 多孔質弾性部材で構成されるパッドの一方の面から供給
された真空吸引力によって、前記パッドの他方の面に半
導体基板の裏面を吸着し、 前記パッドに吸着された前記半導体基板の表面と、研磨
手段とを接触させ、前記半導体基板の表面と前記研磨手
段とを相対的に移動させて前記半導体基板の表面を研磨
する研磨方法。2. A polishing method for polishing a surface of a semiconductor substrate to form a mirror surface, wherein a vacuum suction force supplied from one surface of a pad made of a porous elastic member causes the other surface of the pad to be polished. The back surface of the semiconductor substrate is adsorbed, the surface of the semiconductor substrate adsorbed to the pad is brought into contact with a polishing means, and the surface of the semiconductor substrate and the polishing means are moved relatively to each other to the surface of the semiconductor substrate. Polishing method for polishing.
合わせ基板を製造するための張り合わせ方法において、 第１の基板を第１の吸着手段に吸着固定し、 第２の基板に強度を持たせて基板のソリを制御する補強
手段を第２の基板の一方の面に装着し、 前記補強手段が装着された第２の基板の他方の面を、第
１の基板の表面で浮かせ、前記第１の基板の表面と前記
第２の基板の他方の面とを徐々に接合する張り合わせ方
法。3. A laminating method for producing a laminated substrate by laminating at least two substrates, wherein the first substrate is adsorbed and fixed to the first adsorption means, and the second substrate is made to have strength. The reinforcing means for controlling the warp of the second substrate is mounted on one surface of the second substrate, and the other surface of the second substrate on which the reinforcing means is mounted is floated on the surface of the first substrate, A bonding method for gradually bonding the surface of the substrate and the other surface of the second substrate.
る請求項３に記載の張り合わせ方法。4. The laminating method according to claim 3, wherein the reinforcing means is a fluororesin chuck.
面に成膜された膜である請求項３に記載の張り合わせ方
法。5. The bonding method according to claim 3, wherein the reinforcing means is a film formed on one surface of the second substrate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10865194A JP3463345B2 (en) | 1994-05-23 | 1994-05-23 | Polishing apparatus, polishing method and bonding method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP10865194A JP3463345B2 (en) | 1994-05-23 | 1994-05-23 | Polishing apparatus, polishing method and bonding method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH07320995A true JPH07320995A (en) | 1995-12-08 |
| JP3463345B2 JP3463345B2 (en) | 2003-11-05 |
Family
ID=14490221
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP10865194A Expired - Fee Related JP3463345B2 (en) | 1994-05-23 | 1994-05-23 | Polishing apparatus, polishing method and bonding method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP3463345B2 (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0857541A3 (en) * | 1997-02-06 | 1999-02-03 | Speedfam Co., Ltd. | Chemical and mechanical polishing apparatus |
| KR19990024436A (en) * | 1997-09-02 | 1999-04-06 | 윤종용 | Chemical mechanical polishing equipment |
| JP2000006003A (en) * | 1998-04-21 | 2000-01-11 | Asahi Glass Co Ltd | Method and apparatus for pressing plate material |
| WO2002056352A1 (en) * | 2001-01-15 | 2002-07-18 | Lintec Corporation | Bonding apparatus, and bonding method |
| CN110690157A (en) * | 2018-07-06 | 2020-01-14 | 普因特工程有限公司 | Micro LED Transfer Head |
-
1994
- 1994-05-23 JP JP10865194A patent/JP3463345B2/en not_active Expired - Fee Related
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0857541A3 (en) * | 1997-02-06 | 1999-02-03 | Speedfam Co., Ltd. | Chemical and mechanical polishing apparatus |
| US6030488A (en) * | 1997-02-06 | 2000-02-29 | Speedfam Co., Ltd. | Chemical and mechanical polishing apparatus |
| KR19990024436A (en) * | 1997-09-02 | 1999-04-06 | 윤종용 | Chemical mechanical polishing equipment |
| JP2000006003A (en) * | 1998-04-21 | 2000-01-11 | Asahi Glass Co Ltd | Method and apparatus for pressing plate material |
| WO2002056352A1 (en) * | 2001-01-15 | 2002-07-18 | Lintec Corporation | Bonding apparatus, and bonding method |
| GB2375733A (en) * | 2001-01-15 | 2002-11-27 | Lintec Corp | Bonding apparatus, and bonding method |
| GB2375733B (en) * | 2001-01-15 | 2004-11-03 | Lintec Corp | Laminating apparatus and laminating method |
| US6951593B2 (en) | 2001-01-15 | 2005-10-04 | Lintec Corporation | Laminating device and laminating method |
| CN110690157A (en) * | 2018-07-06 | 2020-01-14 | 普因特工程有限公司 | Micro LED Transfer Head |
Also Published As
| Publication number | Publication date |
|---|---|
| JP3463345B2 (en) | 2003-11-05 |
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