JPH07335152A - Image forming method and apparatus - Google Patents

Abstract

(57) [Abstract] [Purpose] An image forming method for correcting a non-uniform electron emission caused by wiring resistance of a surface conduction electron-emitting device so as to be uniform, and forming a high-quality image, and its method. Provide a device. [Configuration] The width of the wiring in the row direction is set to Dx1, Dx2, Dx
3 ,. ． ． , Dxm, in that order. Similarly, the width of the wiring in the column direction is set to Dy1, Dy2, Dy3 ,. ． ． , Dym
In order, make it thicker. Then, by applying a predetermined voltage between predetermined Dx and Dy, the selected electron source 7
The corrected amount of electrons is emitted from 4.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention relates to an image forming apparatus, and more particularly to
The present invention relates to an image forming method and apparatus including a large number of surface conduction electron-emitting devices.

[0002]

2. Description of the Related Art Conventionally, two types of electron-emitting devices are known, a thermoelectron source and a cold cathode electron source. The cold cathode electron source includes a field emission type (hereinafter abbreviated as FE type), metal / insulating layer /
There are a metal type (hereinafter abbreviated as MIM type), a surface conduction electron-emitting device (hereinafter abbreviated as SCE), and the like.

The following documents are known as documents describing the FE type example.

1 WPDyke & WWDolan, “Field emiss
ion ”, Advance in ElectronPhysics, 8, 89 (1956); 2 CASpindt,“ PHYSICAL Properties of thin-film
field emissioncathodes with molybdenium cones ”,
J.Appl.Phys., 47, 5248 (1976) Further, as a document regarding the example of the MIM type, CAMead, “The tunnel-emission amplifier, J.Appl.Ph.
ys., 32, (1961) is known.

References relating to SCE type examples include M.I. Ellinson, Radio Eng. Electron Phy., 10, (1965).

The SCE type utilizes a phenomenon in which electron emission occurs when a current is passed through a thin film having a small area formed on a substrate in parallel with the film surface. As the surface conduction electron-emitting device, one using the Sn02 thin film by the above-mentioned MI Ellison, one using the Au thin film [G.
Dittmer: “Thin Solid Films”, 9, 317 (1972)], In2
O3 / SnO2 thin film [M.Hartwell and CGFons
tad: “IEEETrans. ED Conf.”, 519 (1975)], by a carbon thin film [Haraki Araki et al .: Vacuum ,. Volume 26, Volume 1
No., p. 22 (1983)] and the like are reported.

As a typical device configuration of these surface conduction type emission devices, the above-mentioned M. FIG. 20 shows a device configuration according to the document of M. Hartwell. In FIG. 20, 5
01 is an insulating substrate. Reference numeral 502 denotes a thin film for forming an electron emitting portion, which is formed of a metal oxide thin film or the like formed by sputtering on an H-shaped pattern, and the electron emitting portion 503 is formed by an energization process called forming described later.
504 will be referred to as a thin film including an electron emitting portion. 5
02 is an element electrode.

Conventionally, in these surface conduction electron-emitting devices, the electron-emitting portion forming thin film 502 is generally formed with an electron-emitting portion 503 by an energization process called forming before the electron emission. Met. That is, the forming means the thin film 5 for forming the electron emitting portion.
A voltage is applied across both ends of 02 to locally destroy, deform or alter the electron emission part forming thin film to form the electron emission part 503 in an electrically high resistance state. In the electron emitting portion 503, a crack is generated in a part of the electron emitting portion forming thin film 502, and electrons are emitted from the vicinity of the crack. Hereinafter, the electron emitting portion forming thin film 502 including the electron emitting portion formed by forming is referred to as a thin film 504 including an electron emitting portion. The surface-conduction type electron-emitting device that has undergone the forming process is one in which electrons are emitted from the electron-emitting unit 503 described above by applying a voltage to the thin film 504 including the electron-emitting unit and applying a current to the device. . However, although these conventional surface conduction electron-emitting devices have various problems in practical use, the present applicants have studied various improvements as will be described later and made practical use of them. It has solved various problems.

The above-mentioned surface conduction electron-emitting device has an advantage that a large number of devices can be arranged over a large area because it has a simple structure and is easy to manufacture. Therefore, various applications that can make full use of this feature are being researched. For example, a charged beam source, a forming device, etc. may be mentioned. An example of arranging a large number of surface-conduction type electron-emitting devices is an electron source in which surface-conduction type electron-emitting devices are arranged in parallel, and a large number of rows in which both ends of each element are connected by wiring are arranged (for example, , JP-A-1-031332). Further, in particular, in image forming apparatuses such as forming apparatuses, in recent years, flat plate type forming apparatuses using liquid crystal have become popular in place of CRTs, but since they are not self-luminous, they must have a backlight or the like. Therefore, the development of a self-luminous forming apparatus has been desired. An image forming apparatus, which is a combination of an electron source having a large number of surface-conduction type emission elements and a phosphor that emits visible light by electrons emitted from the electron source, is relatively easy to use even in a large-screen apparatus. It is a self-luminous forming apparatus that can be manufactured and is excellent in forming quality.

[0010]

Needless to say, high-definition and high-definition images are desired in various image-forming panels to which surface conduction electron-emitting devices are applied, including the above-mentioned flat panel CRT. To realize this, for example, a large number of surface conduction electron-emitting devices with simple matrix wiring are used. For this reason, an extremely large number of device arrays in which the number of rows and columns reaches hundreds to thousands are required, and it is desired that each surface conduction electron-emitting device has uniform electron emission characteristics.

However, when these elements are applied to an image forming apparatus, the surface conduction type is formed by m row direction (or X direction) wirings and n column direction (or Y direction) wirings. In the case where a simple matrix configuration is adopted in which a pair of device electrodes facing each other of the electron-emitting device are respectively connected to form an electron source in which a large number of surface-conduction type electron-emitting devices are arranged in a matrix, in a row direction and a column direction. Due to the voltage effect generated by the wiring resistance in the direction, the voltage applied to each element electrode varies. As a result, the effective voltage applied to each element varies. Since the surface conduction electron-emitting device is driven by current, not by voltage, which is the case with liquid crystal, the influence of wiring resistance is significant when line driven.

FIG. 16, FIG. 17, and FIG. 18 are diagrams for explaining this problem in more detail. FIG. 16 is a plan view showing a part of the electron source, and FIG. 17 is a view showing an electron-emitting device and wiring resistance. FIG. 18 is a diagram showing a voltage applied to each electron-emitting device electrode when driving all electron-emitting devices connected to a certain line in the row direction. In FIG. 18, the column on the horizontal axis is the column wiring number (1, 2, 3, ..., N) connected to each electron-emitting device, and is connected to a certain line in the row direction. Device number (D
1, D2, D3, ..., Dn).

FIG. 16 shows an m × n simple matrix circuit in which a voltage Vin of the same potential is applied to n Y-direction wirings DY1, DY2, ..., DYn, and m X-direction wirings DXn.
Shows the characteristics when the is grounded. Further, the row wiring and the column wiring are assumed to have a resistance component of rx and ry in each element.

Incidentally, in the image forming apparatus, the pixels which are the targets of the electron beam are usually arranged at an equal pitch.
The electron-emitting devices are also arranged at equal intervals in the row direction and the column direction. Therefore, by suppressing variations in the width and film thickness of the wiring during manufacturing, it can be expected that the element units have the same resistance value in the row direction and the column direction. In addition, all electron-emitting devices have substantially the same resistance value.

FIG. 18 shows the voltage drop at the position of each electron source caused by the resistance distribution when a voltage is supplied to each wiring. Here, the voltage drop corresponding to each column of the first row and the m-th row is shown.

As is apparent from FIG. 18, in the case of the circuit as shown in FIG. 17, the larger the voltage is applied to the element closer to the voltage application terminal, the smaller the applied voltage is to the element farther from the voltage application terminal. Therefore, the applied voltage varies.

Furthermore, since the wiring in the m-th row is longer than that in the first row, that is, the resistance is high, the voltage drops more.

Due to the variation of the applied voltage due to the wiring resistance, the element characteristics of the surface conduction electron-emitting device formed after the forming and the variation of the applied voltage of the forming vary the electron emission characteristics of the respective elements. That is, in general, an element closer to the forming voltage applying terminal has an applied electric field-
The electron emission efficiency is good, and the efficiency becomes worse as the distance from the voltage application terminal increases.

Further, even if the forming voltage application is corrected in advance to form a surface conduction electron-emitting device having no variation, due to the influence of the voltage drop caused by the wiring resistance,
It was not possible to realize uniform and stable electron emission.

The present invention relates to an image forming method for forming a high quality image by correcting non-uniform electron emission caused by wiring resistance of a surface conduction electron-emitting device so as to be uniform, and its method. The purpose is to provide a device.

[0021]

In order to achieve the above object, an image forming method and apparatus of the present invention have the following constitutions. That is, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected to a wiring in the row direction and laid out in the same column. The other terminal of the surface conduction electron-emitting device is connected to a wiring in the column direction, and the wiring in the row direction is m wirings Dx1, D in the row direction.
x2, ..., Dxm, and the column-direction wirings are the column-direction wirings Dy1, Dy2, ... In the image forming apparatus including n column-direction wirings Dy1, Dy2, ..., Dyn. .., Dyn
Are set in order from low resistance value to high resistance value,
Drive means for driving the wiring in the row direction and the wiring in the column direction based on an image signal to drive the corresponding surface conduction electron-emitting device, and output from the driven surface conduction electron-emitting device. Light emitting means for emitting light by the emitted electrons.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming apparatus including: the wiring Dx in the row direction
1, Dx2, ..., Dxm are sequentially set from low resistance values to high resistance values, and the row-direction wirings and the column-direction wirings are driven based on an image signal to correspond to the corresponding resistances. A driving unit for driving the surface conduction electron-emitting device and a light emitting unit for emitting light by electrons output from the driven surface conduction electron-emitting device are provided.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming apparatus including: the wiring Dy in the column direction
1, Dy2, ..., Dyn are sequentially set from a low resistance value to a high resistance value, and the wirings Dx1, Dx2, ..., In the row direction are set.
Dxm is set to a low resistance value to a high resistance value, respectively, in order, and drives the row-direction wiring and the column-direction wiring based on an image signal to drive the corresponding surface conduction electron-emitting device. And a light emitting unit that emits light by electrons output from the driven surface conduction electron-emitting device.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row has a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming method, the wiring Dy in the column direction is provided.
1, Dy2, ..., Dyn are sequentially set from a low resistance value to a high resistance value, and the row-direction wiring and the column-direction wiring are driven based on an image signal, and the corresponding A driving process of driving the surface conduction electron-emitting device and a light emitting process of emitting light by electrons output from the driven surface conduction electron-emitting device are provided.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix form, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming method, the wiring Dx in the row direction is provided.
1, Dx2, ..., Dxm are sequentially set from low resistance values to high resistance values, and the row-direction wirings and the column-direction wirings are driven based on an image signal to correspond to the corresponding resistances. A driving process of driving the surface conduction electron-emitting device and a light emitting process of emitting light by electrons output from the driven surface conduction electron-emitting device are provided.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row has a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming method, the wiring Dy in the column direction is provided.
1, Dy2, ..., Dyn are sequentially set from a low resistance value to a high resistance value, and the wirings Dx1, Dx2, ..., In the row direction are set.
Dxm is set to a low resistance value to a high resistance value, respectively, in order, and drives the row-direction wiring and the column-direction wiring based on an image signal to drive the corresponding surface conduction electron-emitting device. And a light emitting step of emitting light by electrons output from the driven surface conduction electron-emitting device.

[0027]

In the above structure, a plurality of surface conduction electron-emitting devices are laid out in a matrix, and one terminal of the surface conduction electron-emitting devices laid out in the same row is connected to the wiring in the row direction. , The other terminals of the surface conduction electron-emitting devices laid out in the same column are connected to wirings in the column direction, and the wirings in the row direction are m wirings in the row direction Dx1, Dx2 ,. In the image forming apparatus including the Dxm wirings and the column-direction wirings including n column-direction wirings Dy1, Dy2, ..., Dyn, the column-direction wirings Dy1,
Dy2, ..., Dyn are set in order from a low resistance value to a high resistance value, and the row-direction wiring and the column-direction wiring are driven based on an image signal, and the corresponding surface conduction is performed. The electron-emitting device is driven by the driving means, and the light-emitting means
Light is emitted by the electrons output from the driven surface conduction electron-emitting device.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming apparatus including: the wiring Dx in the row direction
1, Dx2, ..., Dxm are sequentially set from low resistance values to high resistance values, and the row-direction wirings and the column-direction wirings are driven based on an image signal to correspond to the corresponding resistances. The driving unit drives the surface conduction electron-emitting device, and the light emitting unit emits light by the electrons output from the driven surface conduction electron-emitting device.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row has a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming apparatus including: the wiring Dy in the column direction
1, Dy2, ..., Dyn are sequentially set from a low resistance value to a high resistance value, and the wirings Dx1, Dx2, ..., In the row direction are set.
Dxm is sequentially set from a low resistance value to a high resistance value, and based on an image signal, the row-direction wiring and the column-direction wiring are driven to cause the corresponding surface conduction electron-emitting device to The driving means is driven, and the light emitting means emits light by the electrons output from the driven surface conduction electron-emitting device.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming method, the wiring Dy in the column direction is provided.
1, Dy2, ..., Dyn are sequentially set from a low resistance value to a high resistance value, and the row-direction wiring and the column-direction wiring are driven based on an image signal, and the corresponding The surface conduction electron-emitting device is driven to emit light by the electrons output from the driven surface conduction electron-emitting device.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix form, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is a wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming method, the wiring Dx in the row direction is provided.
1, Dx2, ..., Dxm are sequentially set from low resistance values to high resistance values, and the row-direction wirings and the column-direction wirings are driven based on an image signal to correspond to the corresponding resistances. The surface conduction electron-emitting device is driven to emit light by the electrons output from the driven surface conduction electron-emitting device.

According to another invention, a plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row has wiring in a row direction. The other terminals of the surface conduction electron-emitting devices that are connected and laid out in the same column are connected to the wiring in the column direction, and the wiring in the row direction is m wirings in the row direction Dx1, Dx2 ,. , Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy2, ..., Dyn.
In the image forming method, the wiring Dy in the column direction is provided.
1, Dy2, ..., Dyn are sequentially set from a low resistance value to a high resistance value, and the wirings Dx1, Dx2, ..., In the row direction are set.
Dxm is set to a low resistance value to a high resistance value, respectively, in order, and drives the row-direction wiring and the column-direction wiring based on an image signal to drive the corresponding surface conduction electron-emitting device. Then, light is emitted by the electrons output from the driven surface conduction electron-emitting device.

[0033]

EXAMPLES Among the surface conduction electron-emitting devices, the present inventors prefer that the electron-emitting portion or its peripheral portion is formed of a fine particle film in terms of characteristics or for manufacturing a large number over a large area. Have found.

Therefore, in the following description of the embodiments of the present invention, an image display device using a surface conduction electron-emitting device formed by using a fine particle film as a multi-beam source is a preferable example of the image forming device of the present invention. As described below.

First, the points of the image forming method and apparatus of this embodiment according to the present invention will be summarized.

The image forming method and apparatus according to the present embodiment are configured so that the wiring resistance at an arbitrary position viewed from the drive voltage applying terminal is made substantially constant by the method described below, so that each of them can be driven at the time of driving. It is possible to reduce variations in the voltage applied to the element and perform high-quality image formation.

That is, with respect to the surface conduction electron-emitting devices arranged and wired in a matrix, the number of row wirings is n and the number of column wirings is n, the resistivity of the column wiring material is ρ, and the column wiring width is w. When the column wiring thickness is d and the resistance per element of the row wiring is rx, the resistance R is from the row end of the m / 2th row to each signal wiring end.
, R = N · rx + ρ / (wd ·) = constant (N = 1, 2,
3, ..., n) so that the resistivity of the column wiring material of each column wiring, the column wiring width,
By adjusting the column wiring thickness, etc., the applied voltage applied to the surface conduction electron-emitting device is corrected to be almost uniform,
Correspondingly, the electron emission amount is made uniform, so that a stable and high-quality image can be formed.

[Embodiment 1] A preferred embodiment of the present invention will be described below with reference to the accompanying drawings.

First, the outline and manufacturing method of the surface conduction electron-emitting device according to this embodiment will be described.

The features of the structure and manufacturing method of the surface conduction electron-emitting device according to this embodiment are as follows. Please refer to FIG. 2 below. 1) The electron emission portion forming thin film 202 before energization processing called forming is a thin film made of fine particles formed by dispersing a fine particle dispersion, or a thin film made of fine particles formed by heating and burning an organic metal or the like. , Basically composed of fine particles.

2) The thin film 204 including the electron emitting portion after energization processing called forming is basically composed of fine particles including the electron emitting portion 203. Board 201
Examples thereof include quartz glass, glass having a reduced content of impurities such as Na, soda lime glass, a glass substrate in which SiO2 is laminated on soda lime glass by sputtering or the like, a ceramic such as alumina, a silicon substrate, and the like.

There are two basic configurations of the surface conduction electron-emitting device according to this embodiment, that is, a planar type and a vertical type. First, the planar surface conduction electron-emitting device will be described.

FIGS. 3 (a) and 3 (b) are a plan view and a sectional view, respectively, showing the structure of a basic planar surface conduction electron-emitting device according to this embodiment. The basic configuration of the element according to this embodiment will be described with reference to FIG.

In FIG. 3, 201 is a substrate, and 205 and 2
Reference numeral 06 is a device electrode, 204 is a thin film including an electron emitting portion, 20
3 is an electron emitting portion.

The material of the opposing device electrodes 205 and 206 is basically one having excellent conductivity, for example, N.
i, Cr, Au, Mo, W, Pt, Ti, Al, Cu,
Metals or alloys such as Pd and Pd, Ag, Au, RuO
2, a printed conductor composed of a metal such as Pd-Ag or a metal oxide and glass, a transparent conductor such as In2O3-SnO2, and a semiconductor material such as polysilicon.

The element electrode spacing L1 is, for example, several hundred angstroms to several hundreds of micrometers, and is a photolithography technique which is the basis of the manufacturing method of the element electrodes, that is,
It is set depending on the performance of the exposure device and the etching method, the voltage applied between the device electrodes, the electric field strength capable of emitting electrons, and the like, but it is preferably 1 μm to 10 μm. Device electrode length W1, device electrode 20
The film thickness d of 5,206 is the resistance value of the electrode, the above-mentioned X, Y
The device electrode length W1 is normally several micrometers to several hundreds of micrometers, which is appropriately designed in consideration of the connection with the wiring and the arrangement of a large number of electron sources, and the film thickness of the device electrodes 205 and 206. d is preferably from a few hundred angstroms to a few micrometers.

The opposing element electrodes 205 provided on the substrate 201, between the element electrodes 206 and between the element electrodes 205, 2
The thin film 204 including the electron emitting portion, which is installed on the substrate 06, includes the electron emitting portion 203. 3B shows the case where the thin film 204 including the electron emitting portion is provided on the device electrodes 205 and 206, but the thin film 204 including the electron emitting portion is not provided on the device electrodes 205 and 206. There is also. That is, it is a case where the electron emission part forming thin film 202 is laminated on the substrate 201, and then the opposing device electrodes 205 and 206 are laminated in this order.

In addition, depending on the manufacturing method, the entire space between the opposing device electrodes 205 and 206 may function as an electron emitting portion. The film thickness of the thin film 204 including the electron emitting portion is from several angstroms to several thousand angstroms,
It is preferably several tens angstroms to 200 angstroms, and the step coverage to the device electrodes 205 and 206, the electron emission portion 203 and the device electrodes 205 and 206.
It is set as appropriate according to the resistance value between them, the particle size of the conductive fine particles of the electron emission portion 203, the energization processing conditions described later, and the like. The resistance value shows a sheet resistance value of 10 3 to 10 7 Ω / □.

Pd, Ru, Ag, Au, and T will be given as specific examples of the material constituting the thin film 204 including the electron emitting portion.
i, In, Cu, Cr, Fe, Zn, Sn, Ta, W,
Metals such as Pd, PdO, SnO2, In2O3, PbO,
Oxides such as Sb2O3, HfB2, ZrB2, LaB6, C
boride such as eB6, YB4, GdB4, TiC, ZrC,
Carbides such as HfC, TaC, SiC, WC, TiN, Z
Examples include nitrides such as rN and HfN, semiconductors such as Si and Ge, carbon, AgMg, NiCu, Pb and Sn.
These consist of fine particle films.

The fine particle film described here is a film in which a plurality of fine particles are aggregated, and its fine structure is not only in a state in which the fine particles are individually dispersed but also in a state in which the fine particles are adjacent to each other or overlap each other ( (Including island-shaped) film.

The electron emitting portion 203 is composed of a large number of conductive fine particles having a particle diameter of several angstroms to several thousand angstroms, preferably 10 angstroms to 200 angstroms, and the thickness of the thin film 204 including the electron emitting portion, which will be described later. It depends on the manufacturing method such as energization processing conditions and is appropriately set. It is the same as some or all of the elements of the material forming the thin film 204 including the electron emitting portion. <Basic Manufacturing Method> Various methods are conceivable as a method of manufacturing the surface conduction electron-emitting device having the electron emitting portion 203, and one example thereof is shown in FIG. Reference numeral 202 denotes a thin film for forming an electron emitting portion, which is, for example, a fine particle film.

Hereinafter, the manufacturing method will be described step by step with reference to FIG.
And it demonstrates based on FIG.

1) After thoroughly cleaning the substrate 201 with a detergent, pure water and an organic solvent, after depositing an element electrode material by a vacuum evaporation technique, a sputtering method or the like, an element is formed on the surface of the substrate 201 by a photolinography technique. Electrodes 205, 20
6 is formed ((a) of FIG. 2).

2) An organometallic thin film is formed by applying an organometallic solution between the element electrodes 205 and 206 provided on the substrate 201 and on the substrate on which the element electrodes 205 and 206 are formed, and leaving it to stand. To form. The organometallic solution means Pd, Ru, Ag, Au, Ti, I
It is a solution of an organic compound containing a metal such as n, Cu, Cr, Fe, Zn, Sn, Ta, W, or Pb as a main element. After that, the organic metal thin film is heated and baked, and patterned by lift-off, etching, etc. to form a thin film 202 for forming an electron emission portion (FIG. 2B).

Although the coating method of the organic metal solution is used here, the method is not limited to this, and the vacuum deposition method,
It may be formed by a sputtering method, a chemical vapor deposition method, a dispersion coating method, a dipping method, a spinner method, or the like.

3) Subsequently, energization processing called forming is performed. Here, between the device electrodes 205 and 206,
When the energization process with a pulsed voltage from a power source (not shown) is performed, an electron emitting portion 203 having a changed structure is formed in the portion of the electron emitting portion forming thin film 202 ((c) of FIG. 2).

By this energization treatment, the thin film 202 for forming the electron emitting portion is locally destroyed, deformed or altered.
The portion of which the structure is changed by forming is called an electron emitting portion 203. As described above, the electron emitting portion 203 is composed of conductive fine particles.

Next, the voltage waveform of the forming process will be described with reference to FIG.

In FIG. 4, T1 and T2 are the pulse width and pulse interval of the voltage waveform, respectively. For example, T1
Is 1 microsecond to 10 milliseconds, T2 is 10 microseconds to 100 milliseconds, the peak value of the triangular wave (peak voltage during forming) is about 4V to 10V, and the forming process is about several tens of seconds in a vacuum atmosphere. Select as appropriate.

When forming the electron emitting portion described above,
The forming process is performed by applying a triangular wave pulse between the electrodes of the element, but the waveform applied between the electrodes of the element is not limited to the triangular wave, and a desired waveform such as a rectangular wave may be used. Further, the peak value, the pulse width, the pulse interval, etc. are not limited to the above values, and it goes without saying that a desired value is selected if the electron emitting portion is formed well. <Basic Characteristics> Next, a method for evaluating the characteristics of the surface conduction electron-emitting device according to this example, which is produced by the above device structure and manufacturing method, will be described with reference to FIG.

FIG. 5 is a schematic configuration diagram of a measurement / evaluation apparatus for measuring electron emission characteristics of the surface conduction electron-emitting device having the configuration shown in FIG.

In FIG. 5, 201 is a substrate, 205 and 206 are device electrodes, 204 is a thin film including an electron emitting portion, 2
Reference numeral 03 is an electron emitting portion. Reference numeral 231 denotes a power supply, which applies a device voltage Vf to the device. An ammeter 230 measures the device current If flowing through the thin film 204 including the electron emitting portion between the device electrodes 205 and 206. Reference numeral 234 denotes an anode electrode, which is an emission current Ie emitted from the electron emission unit 203.
To capture. 233 is a high-voltage power supply, and the anode electrode 2
A voltage is applied to 34. 232 is an ammeter that measures the emission current Ie emitted from the electron emission unit 203.

In measuring the device current If and the emission current Ie of the electron-emitting device, the power supply 31 is applied to the device electrodes 5 and 6.
And an ammeter 30 are connected to each other, and an anode electrode 34 to which a power source 33 and an ammeter 32 are connected is arranged above the electron-emitting device. Further, the electron-emitting device and the anode electrode 34
Is installed in a vacuum device, and the vacuum device is equipped with equipment necessary for the vacuum device such as an exhaust pump and a vacuum gauge, which are not shown, so that the measurement and evaluation of this element can be performed under a desired vacuum. Has become.

The voltage of the anode electrode 234 is 1 kV.
-10 kV, and the distance H between the anode electrode 234 and the surface conduction electron-emitting device was measured in the range of 3 mm to 8 mm.

In the surface conduction electron-emitting device in which conductive fine particles are dispersed in advance, a part of the device is modified within the range of the basic manufacturing method of the basic device structure of the present embodiment. May be.

Next, FIG. 19 shows a typical example of the relationship between the emission current Ie and the device current If and the device voltage Vf measured by the measurement / evaluation apparatus shown in FIG. Note that FIG.
Are shown in arbitrary units because the magnitudes of If and Ie are remarkably different. As is clear from FIG. 17, this electron-emitting device has three characteristics with respect to the emission current Ie.

First of all, when a device voltage higher than a certain voltage (called a threshold voltage, Vth in FIG. 19) is applied to this device, the emission current Ie rapidly increases and the threshold voltage Vth is increased.
In the following, the emission current Ie is hardly detected. That is, it is a non-linear element having a clear threshold voltage Vth with respect to the emission current Ie.

Secondly, since the emission current Ie depends on the element voltage Vf, the emission current Ie can be controlled by the element voltage Vf.

Thirdly, the emitted charges trapped in the anode electrode 234 depend on the time for applying the device voltage Vf.
That is, the amount of charges captured by the anode electrode 234 can be controlled by the time for which the device voltage Vf is applied. Because of the above characteristics, the electron-emitting device of this embodiment can be expected to be applied to various fields.

FIG. 19 shows that the element current If has a characteristic that it monotonically increases with respect to the element voltage Vf (hereinafter referred to as MI characteristic). Voltage-controlled negative resistance with respect to Vf (hereinafter referred to as VC
In some cases, it may exhibit a NR characteristic). In this case as well, the present electron-emitting device has the three characteristic features described above.

Next, a vertical type surface conduction electron-emitting device, which is a surface conduction electron emission device having another structure according to this embodiment, will be described.

FIG. 6 is a view showing the basic structure of a vertical surface conduction electron-emitting device according to this embodiment.

In FIG. 6, reference numeral 251 denotes substrates 255, 2 and 2.
Reference numeral 56 is a device electrode, 254 is a thin film including an electron emitting portion, 25
Reference numeral 3 is an electron emitting portion and 257 is a step forming portion. The electron emitting portion 253 has a thickness of the step forming portion 257, a manufacturing method, and
The position varies depending on the thickness of the thin film 254 including the electron emitting portion, the manufacturing method, etc., and is not limited to the position shown in FIG.

The substrate 251, the device electrodes 255 and 256, the thin film 254 including the electron emitting portion, and the electron emitting portion 253 are made of the same material as that of the above-mentioned plane type surface conduction electron emitting device. Therefore, here, the step forming portion 257 and the thin film 254 including the electron emitting portion which characterize the vertical surface conduction electron-emitting device will be described in detail.

The step forming portion 257 is made of an insulating material such as SiO 2 formed by a vacuum deposition method, a printing method, a sputtering method or the like. The thickness of the step forming portion 257 corresponds to the device electrode interval L1 of the flat surface conduction electron-emitting device described above, and is several hundred angstroms to several tens of micrometers. The thickness of the step forming portion 257 is set depending on the manufacturing method of the step forming portion 257, the voltage applied between the device electrodes and the electric field strength capable of emitting electrons, and preferably 10 μm to 1,000 angstroms.

Since the thin film 254 including the electron emitting portion is formed after the device electrodes 255 and 256 and the step forming portion 257 are formed, it is laminated on the device electrodes 255 and 256, and in some cases, the device electrodes 255 and 256 are formed. It is formed into a desired shape except for a part of the overlap which is responsible for the electrical connection. In addition, the film thickness of the thin film 254 including the electron emitting portion is often different between the film thickness at the step portion and the film thickness of the portion stacked on the element electrodes 255 and 256 depending on the manufacturing method, Generally, the film thickness of the step portion is thin. As a result, as compared with the above-mentioned flat surface-conduction type electron-emitting device, the electron-emitting portion 3 is often subjected to the energization process more easily. <Matrix> Next, an electron source in which the above-mentioned surface conduction electron-emitting devices are arranged in a matrix will be described.

The structure of the electron source substrate will be described with reference to FIG.

In FIG. 7, 271 is a substrate, 272 is X.
Directional wiring, 273 is a Y-directional wiring, 274 is a surface conduction electron-emitting device, and 275 is a connection.

The surface conduction electron-emitting device 274 may be either the above-mentioned plane type or vertical type.

The substrate 271 is a silicon substrate or the like, and its size is appropriately set depending on the number of surface-conduction type elements installed on the substrate 271 and the design shape of each element.

The m X-direction wirings 272 are connected to DX1, DX2,
, DXm, which is formed on the substrate 271 by a vacuum deposition method, a printing method, a sputtering method, or the like, and is made of a conductive metal or the like having a desired pattern, and a substantially uniform voltage is supplied to many surface conduction elements. The material, film thickness, and wiring width are set so that The Y-direction wiring 273 is composed of n wirings DY1, DY2, ..., DYn, and is formed by a vacuum deposition method, a printing method, a sputtering method, or the like in the same manner as the X-direction wiring 272, and has a desired pattern of conductivity. The material, the film thickness, the wiring width, and the like are set so that a large number of surface-conduction-type elements are made of metal or the like and a voltage that is as substantially uniform as possible is supplied. These m X-direction wirings 2
An interlayer insulating layer (not shown) is provided between the 72 and the n Y-direction wirings 273 and electrically separated to form a matrix wiring.

The interlayer insulating layer (not shown) is SiO 2 or the like formed by a vacuum vapor deposition method, a printing method, a sputtering method or the like, and the whole or a part of the substrate 271 on which the X-direction wiring 272 is formed,
It is formed in a desired shape. In addition, the X-direction wiring 272 and Y
The direction wirings 273 are drawn out as external terminals.

In the above example, m X-direction wirings 27 are used.
In the above description, an example in which n Y-direction wirings 273 are installed on top of No. 2 via an interlayer insulating layer has been described. However, m X-direction wirings 272 are provided on n Y-direction wirings 273 via an interlayer insulating layer. There are also cases where it is installed.

Further, similarly to the above, the opposing electrodes (not shown) of the surface conduction electron-emitting device 274 and the connection 275 made of a conductive metal or the like formed by a vacuum deposition method, a printing method, a sputtering method or the like are provided. . That is, the surface conduction electron-emitting device 274 is connected to the connection line 275 so that m X-direction wirings 27 are formed.
2 and n Y-direction wirings 273 are electrically connected.

Note that m X-direction wirings 272, n Y-direction wirings 273, and connecting wires 275 which are element electrodes facing each other.
The conductive metal may have some or all of the constituent elements, or may be different from each other.
i, Cr, Au, Mo, W, Pt, Ti, Al, Cu,
Metals or alloys such as Pd and Pd, Ag, Au, RuO
2, a printed conductor composed of a metal such as Pd-Ag or a metal oxide and glass, a transparent conductor such as In2O3-SnO2, and a semiconductor material such as polysilicon. The surface conduction electron-emitting device may be formed either on the substrate 271 or on an interlayer insulating layer (not shown).

Further, the X-direction wiring 272 is electrically connected to a scan signal generator (not shown) for applying a scan signal for arbitrarily scanning the row of the surface conduction electron-emitting devices 274 arranged in the X-direction. It is connected.

On the other hand, the Y-direction wiring 273 is provided with a modulation signal generator (not shown) for applying a modulation signal for arbitrarily modulating each row of the surface conduction electron-emitting devices 274 arranged in the Y direction. It is electrically connected. Further, the drive voltage applied to each element of the surface conduction electron-emitting device is supplied as a difference voltage between the scanning signal and the modulation signal applied to the element. <Basic Configuration of Image Forming Apparatus> Next, an image forming apparatus used for formation and the like using the electron source created as described above will be described with reference to FIGS. 8 and 9. FIG. 8 is a basic configuration diagram of the image forming apparatus, and FIG. 9 is a diagram showing a fluorescent film.

271 is a substrate, and the electron-emitting device is formed on the substrate 271 as described above. Hereinafter, this is referred to as an electron source substrate. Reference numeral 281 is a rear plate to which the electron source substrate is fixed, and 286 is a face plate in which the fluorescent film 284, the metal back 285 and the like are formed on the inner surface of the glass substrate 283. Reference numeral 282 denotes a support frame, and the rear plate 281 and the face plate 286 are sealed with frit glass or the like to form an envelope 288.

In the above structure, the envelope 288 is composed of the face plate 286, the support frame 282, and the rear plate 281, but the rear plate 281 is provided mainly for the purpose of reinforcing the strength of the electron source substrate. Therefore, when the electron source substrate itself has sufficient strength, the separate rear plate 281 is not necessary, and the support frame 282 is directly sealed to the electron source substrate, and the face plate 286, the support frame 282, the electron source substrate The envelope 288 may be configured with.

FIG. 9 is a diagram showing the structure of the fluorescent film.
If the fluorescent film 284 (see FIG. 8) is monochrome,
In the case of a color phosphor film, which is composed of only phosphors, a black conductive material 291 and a phosphor 29 called a black stripe or a black matrix depending on the arrangement of the phosphors.
2 and.

The purpose of providing the black stripes and the black matrix is to make the color mixture of the three primary color phosphors necessary for color formation inconspicuous by mixing the portions of each phosphor different from each other. This is to suppress a decrease in contrast due to reflection of external light on the film 284. The material of the black stripe is not limited to the commonly used material containing graphite as a main component, but is not limited to this as long as it is a material having conductivity and little light transmission and reflection.

As a method of applying the phosphor to the glass substrate 283, a precipitation method or a printing method is used regardless of monochrome or color.

A metal back 285 is usually provided on the inner surface side of the fluorescent film 284. The purpose of the metal back is to improve the brightness by specularly reflecting the light toward the inner surface side of the light emission of the phosphor toward the face plate 286 side, to act as an electrode for applying an electron beam acceleration voltage, and This is to protect the phosphor from damage due to collision of negative ions generated in the enclosure.

The metal back is formed after the fluorescent film 284 is formed.
It can be manufactured by performing a smoothing process (usually called filming) on the inner surface of the fluorescent film 284 on the inner surface side, and then vacuum-depositing A1.

The face plate 286 may be provided with a transparent electrode (not shown) on the outer surface side of the fluorescent film 284 in order to further enhance the conductivity of the fluorescent film 286. When performing the above-mentioned sealing, it is necessary to perform sufficient alignment because the color locations must correspond to the phosphors of each color and the electron-emitting device.

The inside of the envelope 288 is evacuated through an exhaust pipe (not shown) to a vacuum degree of about 10 −6 torr, and the envelope 288 is sealed.

The terminals outside the container DoxL1 to DoxLm and DoxLm
A voltage is applied between the device electrodes 205 and 206 through y1 to Doyn to perform the above-described forming, and the electron emitting portion 20
3 was formed to produce an electron-emitting device. Also, the envelope 28
In some cases, a getter process is performed to maintain the degree of vacuum after the sealing of No. 8. This is done by heating the getter placed at a predetermined position (not shown) in the envelope 288 by a heating method such as resistance heating or high frequency heating immediately before or after the envelope 288 is sealed. , A process of forming a vapor deposition film. The getter usually has Ba or the like as its main component, and is, for example, 1 × 10 -5 or 1 due to the adsorption action of the deposited film.
It maintains the degree of vacuum of 10-7 Torr.

In the image display apparatus of the present embodiment manufactured as described above, each electron-emitting device has a substantially uniform electron by applying a voltage through the terminals DOXR1 to DOXRm and DOY1 to DOYn outside the container. Release the amount.

Further, the emitted electrons are applied with a high voltage of several kV or more to the metal back 85 or the transparent electrode (not shown) through the high voltage terminal Hv to accelerate the electron beam and collide with the fluorescent film 84. The image is displayed by exciting and emitting light.

In the above, the terminals outside the container DOXL1 to DOXLm
Forming is performed by the external terminals DOXR1 to DOX
Although the electrons are emitted by applying a voltage from Rm, the electrons may be emitted by applying a voltage from the terminals DOXL1 to DOXLm outside the container.

The configuration described above is a schematic configuration necessary for producing a suitable image forming apparatus used for forming, but the detailed parts such as the material of each member are not limited to the above contents. Instead, it goes without saying that it can be appropriately selected to be applied to the purpose of the image device.

Further, the present embodiment is not limited to a suitable image forming apparatus used for formation, but as an alternative light emitting source such as a light emitting diode of an optical printer including a photosensitive drum and a light emitting diode, for example. Can also be used. Further, at this time, by appropriately selecting the above-mentioned m number of X-direction wirings 272 and n number of Y-direction wirings 273, it can be applied not only as a linear light emitting source but also as a two-dimensional light emitting source.

Although the basic structure and manufacturing method of the surface conduction electron-emitting device have been described above, the present invention is not limited to the above-described structure and the like described in this embodiment, and may be applied to an image forming apparatus such as an electron source and a forming apparatus described later. It can also be applied at

Next, with reference to FIG. 10, there is shown a partial configuration of the electron source arranged and wired in a matrix. In FIG. 10, 74 is a surface conduction electron-emitting device, 72 is a row wiring (called an X-direction wiring or an upper wiring), and 73 is a column wiring (a Y-direction wiring or a lower wiring). . This electron source is configured to apply a voltage from one side of the row wiring. Here, the resistivity of the wiring is ρ1, and the wiring width is w
1, the film thickness is d1, and the resistance per row wiring element is rx1, the resistance R1 from the row end of the m / 2th row to each signal wiring end is R1 = N.rx1 + .rho.1 / (w1.d1) = Constant (N =
1, 2, 3, ..., N) and the width w of each column wiring is set so that R = constant. As a result, the voltage applied to each element at the time of driving becomes substantially constant, so that the voltage difference applied to each element can be reduced and the non-uniformity of the luminance distribution generated at the time of driving can be reduced. <Method of Manufacturing Electron Source> Next, a method of manufacturing the electron source of this embodiment will be described. The manufacturing method will be specifically described in the order of steps with reference to FIGS.

[Step-a] (Refer to FIG. 11A) A silicon oxide film having a thickness of 0.5 μm is formed on the substrate 1 formed by the sputtering method in the form of a cleaned blue plate glass by vacuum evaporation. 50 angstrom Cr, 600 thickness
After sequentially stacking Au of 0 angstrom, a photoresist (for example, AZ1370, manufactured by Hoechst) is spin-coated by a spinner and baked, and then a photomask image is exposed and developed to form a resist pattern of the lower wiring 72. The / Cr deposited film is wet-etched to form the lower wiring 72 having a desired shape.

Here, the resistance is R = N.rx1 + .rho.1 / (w1.d1) = from the m / 2th row end to each signal wiring end.
The width w of each lower wiring is selected and formed so as to be constant (here, N = 1, 2, 3, ..., N). [Step-b] (see FIG. 11B) Next, the interlayer insulating layer 111 made of a silicon oxide film having a thickness of 1.0 micron is deposited by the RF sputtering method. [Step-c] (see (c) of FIG. 11) A photoresist pattern for forming the contact hole 112 is formed in the silicon oxide film deposited in the step b,
Using this as a mask, the interlayer insulating layer 111 is etched to form a contact hole 112. Etching is performed by RIE (Reactive) using CF4 and H2 gas.
e Ion Etching) method. [Step-d] (see (d) of FIG. 12) After that, a pattern to be the device electrode 5 and the gap G between the device electrodes is formed with a photoresist (for example, RD-2000N).
-41, manufactured by Hitachi Chemical Co., Ltd.), and Ti having a thickness of 50 Å and Ni having a thickness of 1000 Å are sequentially deposited by a vacuum evaporation method. The photoresist pattern is dissolved in an organic solvent, the Ni / Ti deposition film is lifted off, the device electrode spacing L1 is 3 microns, and the device electrode width W1.
To form device electrodes 5 and 6 of 300 μm. [Step-e] (see (e) in FIG. 12) After forming a photoresist pattern of the upper wiring 73 on the device electrodes 5 and 6, Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially vacuum-deposited. Then, unnecessary portions are removed by lift-off to form the upper wiring 73 having a desired shape. [Step-f] (Refer to (f) in FIG. 13) FIG. 15 shows a part of a plan view of the mask of the thin film 2 for forming the electron-emitting portion of the electron-emitting device involved in this step. This is a mask having an inter-element electrode gap L1 and an opening in the vicinity thereof. With this mask, a Cr film 121 having a film thickness of 1000 Å is deposited and patterned by vacuum evaporation, and an organic Pd (for example, ccp4230, Okuno Seiyaku ( Co., Ltd.) spin coated with a spinner, 300
A heating and baking treatment is performed at 10 ° C. for 10 minutes. Further, the film thickness of the electron emitting portion forming thin film 4 formed of fine particles of Pd as the main element thus formed is 100 angstrom, and the sheet resistance value is 5 × 10 4 Ω / □.

The fine particle film described here is a film in which a plurality of fine particles are aggregated as described above, and the fine structure of the fine particle film is not limited to the state in which the fine particles are individually dispersed and arranged. Alternatively, it also refers to overlapping films (including islands), and the particle size refers to the diameter of fine particles whose particle shape is recognizable in the above state. [Step-g] (see (g) of FIG. 13) The Cr film 121 and the baked electron-emitting-portion-forming thin film 4 are etched with an acid etchant to form a desired pattern. [Step-h] (Refer to (h) of FIG. 13) A pattern for applying a resist is formed on portions other than the contact hole 112, and Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially deposited by vacuum evaporation. accumulate. Contact holes 112 are buried by removing unnecessary portions by lift-off.

Through the above steps, the lower wiring 72, the interlayer insulating layer 111, the upper wiring 73, the device electrodes 5 and 6, the electron emitting portion forming thin film 4 and the like were formed on the insulating substrate 1.

Next, an example in which a display device is configured by using the electron source created as described above will be described with reference to FIGS. 8 and 9.

As described above, after fixing the substrate 1 on which a large number of plane type surface conduction electron-emitting devices were manufactured on the rear plate 81, the face plate 86 (on the inner surface of the glass substrate 83) was placed 5 mm above the substrate 1. (A fluorescent film 84 and a metal back 85 are formed) are arranged via a support frame 82, and frit glass is applied to the joint portion of the face plate 86, the support frame 82, and the rear plate 81, in the atmosphere or Is sealed by baking in a nitrogen atmosphere at 400 ° C. to 500 ° C. for 10 minutes or more. Also, the rear plate 881
The frit glass is also used to fix the substrate 1 to the substrate.

In FIG. 8, 74 is an electron-emitting device and 7
Reference numerals 2 and 73 are wirings in the X direction and the Y direction, respectively.

In the case of monochrome, the fluorescent film 84 is made of only the fluorescent material, but in this embodiment, the fluorescent material adopts a stripe shape, a black stripe is first formed, and the fluorescent material of each color is applied to the gap. The fluorescent film 84 is manufactured. As the material for the black stripe, a material that is commonly used and has graphite as a main component is used. As a method of applying the phosphor to the glass substrate 83, the slurry method is used in this embodiment.

A metal back 85 is usually provided on the inner surface side of the fluorescent film 84. The metal back is manufactured by performing a smoothing process (usually called filming) on the inner surface of the fluorescent film after manufacturing the fluorescent film, and then vacuum-depositing Al.

The face plate 86 further includes a fluorescent film 8
A transparent electrode (not shown) may be provided on the outer surface side of the fluorescent film 84 in order to increase the conductivity of No. 4, but in this embodiment, it was omitted because sufficient conductivity was obtained only by the metal back.

In the case of the above-mentioned sealing, in the case of a color, the phosphors of the respective colors and the electron-emitting devices have to correspond to each other, so that sufficient alignment is performed.

The atmosphere in the glass container completed as described above is exhausted by a vacuum pump through an exhaust pipe (not shown), and after reaching a sufficient degree of vacuum, the external terminals DOXL1 to DOX
The electrode 5 of the electron-emitting device 74 is connected through Lm and DOY1 to DOYn,
A voltage is applied between 6 and the electron emitting portion 3 is formed by energizing (forming) the electron emitting portion forming thin film 2.

FIG. 4 shows the voltage waveform of the forming process. In FIG. 4, T1 and T2 are the pulse width and the pulse interval of the voltage waveform, respectively, and in this embodiment, T1 is 1 ms and T2 is 10 ms, and the peak value of the triangular wave (peak voltage during forming). Is 5 V, and the forming treatment is performed for 60 seconds in a vacuum atmosphere of about 1.times.10@-6 torr.

In the electron-emitting portion 3 thus formed, fine particles containing palladium element as a main component were dispersed and arranged, and the average particle diameter of the fine particles was 30 Å.

As described above, forming can be performed to form the electron emitting portion 3 and the electron emitting device 74.

Next, the exhaust pipe (not shown) is welded by heating with a gas burner at a degree of vacuum of about 10 −6 Torr to seal the envelope.

Finally, a getter process is performed in order to maintain the degree of vacuum after sealing. This is just before the sealing
The getter arranged at a predetermined position (not shown) in the image display device is heated by a heating method such as high frequency heating to form a vapor deposition film. The getter is, for example, Ba
Etc. as the main component.

As described above, in the completed image display device of the present invention, each electron-emitting device is supplied with a scanning signal and a modulation signal (not shown) through the external terminals DOXR1 to DOXRm and DOY1 to DOYn of FIG. Electrons are emitted by applying each from the generation part, and a high voltage of several kV or more is applied to the metal back 84 through the high voltage terminal Hv to accelerate the electron beam and collide with the fluorescent film 85 to excite and emit light. The image is displayed.

It should be noted that the present invention is not limited to the above-described basic manufacturing method, and even if a part of the basic manufacturing method of the electron source of the embodiment according to the present invention is modified, the gist of the present invention is not limited. And does not depart from its composition. [Embodiment 2] In Embodiment 1, an example is shown in which a substantially uniform electron emission characteristic is obtained in each electron source by adjusting the wiring width, but in Embodiment 2, by adjusting the film thickness, An example of performing the same correction will be shown.

FIG. 14 shows a plan view (a) and a sectional view (b) of a part of the electron source. In FIG. 14, 74 is a surface conduction electron-emitting device, 72 is a row wiring (called an X-direction wiring or an upper wiring), and 73 is a column wiring (also called a Y-direction wiring or a lower wiring). This electron source is configured to apply a voltage from one side of the row wiring. Where ρ is the resistivity of the wiring
2, the width is w2, the film thickness is d2, and the resistance per element of the row wiring is rx2, the resistance R2 from the row end of the m / 2th row to each signal wiring end is R2 = N.rx2 + ρ2 / (W2 · d2) = constant (N =
1, 2, 3, ..., N), the film thickness d of each column wiring is set and formed.
As a result, the voltage applied to each element during driving becomes substantially constant, so that the voltage difference applied to each element can be reduced and the luminance distribution generated during driving can be reduced.

Next, referring to FIGS. 11 to 13, a second embodiment will be described.
The manufacturing method of the electron source will be specifically described in the order of steps.

[Step-a] (Refer to FIG. 11A) A silicon oxide film having a thickness of 0.5 μm is formed on the substrate 1 formed by the sputtering method in a vacuum-deposited manner on a cleaned blue plate glass. 50 angstrom Cr, 600 thickness
After sequentially stacking Au of 0 angstrom, a photoresist (for example, AZ1370, manufactured by Hoechst) is spin-coated by a spinner and baked, and then a photomask image is exposed and developed to form a resist pattern of the lower wiring 72. The / Cr deposited film is wet-etched to form the lower wiring 72 having a desired shape.

Here, the film thickness d of each lower wiring is selected so that the resistance becomes constant R = N.rx + .rho ./ (w.d) = from the m / 2-th row end to each signal wiring end. Are formed (here, N = 1, 2, 3, ..., N). [Step-b] (see FIG. 11B) Next, the interlayer insulating layer 111 made of a silicon oxide film having a thickness of 1.0 micron is deposited by the RF sputtering method. [Step-c] (see (c) of FIG. 11) A photoresist pattern for forming the contact hole 112 is formed in the silicon oxide film deposited in the step b,
Using this as a mask, the interlayer insulating layer 111 is etched to form a contact hole 112. Etching is performed by RIE (Reactive) using CF4 and H2 gas.
e Ion Etching) method. [Step-d] (see (d) of FIG. 12) After that, a pattern to be the device electrode 5 and the gap G between the device electrodes is formed with a photoresist (for example, RD-2000N).
-41, manufactured by Hitachi Chemical Co., Ltd.), and Ti having a thickness of 50 Å and Ni having a thickness of 1000 Å are sequentially deposited by a vacuum evaporation method. The photoresist pattern is dissolved in an organic solvent, the Ni / Ti deposition film is lifted off, the device electrode spacing L1 is 3 microns, and the device electrode width W1.
To form device electrodes 5 and 6 of 300 μm. [Step-e] (see (e) in FIG. 12) After forming a photoresist pattern of the upper wiring 73 on the device electrodes 5 and 6, Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially vacuum-deposited. Then, unnecessary portions are removed by lift-off to form the upper wiring 73 having a desired shape. [Step-f] (Refer to (f) in FIG. 13) FIG. 15 shows a part of a plan view of the mask of the thin film 2 for forming the electron-emitting portion of the electron-emitting device involved in this step. This is a mask having an inter-element electrode gap L1 and an opening in the vicinity thereof. With this mask, a Cr film 121 having a film thickness of 1000 Å is deposited and patterned by vacuum evaporation, and an organic Pd (for example, ccp4230, Okuno Seiyaku ( Co., Ltd.) spin coated with a spinner, 300
A heating and baking treatment is performed at 10 ° C. for 10 minutes. Further, the film thickness of the electron emitting portion forming thin film 4 formed of fine particles of Pd as the main element thus formed is 100 angstrom, and the sheet resistance value is 5 × 10 4 Ω / □.

Incidentally, the fine particle film described here is a film in which a plurality of fine particles are gathered as described above, and as a fine structure thereof, not only the fine particles are individually dispersed and arranged, but the fine particles are adjacent to each other. Alternatively, it also refers to overlapping films (including islands), and the particle size refers to the diameter of fine particles whose particle shape is recognizable in the above state. [Step-g] (see (g) of FIG. 13) The Cr film 121 and the baked electron-emitting-portion-forming thin film 4 are etched with an acid etchant to form a desired pattern. [Step-h] (Refer to (h) of FIG. 13) A pattern for applying a resist is formed on portions other than the contact hole 112, and Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially deposited by vacuum evaporation. accumulate. Contact holes 112 are buried by removing unnecessary portions by lift-off.

Through the above steps, the lower wiring 72, the interlayer insulating layer 111, the upper wiring 73, the device electrodes 5 and 6, the electron emitting portion forming thin film 4 and the like are formed on the insulating substrate 1.

Using the electron source produced as described above, a display device as shown in FIG. 8 is formed in the same manner as in the first embodiment.

It should be noted that the present invention is not limited to the above-described basic manufacturing method, and even if a part of the basic manufacturing method of the electron source of the embodiment according to the present invention is modified, the gist of the present invention is not limited. And does not depart from its composition. [Third Embodiment] In the first embodiment, the wiring width is adjusted, and in the second embodiment, the film thickness is adjusted, so that an almost uniform electron emission characteristic is obtained in each electron source. 3 shows an example of performing the same correction by adjusting the resistivity of the wiring.

FIG. 15 shows a plan view of a part of the electron source.
In the figure, 74 is a surface conduction electron-emitting device and 72
Are row wirings (also referred to as X-direction wirings or upper wirings),
Reference numeral 73 indicates a column wiring (also called a Y-direction wiring or a lower wiring). This electron source is configured to apply a voltage from one side of the row wiring. Here, the resistivity of the wiring is ρ3, the width is w3,
Assuming that the film thickness is d3 and the resistance per row wiring element is rx3, the resistance R3 from the row end in the m / 2th row to each signal wiring end is R3 = N.rx3 + .rho.3 / (w3.d3) = Constant (N =
1, 2, 3, ...

As a result, the voltage applied to each element at the time of driving becomes almost constant, so that the voltage difference applied to each element can be reduced and the luminance distribution generated at the time of driving can be reduced.

Next, referring to FIGS. 11 to 13, a second embodiment will be described.
The manufacturing method of the electron source will be specifically described in the order of steps. [Step-a] (see (a) in FIG. 11) A silicon oxide film having a thickness of 0.5 μm, which has been cleaned so as to form a soda-lime glass, is formed on the substrate 1 by the sputtering method to a thickness of 50 angstrom by vacuum deposition. Cr, thickness 600
After sequentially stacking Au of 0 angstrom, a photoresist (for example, AZ1370, manufactured by Hoechst) is spin-coated by a spinner and baked, and then a photomask image is exposed and developed to form a resist pattern of the lower wiring 72. The / Cr deposited film is wet-etched to form the lower wiring 72 having a desired shape.

Here, wiring materials having different resistivity ρ3 are used so that the resistance R3 from the m / 2-th row end to each signal wiring end is R3 = Nrx3 + ρ3 / (w3d3) = constant. The lower wiring is formed (here, N = 1, 2, 3, ..., N). [Step-b] (see FIG. 11B) Next, the interlayer insulating layer 111 made of a silicon oxide film having a thickness of 1.0 micron is deposited by the RF sputtering method. [Step-c] (see (c) of FIG. 11) A photoresist pattern for forming the contact hole 112 is formed in the silicon oxide film deposited in the step b,
Using this as a mask, the interlayer insulating layer 111 is etched to form a contact hole 112. Etching is performed by RIE (Reactive) using CF4 and H2 gas.
e Ion Etching) method. [Step-d] (see (d) of FIG. 12) After that, a pattern to be the device electrode 5 and the gap G between the device electrodes is formed with a photoresist (for example, RD-2000N).
-41, manufactured by Hitachi Chemical Co., Ltd.), and Ti having a thickness of 50 Å and Ni having a thickness of 1000 Å are sequentially deposited by a vacuum evaporation method. The photoresist pattern is dissolved in an organic solvent, the Ni / Ti deposition film is lifted off, the device electrode spacing L1 is 3 microns, and the device electrode width W1.
To form device electrodes 5 and 6 of 300 μm. [Step-e] (see (e) in FIG. 12) After forming a photoresist pattern of the upper wiring 73 on the device electrodes 5 and 6, Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially vacuum-deposited. Then, unnecessary portions are removed by lift-off to form the upper wiring 73 having a desired shape. [Step-f] (Refer to (f) in FIG. 13) FIG. 15 shows a part of a plan view of the mask of the thin film 2 for forming the electron-emitting portion of the electron-emitting device involved in this step. This is a mask having an inter-element electrode gap L1 and an opening in the vicinity thereof. With this mask, a Cr film 121 having a film thickness of 1000 Å is deposited and patterned by vacuum evaporation, and an organic Pd (for example, ccp4230, Okuno Seiyaku ( Co., Ltd.) spin coated with a spinner, 300
A heating and baking treatment is performed at 10 ° C. for 10 minutes. Further, the film thickness of the electron emitting portion forming thin film 4 formed of fine particles of Pd as the main element thus formed is 100 angstrom, and the sheet resistance value is 5 × 10 4 Ω / □.

Incidentally, the fine particle film described here is a film in which a plurality of fine particles are gathered as described above, and as a fine structure thereof, not only the fine particles are individually dispersed and arranged, but the fine particles are adjacent to each other. Alternatively, it also refers to overlapping films (including islands), and the particle size refers to the diameter of fine particles whose particle shape is recognizable in the above state. [Step-g] (see (g) of FIG. 13) The Cr film 121 and the baked electron-emitting-portion-forming thin film 4 are etched with an acid etchant to form a desired pattern. [Step-h] (Refer to (h) of FIG. 13) A pattern for applying a resist is formed on portions other than the contact hole 112, and Ti having a thickness of 50 Å and Au having a thickness of 5000 Å are sequentially deposited by vacuum evaporation. accumulate. Contact holes 112 are buried by removing unnecessary portions by lift-off.

Through the above steps, the lower wiring 72, the interlayer insulating layer 111, the upper wiring 73, the device electrodes 5 and 6, the electron emitting portion forming thin film 4 and the like are formed on the insulating substrate 1.

Using the electron source produced as described above, a display device as shown in FIG. 8 is formed as in the first embodiment.

[Embodiment 4] This embodiment shows an embodiment in which not only the voltage drop due to the row direction wiring but also the voltage drop due to the column direction wiring is compensated.

FIG. 1 shows a plan view of a part of the electron source in which the voltage drop is compensated not only in the row direction but also in the column direction wiring.

In Examples 1 to 3, the voltage drop was compensated mainly by adjusting the wiring in the row direction. However, like the row direction, a voltage drop also occurs in the column direction wiring, so that the voltage decreases as the distance from the voltage power supply end increases. Therefore, the accuracy of the adjustment can be further improved by further adjusting the wiring in the row direction. Also, because you can adjust the wiring in both column and row directions,
Adjustment becomes easy. For example, if the wiring width is adjusted, the maximum width of one wiring can be made smaller.

In the fourth embodiment, in addition to the adjustment of the column-direction wiring described in the first to third embodiments, the resistance value of the row-direction wiring is further adjusted, so that the non-uniformity with respect to each electron source caused by the voltage drop is non-uniform. Such electron emission is compensated.

In the wiring as shown in FIG. 16, the voltage applied to each element when an external voltage is applied to turn on one line of all electron-emitting devices connected to the first row wiring and the m-th wiring The ignition voltage of each element when a voltage is externally applied to light one line of all the electron-emitting devices connected to the row wiring is as shown in FIG. 18, and the voltage applied by each row is distributed. The voltage drops as you hold it and move it away from the power supply end. Therefore, by varying the widths of the respective wirings in the rows and columns, the resistance values of the respective wirings are changed, thereby reducing variations in the applied voltage in the respective rows.

Although the wiring width is changed here as a means for changing the resistance value of the wiring, the wiring resistance value is not limited to this, and the resistance value of the wiring is changed by changing the wiring thickness and the wiring resistivity. May be changed. As a manufacturing method, Example 1
According to the method of 3. Thereby, the voltage applied to each element can be made substantially equal.

The semiconductor wiring which is the wiring of SCE is N
It is needless to say that a semiconductor substrate of a P-type or P-type may be doped with an impurity semiconductor such as boron or antimony.

[0146]

As described above, according to the present invention, the non-uniform luminance distribution due to the variation in the effective voltage applied to each electron source at the time of driving due to the wiring resistance is corrected, and a high quality image is displayed. Can be formed.

[0147]

[Brief description of drawings]

FIG. 1 is a diagram of an electron source matrix circuit according to a fourth embodiment.

FIG. 2 is a basic manufacturing diagram of a surface conduction electron-emitting device.

FIG. 3 is a basic configuration diagram of a surface conduction electron-emitting device.

FIG. 4 is a diagram showing voltage waveforms in a conduction process of a surface conduction electron-emitting device.

FIG. 5 is a basic measurement / evaluation apparatus diagram of a surface conduction electron-emitting device.

FIG. 6 is a basic configuration diagram of a vertical conduction electron-emitting device.

FIG. 7 is a configuration diagram of an electron source.

FIG. 8 is a diagram of an image forming apparatus.

FIG. 9 is an explanatory diagram of a fluorescent film.

FIG. 10 is a diagram of an electron source matrix circuit of the first embodiment.

FIG. 11 is an electron source manufacturing method diagram.

FIG. 12 is an electron source manufacturing method diagram.

FIG. 13 is an electron source manufacturing method diagram.

FIG. 14 is a diagram of an electron source matrix circuit according to a second embodiment.

FIG. 15 is a diagram of an electron source matrix circuit according to a third embodiment.

FIG. 16 is a plan view of an electron source matrix circuit.

FIG. 17 is a diagram of an electron source matrix circuit showing a distribution of wiring resistance.

FIG. 18 is a diagram illustrating a conventional problem.

FIG. 19 is a diagram showing Vf-If characteristics of an electron source.

FIG. 20 is a diagram illustrating a configuration of a conventional Hartwell SCE.

[Explanation of symbols]

 201 Insulating Substrate 202 Electron Emitting Portion Forming Thin Film 203 Electron Emitting Portion 204 Thin Film Including Electron Emitting Portion 205, 206 Element Electrode 230 Ammeter 231 Power Supply 232 Ammeter 233 Power Supply 234 Anode Electrode 272 X Direction Wiring 273 Y Direction Wiring 274 Surface Conduction type electron-emitting device 275 Connection 281 Rear plate with electron source fixed 282 Support frame 283 Glass substrate 284 Fluorescent film 285 Metal back 286 Face plate 288 Envelope 291 Black conductive material 292 Phosphor 111 Inter-layer insulating layer 112 Contact hole

Claims (60)

[Claims] 1. A plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected to a wiring in a row direction, and the same column is arranged. The other terminal of the surface conduction electron-emitting device laid out in is connected to a column wiring, and the row wiring is m row wirings Dx1, Dx.
2, ..., Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy.
In the image forming apparatus including 2, ..., Dyn, the wirings Dy1, Dy2, ..., Dyn in the column direction are sequentially set from a low resistance value to a high resistance value, and based on an image signal, Driving means for driving the wiring in the row direction and the wiring in the column direction to drive the corresponding surface conduction electron-emitting device, and light emission by electrons output from the driven surface conduction electron-emitting device. An image forming apparatus comprising: a light emitting unit. 2. The wirings Dy1, Dy2, ..., Dy in the column direction
n is changed from thin width to thick width in order,
The image forming apparatus according to claim 1, wherein a low resistance value and a high resistance value are respectively set. 3. The column-direction wirings Dy1, Dy2, ..., Dy
The image forming apparatus according to claim 1, wherein n is set from a low resistance value to a high resistance value by changing n from a thin thickness to a thick thickness, respectively. 4. Wirings Dy1, Dy2, ..., Dy in the column direction
2. The image forming apparatus according to claim 1, wherein n is sequentially assigned from a wiring having a low resistivity to a wiring having a high resistivity, and a low resistance value is set to a high resistance value. 5. The wirings Dy1, Dy2, ..., Dy in the column direction
n is a semiconductor wiring, and an impurity semiconductor is added to the semiconductor wiring, and the wirings Dy1, Dy2, ..., Dyn in the column direction are sequentially arranged from a wiring having a low resistivity to a wiring having a high resistivity. The image forming apparatus according to claim 4, wherein the image forming apparatus is set to. 6. The image forming apparatus according to claim 5, wherein the impurity semiconductor is an N-type impurity semiconductor. 7. The image forming apparatus according to claim 5, wherein the impurity semiconductor is a P-type impurity semiconductor. 8. The image forming apparatus according to claim 5, wherein the semiconductor wiring is a silicon wiring. 9. The image forming apparatus according to claim 7, wherein the impurity semiconductor is boron. 10. The image forming apparatus according to claim 7, wherein the impurity semiconductor is antimony. 11. A plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected to a wiring in a row direction, and the same column is arranged. The other terminal of the surface conduction electron-emitting device laid out in is connected to a column wiring, and the row wiring is m row wirings Dx1, Dx.
2, ..., Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy
In the image forming apparatus including 2, ..., Dyn, the wirings Dx1, Dx2, ..., Dxm in the row direction are sequentially set from low resistance value to high resistance value, and based on the image signal, Driving means for driving the wiring in the row direction and the wiring in the column direction to drive the corresponding surface conduction electron-emitting device, and light emission by electrons output from the driven surface conduction electron-emitting device. An image forming apparatus comprising: a light emitting unit. 12. The wirings Dx1, Dx2, ..., D in the row direction
The image forming apparatus according to claim 11, wherein xm is set from a low resistance value to a high resistance value by changing from a narrow width to a thick width in order. 13. The wiring Dx1, Dx2, ..., D in the row direction
The image forming apparatus according to claim 11, wherein xm is set from a low resistance value to a high resistance value, respectively, by sequentially changing from a thin thickness to a thick thickness. 14. The wiring Dx1, Dx2, ..., D in the row direction
12. The image forming apparatus according to claim 11, wherein xm is sequentially assigned from a wiring having a low resistivity to a wiring having a high resistivity, and sets a low resistance value to a high resistance value, respectively. 15. The wiring Dx1, Dx2, ..., D in the row direction
xm is composed of a semiconductor wiring, and an impurity semiconductor is added to the semiconductor wiring, and the wirings Dx1, Dx2, ..., Dxm in the row direction are sequentially arranged from a wiring having a low resistivity to a wiring having a high resistivity. The image forming apparatus according to claim 14, wherein the image forming apparatus is set to. 16. The image forming apparatus according to claim 15, wherein the impurity semiconductor is an N-type impurity semiconductor. 17. The image forming apparatus according to claim 15, wherein the impurity semiconductor is a P-type impurity semiconductor. 18. The image forming apparatus according to claim 15, wherein the semiconductor wiring is a silicon wiring. 19. The image forming apparatus according to claim 17, wherein the impurity semiconductor is boron. 20. The image forming apparatus according to claim 17, wherein the impurity semiconductor is antimony. 21. A plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected to a wiring in a row direction, and the same column is arranged. The other terminal of the surface conduction electron-emitting device laid out in is connected to a column wiring, and the row wiring is m row wirings Dx1, Dx.
2, ..., Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy
In the image forming apparatus including 2, ..., Dyn, the wirings Dy1, Dy2, ..., Dyn in the column direction are sequentially set from a low resistance value to a high resistance value, and the wiring Dx1 in the row direction is set. , Dx2, ..., Dxm are set in order from a low resistance value to a high resistance value, and the wiring in the row direction and the wiring in the column direction are driven based on an image signal, and the corresponding surface An image forming apparatus comprising: a driving unit that drives the conduction electron-emitting device; and a light-emitting unit that emits light by electrons output from the driven surface conduction electron-emitting device. 22. The wirings Dy1, Dy2, ..., D in the column direction
yn is set from a low resistance value to a high resistance value in order by changing from a narrow width to a thick width, and the wirings Dx1, Dx2, ..., Dxm in the row direction are sequentially arranged from the narrow width to the thick width. 22. The image forming apparatus according to claim 21, wherein the low resistance value and the high resistance value are respectively set by being changed to. 23. The wirings Dy1, Dy2, ..., D in the column direction
yn is set from a low resistance value to a high resistance value in order by changing from a thin thickness to a thick thickness, and the wirings Dx1, Dx2, ..., Dxm in the column direction are sequentially arranged from the thin thickness to the thick thickness. 22. The image forming apparatus according to claim 21, wherein the low resistance value and the high resistance value are respectively set by changing to the low resistance value. 24. The column-direction wirings Dy1, Dy2, ..., D
yn is sequentially assigned from low-resistivity wiring to high-resistivity wiring, and the column-direction wirings Dx1, Dx2, ..., Dxm are sequentially arranged from low-resistivity wiring to high-resistivity wiring. 22. The image forming apparatus according to claim 21, wherein the image forming apparatus is assigned and sets a low resistance value to a high resistance value. 25. The wirings Dy1, Dy2, ..., D in the column direction
yn and the wirings Dx1, Dx2, ..., Dxm in the column direction are semiconductor wirings, and an impurity semiconductor is added to the semiconductor wirings so that the wirings Dy1, Dy2 ,. Dyn and the wiring D in the column direction
25. The image forming apparatus according to claim 24, wherein x1, Dx2, ..., Dxm are set in order from a wiring having a low resistivity to a wiring having a high resistivity. 26. The image forming apparatus according to claim 25, wherein the impurity semiconductor is an N-type impurity semiconductor. 27. The image forming apparatus according to claim 25, wherein the impurity semiconductor is a P-type impurity semiconductor. 28. The image forming apparatus according to claim 25, wherein the semiconductor wiring is a silicon wiring. 29. The image forming apparatus according to claim 27, wherein the impurity semiconductor is boron. 30. The image forming apparatus according to claim 27, wherein the impurity semiconductor is antimony. 31. A plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected to a wiring in a row direction, and the same column is arranged. The other terminal of the surface conduction electron-emitting device laid out in is connected to a column wiring, and the row wiring is m row wirings Dx1, Dx.
2, ..., Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy
In the image forming method including 2, ..., Dyn, the wirings Dy1, Dy2, ..., Dyn in the column direction are sequentially set from a low resistance value to a high resistance value, and based on an image signal, A driving step of driving the row-direction wirings and the column-direction wirings to drive the corresponding surface conduction electron-emitting devices, and light is emitted by electrons output from the driven surface conduction electron-emitting devices. And a light emitting step. 32. The wirings Dy1, Dy2, ..., D in the column direction
32. The image forming method according to claim 31, wherein yn is set from a low resistance value to a high resistance value in order by changing from a narrow width to a thick width. 33. The wirings Dy1, Dy2, ..., D in the column direction
32. The image forming method according to claim 31, wherein yn is set from a low resistance value to a high resistance value by sequentially changing from thin thickness to thick thickness. 34. The column-direction wirings Dy1, Dy2, ..., D
32. The image forming method according to claim 31, wherein yn is sequentially assigned a wiring having a low resistivity to a wiring having a high resistivity, and a low resistance value is set to a high resistance value. 35. Wirings Dy1, Dy2, ..., D in the column direction
yn is composed of a semiconductor wiring, and an impurity semiconductor is added to the semiconductor wiring, and the wirings Dy1, Dy2, ..., Dyn in the column direction are sequentially arranged from a wiring having a low resistivity to a wiring having a high resistivity. The image forming method according to claim 34, wherein the image forming method is set to. 36. The image forming method according to claim 35, wherein the impurity semiconductor is an N-type impurity semiconductor. 37. The image forming method according to claim 35, wherein the impurity semiconductor is a P-type impurity semiconductor. 38. The image forming method according to claim 35, wherein the semiconductor wiring is a silicon wiring. 39. The image forming method according to claim 7, wherein the impurity semiconductor is boron. 40. The image forming method according to claim 37, wherein the impurity semiconductor is antimony. 41. A plurality of surface-conduction type electron-emitting devices are laid out in a matrix, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected to a wiring in a row direction, and the same column is arranged. The other terminal of the surface conduction electron-emitting device laid out in is connected to a column wiring, and the row wiring is m row wirings Dx1, Dx.
2, ..., Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy
In the image forming method including 2, ..., Dyn, the wirings Dx1, Dx2, ..., Dxm in the row direction are sequentially set from a low resistance value to a high resistance value, and based on an image signal, A driving step of driving the row-direction wirings and the column-direction wirings to drive the corresponding surface conduction electron-emitting devices, and light is emitted by electrons output from the driven surface conduction electron-emitting devices. And a light emitting step. 42. The wiring Dx1, Dx2, ..., D in the row direction
42. The image forming method according to claim 41, wherein xm is set from a low resistance value to a high resistance value by sequentially changing from a narrow width to a thick width. 43. The wirings Dx1, Dx2, ..., D in the row direction
42. The image forming method according to claim 41, wherein xm is set from a low resistance value to a high resistance value, respectively, by sequentially changing from a thin thickness to a thick thickness. 44. The wiring Dx1, Dx2, ..., D in the row direction
42. The image forming method according to claim 41, wherein xm is a wiring having a low resistivity to a wiring having a high resistivity, which is set in order from a low resistance value to a high resistance value. 45. The wirings Dx1, Dx2, ..., D in the row direction
xm is composed of a semiconductor wiring, and an impurity semiconductor is added to the semiconductor wiring, and the wirings Dx1, Dx2, ..., Dxm in the row direction are sequentially arranged from a wiring having a low resistivity to a wiring having a high resistivity. The image forming method according to claim 44, wherein the image forming method is set to. 46. The image forming method according to claim 45, wherein the impurity semiconductor is an N-type impurity semiconductor. 47. The image forming method according to claim 45, wherein the impurity semiconductor is a P-type impurity semiconductor. 48. The image forming method according to claim 45, wherein the semiconductor wiring is a silicon wiring. 49. The image forming method according to claim 47, wherein the impurity semiconductor is boron. 50. The image forming method according to claim 47, wherein the impurity semiconductor is antimony. 51. A plurality of surface-conduction type electron-emitting devices are laid out in a matrix form, and one terminal of the surface-conduction type electron-emitting devices laid out in the same row is connected to a wiring in a row direction, and the same column is arranged. The other terminal of the surface conduction electron-emitting device laid out in is connected to a column wiring, and the row wiring is m row wirings Dx1, Dx.
2, ..., Dxm, and the column-direction wirings are n column-direction wirings Dy1, Dy
In the image forming method including 2, ..., Dyn, the wirings Dy1, Dy2, ..., Dyn in the column direction are sequentially set from a low resistance value to a high resistance value, and the wiring Dx1 in the row direction is set. , Dx2, ..., Dxm are set in order from a low resistance value to a high resistance value, and the wiring in the row direction and the wiring in the column direction are driven based on an image signal, and the corresponding surface An image forming method comprising: a driving step of driving a conduction electron-emitting device; and a light emitting step of emitting light by electrons output from the driven surface conduction electron-emitting device. 52. Wirings Dy1, Dy2, ..., D in the column direction
yn is set from a low resistance value to a high resistance value in order by changing from a narrow width to a thick width, and the wirings Dx1, Dx2, ..., Dxm in the row direction are sequentially arranged from the narrow width to the thick width. 52. The image forming method according to claim 51, wherein the low resistance value and the high resistance value are respectively set by changing to the low resistance value. 53. Wirings Dy1, Dy2, ..., D in the column direction
yn is set from a low resistance value to a high resistance value in order by changing from a thin thickness to a thick thickness, and the wirings Dx1, Dx2, ..., Dxm in the column direction are sequentially arranged from the thin thickness to the thick thickness. 52. The image forming method according to claim 51, wherein the low resistance value and the high resistance value are respectively set by changing to. 54. The wirings Dy1, Dy2, ..., D in the column direction
yn is sequentially assigned from low-resistivity wiring to high-resistivity wiring, and the column-direction wirings Dx1, Dx2, ..., Dxm are sequentially arranged from low-resistivity wiring to high-resistivity wiring. The image forming method according to claim 51, wherein the low resistance value and the high resistance value are respectively assigned and set. 55. The wirings Dy1, Dy2, ..., D in the column direction
yn and the wirings Dx1, Dx2, ..., Dxm in the column direction are semiconductor wirings, and an impurity semiconductor is added to the semiconductor wirings so that the wirings Dy1, Dy2 ,. Dyn and the wiring D in the column direction
55. The image forming method according to claim 54, wherein x1, Dx2, ..., Dxm are set in order from a wiring having a low resistivity to a wiring having a high resistivity. 56. The image forming method according to claim 55, wherein the impurity semiconductor is an N-type impurity semiconductor. 57. The image forming method according to claim 55, wherein the impurity semiconductor is a P-type impurity semiconductor. 58. The image forming method according to claim 55, wherein the semiconductor wiring is a silicon wiring. 59. The image forming method according to claim 57, wherein the impurity semiconductor is boron. 60. The image forming method according to claim 57, wherein the impurity semiconductor is antimony.