JPH0746708B2 - Semiconductor mounting substrate and manufacturing method thereof - Google Patents
Semiconductor mounting substrate and manufacturing method thereofInfo
- Publication number
- JPH0746708B2 JPH0746708B2 JP17812786A JP17812786A JPH0746708B2 JP H0746708 B2 JPH0746708 B2 JP H0746708B2 JP 17812786 A JP17812786 A JP 17812786A JP 17812786 A JP17812786 A JP 17812786A JP H0746708 B2 JPH0746708 B2 JP H0746708B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- semiconductor mounting
- recess
- metal plate
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
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- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、各種の半導体素子を搭載すために使用される
半導体搭載用基板およびその製造方法に関する。Description: TECHNICAL FIELD The present invention relates to a semiconductor mounting board used for mounting various semiconductor elements and a method for manufacturing the same.
特に本発明は、搭載された半導体素子から発生する熱の
放散性に優れ、かく外部から半導体素子へ湿気が侵入す
ることの少ない半導体搭載用基板とその製造方法を提供
するものであり、カメラ、時計などの内装基板をはじ
め、チップキャリア,ピングリッドアレイ、ハイブリッ
ド基板などに有利に使用される。In particular, the present invention provides a semiconductor mounting substrate and a method for manufacturing the same, which is excellent in heat dissipation generated from a mounted semiconductor element, and thus moisture hardly enters the semiconductor element from the outside, a camera, It is advantageously used for internal substrates such as watches, chip carriers, pin grid arrays, and hybrid substrates.
従来の半導体素子を直接搭載する半導体搭載用基板の材
質はプラスチックまたはセラミックスであり、加工し易
く、コストが比較的安いためプラスチックスが最も広く
使用されている。一般にガラスエポキシなどのプラスチ
ックスを使用した半導体搭載用基板は寸法精度に優れ、
機械強度もアルミナなどのセラミック基板より優れてい
るが、熱伝導率はアルミナの約1/60程度と極めて小さ
い。このため従来のプラスチック基板は、集積度の高い
ICや消費電力の大きい半導体素子が搭載される基板とし
ては未だ十分に満足されていなかった。The material of a conventional semiconductor mounting substrate on which a semiconductor element is directly mounted is plastic or ceramics, and plastics are most widely used because they are easy to process and relatively low in cost. Generally, semiconductor mounting boards using plastics such as glass epoxy have excellent dimensional accuracy,
The mechanical strength is superior to ceramic substrates such as alumina, but the thermal conductivity is extremely low, about 1/60 that of alumina. Therefore, the conventional plastic substrate has a high degree of integration.
It has not been fully satisfied as a substrate on which ICs and semiconductor elements with large power consumption are mounted.
この欠点を除去改善するために熱伝導率の高い金属板を
プラスチック基板に装着し、半導体素子を前記金属板に
直接取り付けて熱放散性を向上させた構造からなる半導
体搭載用基板が従来から使用されている。In order to eliminate and improve this defect, a semiconductor mounting substrate having a structure in which a metal plate having high thermal conductivity is attached to a plastic substrate and a semiconductor element is directly attached to the metal plate to improve heat dissipation has been conventionally used. Has been done.
第5図および第6図に従来技術による半導体搭載用基板
の縦断面図を示した。5 and 6 are vertical sectional views of a semiconductor mounting substrate according to the prior art.
しかし、前述の半導体搭載用基板において、第5図に示
したような基板裏面側の開口部周辺に金属板を接着層を
介して接合された基板にあっては、半導体搭載用凹部を
形成する前記開口部の底面周囲において基板と金属板と
を接合するのに用いられる接着材のはみ出しを完全にな
くすことは非常に困難であり、搭載する半導体素子の外
寸に比べ、半導体搭載部の内寸を予め大きく設計せねば
ならず装置が大型化する。またはさらに接着材のはみ出
し量が大きくなると半導体素子を正規の位置に載置する
ことができなくなることがあった。また第6図に示した
ような基板裏面に金属板が接合された後、前記基板表面
から前記金属板に到達するよう開口部を開削し接着材の
はみ出し部分を除去した基板にあっては、開削された金
属板の表面を完全に平滑に加工することは困難であり、
安定した品質が得られずコストアップにつながる、もし
くは半導体素子を正規の位置、形状に搭載することがで
きない場合があるといった欠点を有していた。However, in the above-described semiconductor mounting substrate, in a substrate in which a metal plate is bonded around the opening on the back surface side of the substrate via an adhesive layer as shown in FIG. 5, the semiconductor mounting recess is formed. It is extremely difficult to completely prevent the protrusion of the adhesive used for joining the substrate and the metal plate around the bottom surface of the opening, compared to the outer dimensions of the semiconductor element to be mounted. The size of the device must be increased and the size of the device must be increased. Alternatively, if the amount of protrusion of the adhesive material is further increased, it may not be possible to mount the semiconductor element at a proper position. Further, in the board as shown in FIG. 6, after the metal plate is joined to the back surface of the board, the opening is cut to reach the metal plate from the front surface of the board and the protruding portion of the adhesive is removed. It is difficult to process the surface of a carved metal plate to be completely smooth,
It has a drawback that stable quality cannot be obtained, leading to cost increase, or that the semiconductor element cannot be mounted in a proper position and shape.
本発明は上記技術の有する欠点を改善した、熱放散性に
優れ信頼性が高く高密度配線の形成、装置の小型化が容
易であり、かつ基板裏面に一体形成されたメッキ被膜に
より耐湿性を向上させた半導体搭載用基板及びその製造
方法を提供することを目的とするものである。The present invention has improved the drawbacks of the above-mentioned technology, has excellent heat dissipation, is highly reliable, facilitates the formation of high-density wiring, and makes it easy to reduce the size of the device. It is an object of the present invention to provide an improved semiconductor mounting substrate and a method for manufacturing the same.
以下、本発明を図面に従って詳細に説明する。 Hereinafter, the present invention will be described in detail with reference to the drawings.
第1図〜第2図は本発明による半導体搭載用基板の縦断
面図である。第1図においてガラス−エポキシ樹脂、ガ
ラス−変性トリアジン樹脂、ガラス−ポリイミド樹脂な
どのプラスチック材料からなる上下表面に金属箔(2)
が貼付された基板(1)に表面から裏面まで貫通する開
口部(3)が形成され、前記開口部(3)の基板裏面側
に前記開口部を閉塞するように金属板(4)が接着層
(5)を介して接合されることにより半導体搭載用凹部
(6)が形成されており、また、前記半導体搭載用凹部
(6)の底面全周にわたって、当該半導体搭載用凹部の
側面と連続する外周部を有する溝(7)が形成されてい
る。さらに前記基板(1)の裏面側に露出する部分の全
面、つまり基板の裏面側の金属板(4)及び基板(1)
の各露出面にはメッキ被膜(9)が一体形成されてい
る。1 and 2 are longitudinal sectional views of a semiconductor mounting substrate according to the present invention. In FIG. 1, metal foils (2) are formed on the upper and lower surfaces made of a plastic material such as glass-epoxy resin, glass-modified triazine resin and glass-polyimide resin.
An opening (3) penetrating from the front surface to the back surface is formed on the substrate (1) to which is adhered, and a metal plate (4) is adhered to the substrate rear surface side of the opening (3) so as to close the opening. The semiconductor mounting recess (6) is formed by joining the semiconductor mounting recess via the layer (5), and is continuous with the side surface of the semiconductor mounting recess (6) over the entire circumference of the bottom surface. A groove (7) having an outer peripheral portion is formed. Further, the entire surface of the portion exposed on the back side of the substrate (1), that is, the metal plate (4) and the substrate (1) on the back side of the substrate.
A plating film (9) is integrally formed on each exposed surface.
ところで接着材のはみ出しを防ぐためには、接着材を前
記開口部(3)の側壁面より内側に後退させるといった
方法があるが、その方法では基板(1)と金属板(4)
との接合面積が減少するので接着力が不足したり、搭載
された半導体素子を保護するために用いられる封止用樹
脂の、接着材を後退させた部分への回り込みが悪く、ボ
イドが発生しやすいといった欠点があるため、前記問題
点を解決する最良の手段とはならない。In order to prevent the adhesive from protruding, there is a method of retracting the adhesive to the inside of the side wall surface of the opening (3). In that method, the substrate (1) and the metal plate (4) are used.
Since the bonding area with and is reduced, the adhesive strength becomes insufficient, or the sealing resin used to protect the mounted semiconductor element does not easily get around to the part where the adhesive material has receded, causing voids. It is not the best means to solve the above problems because it has a drawback of being easy.
よって、本発明では前記半導体搭載用凹部(6)の底面
全周にわたって、当該半導体搭載用凹部(6)の側面と
連続する外周部を有する溝(7)を形成すると同時に前
記接着材のはみ出し部分(11)を切削することにより前
記半導体搭載用凹部側壁を形成する基板(1)から金属
板(4)に至までの面を平滑し、接着材のはみ出し部分
をなくすることを可能にした。ここで前記切削加工にお
いて、加工精度の点で金属板(4)の一部を同時に切削
した方が安易である。Therefore, in the present invention, a groove (7) having an outer peripheral portion continuous with the side surface of the semiconductor mounting recess (6) is formed over the entire circumference of the bottom surface of the semiconductor mounting recess (6), and at the same time, the protruding portion of the adhesive material is formed. By cutting (11), the surface from the substrate (1) forming the side wall of the recess for mounting semiconductor to the metal plate (4) was smoothed, and it was possible to eliminate the protruding portion of the adhesive. Here, in the cutting process, it is easier to cut a part of the metal plate (4) at the same time in terms of processing accuracy.
第2図は本発明の半導体搭載用基板の他の実施態様の構
造の縦断面図を示しており第1図と異って基板(1)の
裏面側に形成された凹所(10)に接着層(5)を介して
金属板(4)が接合されている。第2図における半導体
搭載用基板にあっても、半導体搭載用凹部側壁面は、第
1図の本発明による基板と同様に前記基板(1)から金
属板(4)に至るまでの平滑なる面が形成されるととも
に、半導体搭載用凹部底面の切削加工を前記底面周囲に
限定することが可能であるため半導体素子を直接固定す
る底面部分の金属板(4)の表面は材料とする金属平板
の表面形状をそのまま露出させ、平滑な面を容易に形成
することができる。第2図の半導体搭載用基板は第1図
に示すものに比較して基板全体を薄くすることが可能で
ある。FIG. 2 is a vertical cross-sectional view of the structure of another embodiment of the semiconductor mounting substrate of the present invention, which is different from FIG. 1 in the recess (10) formed on the back surface side of the substrate (1). The metal plate (4) is joined via the adhesive layer (5). Even in the semiconductor mounting substrate shown in FIG. 2, the semiconductor mounting recess side wall surface is a smooth surface from the substrate (1) to the metal plate (4) as in the substrate according to the present invention shown in FIG. And the surface of the metal plate (4) of the bottom portion for directly fixing the semiconductor element is made of a metal flat plate as a material. By exposing the surface shape as it is, a smooth surface can be easily formed. The semiconductor mounting substrate shown in FIG. 2 can be thinner than the substrate shown in FIG.
このように形成された半導体搭載用凹部(6)の底面全
周にわたって設けられた溝(7)は、半導体素子を該基
板に装着するときに用いられる銀ペースト等の接着材の
過剰部分の流れ込み用しても利用することができる。ま
た前記基板(1)の裏面側に露出する部分の全面に一体
形成されたメッキ被膜(9)により、基板裏面からの湿
気の侵入が防止され、ひいては搭載された半導体素子の
湿気による故障や腐食を防止することに非常に有効であ
る。The groove (7) provided over the entire circumference of the bottom surface of the semiconductor mounting recess (6) formed in this manner is used for inflow of an excessive portion of an adhesive such as silver paste used when mounting a semiconductor element on the substrate. You can also use it. Further, the plating film (9) integrally formed on the entire surface of the exposed portion on the back surface side of the substrate (1) prevents moisture from invading from the back surface of the substrate, and eventually damages or corrodes the mounted semiconductor element due to moisture. It is very effective in preventing
なお本発明の基板に用いられる接着材はエポキシ樹脂、
ポリイミド樹脂、アクリル樹脂、トリアジン樹脂あるい
はそれらの変性樹脂でありこれらの樹脂は接着性、耐熱
性、耐久性および電機絶縁性の面で優れているので有利
に使用される。また金属板としては銅、アルミニウム、
鉄あるいはそれぞれの合金など比較的熱伝導率の大きい
ものを有効に利用することができる。前記メッキ被膜の
材質として銅、ニッケル、金、錫などを用いることがで
きる。The adhesive used for the substrate of the present invention is an epoxy resin,
It is a polyimide resin, an acrylic resin, a triazine resin or a modified resin thereof, and these resins are advantageously used because of their excellent adhesiveness, heat resistance, durability and electrical insulating properties. As the metal plate, copper, aluminum,
It is possible to effectively use a material having a relatively high thermal conductivity such as iron or an alloy of each. Copper, nickel, gold, tin or the like can be used as the material of the plating film.
次に、本発明の半導体搭載用基板の製造方法を図面に従
って説明する。Next, a method for manufacturing a semiconductor mounting substrate of the present invention will be described with reference to the drawings.
第3図(a)〜(d)は本発明の半導体搭載用基板の縦
断面を工程順に示す図である。同図(a)に示すよう
に、金属箔(2)が基板の上下表面に貼着された基板
(1)の裏面側に、半導体搭載領域の周囲のみに設けら
れた接着層(5)を介して金属板(4)を接合する。次
に同図(b)に示すように前記金属板(4)及び基板
(1)の各外表面に一体にメッキ被膜(8)、(9)を
施す。次に同図(c)に示すように前記基板(1)に所
望の導体回路(8)を形成する。次に同図(d)に示す
ように基板(1)の半導体搭載領域の周囲に基板(1)
の表面から金属板(4)の内部まで到達するようにエン
ドミルによる溝掘り加工を施し、前記基板(1)の一部
分及び前記接着層(5)のはみ出し部分(11)を除去し
て半導体搭載用凹部(6)を形成すると同時に、前記金
属板(4)を切削して前記半導体搭載用凹部(6)の底
面全周にわたって当該半導体搭載用凹部の側面と連続す
る外周部を有する溝(7)を形成することにより、本発
明が目的とする基板を得ることができる。3 (a) to 3 (d) are views showing a longitudinal section of the semiconductor mounting substrate of the present invention in the order of steps. As shown in FIG. 3A, an adhesive layer (5) provided only around the semiconductor mounting area is provided on the back surface side of the substrate (1) having the metal foil (2) adhered to the upper and lower surfaces of the substrate. The metal plates (4) are joined to each other. Next, as shown in FIG. 2B, the plating films (8) and (9) are integrally applied to the outer surfaces of the metal plate (4) and the substrate (1). Next, a desired conductor circuit (8) is formed on the substrate (1) as shown in FIG. Next, as shown in FIG. 3D, the substrate (1) is formed around the semiconductor mounting area of the substrate (1).
For semiconductor mounting by performing grooving with an end mill so as to reach the inside of the metal plate (4) from the surface of the substrate and removing a part of the substrate (1) and the protruding part (11) of the adhesive layer (5). At the same time as forming the concave portion (6), the metal plate (4) is cut to form a groove (7) having an outer peripheral portion which is continuous with the side surface of the semiconductor mounting concave portion over the entire bottom surface of the semiconductor mounting concave portion (6). By forming the substrate, the substrate intended by the present invention can be obtained.
なお、このように加工された後あっては、半導体搭載用
凹部(6)内に半導体素子が銀ペーストなどを介して実
装される。After being processed in this way, a semiconductor element is mounted in the semiconductor mounting recess (6) via a silver paste or the like.
第4図は(a)〜(e)は本発明の半導体搭載用基板の
実施態様の他の縦断面を工程順に示す図である。同図
(a)に示すように金属箔(2)が基板の上下表面に貼
着された基板(1)の裏面側にエンドミルを用いて凹所
(10)を形成する。次に同図(b)に示すように前記凹
所(10)の底面に金属板(4)を半導体搭載領域の周囲
のみに設けられた接着層(5)を介して接合する。次に
同図(c)に示すように金属板(4)及び基板(1)の
各外表面に一体にメッキ被膜(8)、(9)を施す。次
に同図(d)に示すように前記基板(1)に所望の導体
回路(8)を形成する。次に同図(e)に示すように基
板(1)の半導体搭載領域の周囲に基板(1)の表面か
ら金属板(4)の内部まで到達するようにエンドミルに
よる溝掘り加工を施し、前記基板(1)の一部分及び前
記接着層(5)のはみ出し部分(11)を除去して半導体
搭載用凹部(6)を形成すると同時に、前記金属板
(4)を切削して前記半導体搭載用凹部(6)の底面全
周にわたって当該半導体搭載用凹部の側面と連続する外
周部を有する溝(7)を形成することにより本発明が目
的とする基板を得ることができる。FIGS. 4A to 4E are views showing another vertical cross section of the embodiment of the semiconductor mounting substrate of the present invention in the order of steps. As shown in FIG. 3A, a recess (10) is formed using an end mill on the back surface side of the substrate (1) having the metal foil (2) attached to the upper and lower surfaces of the substrate. Next, as shown in FIG. 2B, a metal plate (4) is bonded to the bottom surface of the recess (10) via an adhesive layer (5) provided only around the semiconductor mounting region. Next, as shown in FIG. 3C, the plating films (8) and (9) are integrally applied to the outer surfaces of the metal plate (4) and the substrate (1). Next, a desired conductor circuit (8) is formed on the substrate (1) as shown in FIG. Next, as shown in (e) of the figure, a groove is formed by an end mill so as to reach the periphery of the semiconductor mounting region of the substrate (1) from the surface of the substrate (1) to the inside of the metal plate (4). A part of the substrate (1) and a protruding part (11) of the adhesive layer (5) are removed to form a semiconductor mounting recess (6), and at the same time, the metal plate (4) is cut to cut the semiconductor mounting recess. By forming the groove (7) having the outer peripheral portion continuous with the side surface of the semiconductor mounting concave portion over the entire bottom surface of (6), the substrate intended by the present invention can be obtained.
以下実施例に基づいてさらに説明する。Further description will be given below based on examples.
実施例1 第1図においてガラス−エポキシ樹脂からなる基板
(1)の上下表面には銅箔(2)が貼着されており、前
記基板(1)の裏面側に矩形に中抜き加工を施したエポ
キシ樹脂からなる接着シート(5)を介してコーバル板
(4)を接合した。次に、前記基板(1)およびコーバ
ル板(4)の外表面全体に銅メッキ(8)、(9)を施
し、感光性樹脂フィルムを貼着し露光現像して回路パタ
ーンを形成したのち、エッチングを行ない、さらに導体
表面にニッケルメッキ、金メッキを施すことによって導
体回路(8)および基板裏面側のメッキ被膜(9)を形
成した。そののち基板(1)の表面からエンドミルによ
りコバール板(4)に到達する深さまで矩形に溝掘り加
工を施し、基板(1)の一部分及び接着層(5)のはみ
出し部分を除去することにより半導体搭載用凹部(6)
を形成すると同時に、金属板(4)を切削して前記半導
体搭載用凹部(6)の底面全周わたって当該半導体搭載
用凹部(6)の側面と連続する外周部を有する溝(7)
を形成し、本発明による半導体搭載用基板を製作した。Example 1 In FIG. 1, a copper foil (2) is attached to the upper and lower surfaces of a substrate (1) made of glass-epoxy resin, and a rectangular hollowing process is performed on the back side of the substrate (1). The corval plate (4) was joined via the adhesive sheet (5) made of the epoxy resin. Next, after copper plating (8) and (9) is applied to the entire outer surfaces of the substrate (1) and the coval board (4), a photosensitive resin film is attached and exposed and developed to form a circuit pattern, Etching was performed, and the conductor surface was plated with nickel and gold to form a conductor circuit (8) and a plating film (9) on the back surface side of the substrate. After that, a rectangular groove is formed from the surface of the substrate (1) to a depth reaching the Kovar plate (4) by an end mill, and a part of the substrate (1) and a protruding portion of the adhesive layer (5) are removed to form a semiconductor. Mounting recess (6)
Simultaneously with the formation of the groove, the metal plate (4) is cut to form a groove (7) having an outer peripheral portion which is continuous with the side surface of the semiconductor mounting recess (6) over the entire bottom surface of the semiconductor mounting recess (6).
Then, a semiconductor mounting substrate according to the present invention was manufactured.
実施例2 第2図においてガラス−変性トリアジン樹脂からなる基
板(1)の上下表面には銅箔(2)が貼着されており、
前記基板(1)の裏面側にエンドミルを用いて切削加工
を施し凹所(10)を形成した。次に前記凹所内にガラス
−変性トリアジン樹脂からなる接着シートを矩形に中抜
きして載置しリン青銅板(4)を合わせたのち150℃30
分の加圧加熱を施して接合した。そののち前記基板
(1)およびリン青銅板(4)の外表面全体に銅メッキ
を施し、基板表面に感光性樹脂フィルムを貼付し、所望
の回路パターン以外の部分に前記感光性樹脂フィルムを
残すように露光現像し、所望の回路パターン上のみに銅
メッキ、はんだメッキを施し前記はんだメッキをエッチ
ングレジストとしてエッチングを行ない、さらに導体表
面にニッケルメッキ、金メッキを施すことにより導体回
路(8)および基板裏面側のメッキ被膜(9)を形成し
た。そののち基板(1)の表面からエンドミルによりリ
ン青銅板(4)に到達する深さまで溝掘り加工を施し、
基板(1)の一部分及び接着層(5)のはみ出し部分を
除去することにより半導体搭載用凹部(6)を形成する
と同時に、金属板(4)を切削して前記半導体搭載用凹
部(6)の底面全周にわたって当該半導体搭載用凹部
(6)の側面と連続する外周部を有する溝(7)を形成
し、本発明による半導体搭載用基板を製作した。Example 2 In FIG. 2, a copper foil (2) is attached to the upper and lower surfaces of a substrate (1) made of a glass-modified triazine resin,
A cutting process was performed on the back surface side of the substrate (1) using an end mill to form a recess (10). Next, an adhesive sheet made of a glass-modified triazine resin was punched out in a rectangular shape and placed in the recess, and the phosphor bronze plate (4) was placed on the adhesive sheet.
Bonding was performed by applying pressure heating for a minute. After that, the entire outer surfaces of the substrate (1) and the phosphor bronze plate (4) are plated with copper, a photosensitive resin film is attached to the substrate surface, and the photosensitive resin film is left on a portion other than a desired circuit pattern. As described above, the conductor circuit (8) and the board are formed by exposing and developing, copper plating and solder plating only on a desired circuit pattern, etching using the solder plating as an etching resist, and nickel plating and gold plating on the conductor surface. A plating film (9) on the back side was formed. After that, from the surface of the substrate (1), an end mill is used to perform grooving processing to a depth reaching the phosphor bronze plate (4),
The semiconductor mounting recess (6) is formed by removing a part of the substrate (1) and the protruding portion of the adhesive layer (5), and at the same time, the metal plate (4) is cut to form the semiconductor mounting recess (6). A groove (7) having an outer peripheral portion continuous with the side surface of the semiconductor mounting recess (6) was formed over the entire circumference of the bottom surface to manufacture a semiconductor mounting substrate according to the present invention.
第7図は本発明の半導体搭載用基板を用いて製作された
ピングリッドアレイの一実施例を示す基板の裏面から見
た斜視図であり、また第8図は第7図に示す基板をA−
Aに沿って切った縦断面図である。このピングリッドア
レイは本発明の半導体搭載用基板(1)の半導体搭載用
凹部(6)に半導体素子(18)が搭載されたのち、ワイ
ヤーボンディングされさらに周囲をエポキシ樹脂(20)
で封止されている。また基板(1)の金属板(4)との
反対面側には封止樹脂用枠板(13)が接着層(14)を介
して接合されるとともに、外部接続用の導体ピン(16)
が前記封止樹脂用枠板(13)を貫通した形で導体回路と
電気的に接続したスルーホール(15)に固定されてい
る。FIG. 7 is a perspective view of an embodiment of a pin grid array manufactured using the semiconductor mounting substrate of the present invention as seen from the back side of the substrate, and FIG. 8 shows the substrate shown in FIG. −
It is a longitudinal cross-sectional view cut along A. This pin grid array is wire-bonded after the semiconductor element (18) is mounted in the semiconductor mounting recess (6) of the semiconductor mounting substrate (1) of the present invention, and the periphery is further coated with an epoxy resin (20).
It is sealed with. A frame plate (13) for sealing resin is joined to the surface of the substrate (1) opposite to the metal plate (4) via an adhesive layer (14), and a conductor pin (16) for external connection is also provided.
Is fixed to a through hole (15) electrically connected to the conductor circuit in a form penetrating the frame plate (13) for sealing resin.
〔発明の効果〕 以上のように本発明による半導体搭載用基板にあって
は、基板と金属板を接合する際に生ずる半導体搭載部へ
の接着材のはみ出し部分が完全に除去されるので半導体
搭載用凹部を有効に利用することができ、半導体搭載用
基板の小型化が容易である。また半導体搭載用凹部の底
面を平滑に仕上げることが容易であり、かつ半導体素子
を前記基板に固定する際に用いられるペーストの過剰部
分を前記凹部周囲の溝に流し込むことができるため搭載
される半導体素子の位置精度の向上、および該基板が安
定した品質で得られることによるコストダウンを計るこ
とが可能である。[Advantages of the Invention] As described above, in the semiconductor mounting substrate according to the present invention, since the protruding portion of the adhesive material to the semiconductor mounting portion, which occurs when the substrate and the metal plate are bonded, is completely removed. The recess for use can be effectively used, and the semiconductor mounting substrate can be easily miniaturized. Further, it is easy to finish the bottom surface of the semiconductor mounting recess smoothly, and the excess portion of the paste used when fixing the semiconductor element to the substrate can be poured into the groove around the recess, so that the semiconductor mounted. It is possible to improve the positional accuracy of the element and reduce the cost by obtaining the substrate with stable quality.
さらに、この半導体搭載用基板にあっては、裏面側に露
出する部分の全面にメッキ被膜を形成したから、これに
よって上記金属板が保護されるとともに当該半導体搭載
用基板の耐湿性が向上している。Further, in this semiconductor mounting substrate, since the plating film is formed on the entire surface exposed on the back surface side, this protects the metal plate and improves the moisture resistance of the semiconductor mounting substrate. There is.
第1図は本発明による半導体搭載用基板の縦断面図、第
2図は本発明の半導体搭載用基板の他の実施態様の構造
の縦断面図である。第3図は本発明による半導体搭載用
基板の縦断面を工程順に示す図であり、第4図は本発明
の半導体搭載用基板の他の実施態様の縦断面を工程順に
示した図である。第5図および第6図はそれぞれ従来例
の半導体搭載用基板の縦断面図である。第7図は本発明
の半導体搭載用基板を用いて製作されたピングリッドア
レイの一例を示す基板を裏面からみた斜視図であり、ま
た第8図は第7図に示す基板をA−A線に沿って切った
縦断面図である。 符号の説明 1……基板、2……銅箔、3……開口部、4……金属
板、5……接着層、6……半導体搭載用凹部、7……
溝、8……導体回路、9……メッキ被膜、10……凹所、
11……接着材のはみ出し部分、12……半導体搭載用凹部
底面の凹凸、13……封止樹脂用枠板、14……接着層、15
……スルーホール、16……導体ピン、17……導体ピンの
鍔、18……半導体素子、19……ボンディングワイヤー、
20……封止樹脂。FIG. 1 is a vertical sectional view of a semiconductor mounting substrate according to the present invention, and FIG. 2 is a vertical sectional view of a structure of another embodiment of the semiconductor mounting substrate of the present invention. FIG. 3 is a diagram showing a vertical cross section of a semiconductor mounting substrate according to the present invention in the order of steps, and FIG. 4 is a vertical cross section of another embodiment of the semiconductor mounting substrate of the present invention in the order of steps. 5 and 6 are vertical cross-sectional views of a conventional semiconductor mounting substrate. FIG. 7 is a perspective view of a substrate showing an example of a pin grid array manufactured by using the semiconductor mounting substrate of the present invention when viewed from the back side, and FIG. 8 is a diagram showing the substrate shown in FIG. It is a longitudinal cross-sectional view cut along. Explanation of symbols 1 ... Substrate, 2 ... Copper foil, 3 ... Opening, 4 ... Metal plate, 5 ... Adhesive layer, 6 ... Recess for semiconductor mounting, 7 ...
Groove, 8 ... Conductor circuit, 9 ... Plating film, 10 ... Recess,
11 …… Adhesive material protruding part, 12 …… Concavo-convex bottom surface of semiconductor mounting recess, 13 …… Sealing resin frame plate, 14 …… Adhesive layer, 15
...... Through hole, 16 ...... Conductor pin, 17 …… Collector pin collar, 18 …… Semiconductor element, 19 …… Bonding wire,
20 ... Sealing resin.
Claims (4)
板の半導体搭載領域に、前記基板の表面から裏面まで貫
通する開口部が形成されており、前記開口部の基板裏面
側に前記開口部を閉塞するように金属板が接着層を介し
て接合されることにより半導体搭載用凹部が形成された
半導体搭載用基板において、 前記半導体搭載用凹部の底面全周にわたって、当該半導
体搭載用凹部の側面と連続する外周部を有する溝が形成
されており、 かつ前記基板の裏面側に露出する部分の全面にメッキ被
膜が一体形成されてなることを特徴とする半導体搭載用
基板。1. A semiconductor mounting area of a semiconductor mounting substrate made of a plastic material is formed with an opening penetrating from the front surface to the back surface of the substrate, and the opening is closed on the back surface side of the substrate. In the semiconductor mounting substrate in which the semiconductor mounting recess is formed by bonding the metal plates through the adhesive layer as described above, the side surface of the semiconductor mounting recess is continuous over the entire bottom surface of the semiconductor mounting recess. A semiconductor mounting substrate, wherein a groove having an outer peripheral portion is formed, and a plating film is integrally formed on the entire surface of a portion exposed on the back surface side of the substrate.
裏面側の周辺領域には凹所が形成されており、前記凹所
に金属板が接着層を介して接合されていることを特徴と
する特許請求の範囲第1項記載の半導体搭載用基板。2. A recess is formed in a peripheral region of the opening of the semiconductor mounting substrate on the back surface side of the substrate, and a metal plate is bonded to the recess through an adhesive layer. The semiconductor mounting substrate according to claim 1.
搭載用基板の製造方法。 (a)プラスチック材料からなる半導体搭載用基板の裏
面側に、前記基板の半導体搭載領域の周囲のみ設けられ
た接着層を介して金属板を接合する工程; (b)前記金属板及び基板の各外表面にメッキを施す工
程; (c)前記基板に導体回路を形成する工程; (d)前記基板の半導体搭載領域の周囲に前記基板の表
面から前記金属板の内部まで到達する連続した溝掘り加
工を施すことにより、前記基板の一部分及び前記接着層
のはみ出し部分を除去して半導体搭載用凹部を形成する
と同時に、前記金属板を切削して前記半導体搭載用凹部
の底面全周にわたって当該半導体搭載用凹部の側面と連
続する外周部を有する溝を形成する工程。3. A method of manufacturing a semiconductor mounting substrate comprising the steps (a) to (d) below. (A) a step of joining a metal plate to the back side of a semiconductor mounting substrate made of a plastic material via an adhesive layer provided only around the semiconductor mounting region of the substrate; (b) each of the metal plate and the substrate A step of plating an outer surface; (c) a step of forming a conductor circuit on the substrate; (d) a continuous grooving around the semiconductor mounting area of the substrate to reach the inside of the metal plate from the surface of the substrate By processing, a part of the substrate and the protruding portion of the adhesive layer are removed to form a semiconductor mounting recess, and at the same time, the metal plate is cut to cover the entire bottom surface of the semiconductor mounting recess. Forming a groove having an outer peripheral portion continuous with the side surface of the recess for use.
搭載用基板の製造方法。 (a)プラスチック材料からなる半導体搭載用基板の半
導体搭載領域の裏面に凹所を形成する工程; (b)前記凹所内の底面に半導体搭載領域の周囲のみに
設けられた接着層を介して金属板を接合する工程; (c)前記金属板及び基板の各外表面にメッキを施す工
程; (d)前記基板に導体回路を形成する工程; (e)前記基板の半導体搭載領域の周囲に前記基板の表
面から前記金属板の内部まで到達する連続した溝掘り加
工を施すことにより、前記基板の一部分及び前記接着層
のはみ出し部分を除去して半導体搭載用凹部を形成する
と同時に、前記金属板を切削して前記半導体搭載用凹部
の底面全周にわたって当該半導体搭載用凹部の側面と連
続する外周部を有する溝を形成する工程。4. A method of manufacturing a semiconductor mounting substrate, which comprises the following steps (a) to (e). (A) A step of forming a recess on the back surface of the semiconductor mounting region of a semiconductor mounting substrate made of a plastic material; (b) Metal with an adhesive layer provided only on the periphery of the semiconductor mounting region on the bottom surface of the recess. A step of joining the plates; (c) a step of plating the outer surfaces of the metal plate and the substrate; (d) a step of forming a conductor circuit on the substrate; (e) the step around the semiconductor mounting area of the substrate By performing a continuous grooving process that reaches the inside of the metal plate from the surface of the substrate, a part of the substrate and the protruding portion of the adhesive layer are removed to form a semiconductor mounting recess, and at the same time, the metal plate is formed. A step of cutting to form a groove having an outer peripheral portion continuous with the side surface of the semiconductor mounting recess over the entire circumference of the bottom surface of the semiconductor mounting recess.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17812786A JPH0746708B2 (en) | 1986-07-29 | 1986-07-29 | Semiconductor mounting substrate and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP17812786A JPH0746708B2 (en) | 1986-07-29 | 1986-07-29 | Semiconductor mounting substrate and manufacturing method thereof |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6334961A JPS6334961A (en) | 1988-02-15 |
| JPH0746708B2 true JPH0746708B2 (en) | 1995-05-17 |
Family
ID=16043126
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP17812786A Expired - Lifetime JPH0746708B2 (en) | 1986-07-29 | 1986-07-29 | Semiconductor mounting substrate and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0746708B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11770894B2 (en) | 2020-07-22 | 2023-09-26 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO1997033186A1 (en) | 1996-03-08 | 1997-09-12 | Nihon Shingo Kabushiki Kaisha | Optical barrier |
-
1986
- 1986-07-29 JP JP17812786A patent/JPH0746708B2/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11770894B2 (en) | 2020-07-22 | 2023-09-26 | Samsung Electro-Mechanics Co., Ltd. | Printed circuit board |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6334961A (en) | 1988-02-15 |
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