JPH0750613A - Synchronizing device for spread spectrum communication receiver - Google Patents

Abstract

(57) [Abstract] [Purpose] It is an object of the present invention to provide a synchronizer for a spread spectrum communication receiver that holds synchronization of a time window, and to make it easy to maintain synchronization in a steady mode. [Structure] In a spread spectrum communication receiver that provides a time window for a signal that is despread with a predetermined sampling clock and demodulates using a signal that has passed through this time window, An envelope detector that performs envelope detection, and an integrating unit that inputs the envelope detection signal for each sampling point and integrates the value of each sampling point within one cycle of the spreading code over a plurality of cycles of the spreading code. Peak position detector that detects the maximum peak position from the integrated value of each sampling point, peak position comparator that compares the center position of the time window with the peak position detected by the peak position detector, and peak position comparison And a sampling clock control means that shifts the phase of the sampling clock in the direction in which the difference between the two is minimized.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a receiver for spread spectrum communication in which a time window is provided for a signal subjected to spectrum despreading and demodulation is performed using a signal which has passed through this time window. The present invention relates to a synchronization device for a spread spectrum communication receiver that holds data.

[0002]

2. Description of the Related Art FIG. 3 shows the configuration of a conventional spread spectrum communication receiver. In the figure, the passive correlator 31 is
Input the I and Q signals obtained by quadrature detection of the received signal,
The correlation value with the spread code is output. The time window controller 32 is
The output signal of the passive correlator 31 is input, and the signal passing through the time window is output. The differential detector 33 includes a time window controller 32.
The output signal of is input and delay detection is performed for each cycle of the spread code. The diversity combiner 34 inputs the detection output of the delay detector 33, performs diversity combining, and further, the decoder 3
5 decodes the output of the diversity combiner 34.

Further, the output signal of the passive correlator 31 is branched and input to the envelope detector 36, and the envelope is detected. The peak position detector 37 inputs the output signal of the envelope detector 36 and detects the maximum peak position within one cycle of the spread code. The changeover switch 38 sends the output signal of the peak position detector 37 to the averager 39 in the initial mode. The averaging device 39 averages the peak positions output from the peak position detector 37 over a plurality of cycles of the spread code, and stores them in the time window center position memory 40 as the first center position of the time window. The time window controller 32 sets the time window center position stored in the time window center position memory 40 as an initial value.

The oscillator 41 supplies a signal having a frequency m times (m is an integer of 2 or more) the chip frequency of the spread code to the m divider 42. The m-divider 42 generates a sampling clock by dividing the output signal of the oscillator 41 by m, and the passive correlator 31, the time window controller 32, the delay detector 33, the diversity combiner 34, the envelope detector 36, It is supplied to the peak position detector 37.

On the other hand, the changeover switch 38 sends the output signal of the peak position detector 37 to the peak position comparator 43 in the steady mode. The peak position comparator 43 compares the peak position output from the peak position detector 37 with the time window center position stored in the time window center position memory 40, and up / down counters the value according to the comparison result. 44. The up / down counter 44 adds the output value of the peak position comparator 43, and when the counter value exceeds a threshold value, sends a shift signal instructing the shift of the phase of the sampling clock to the m-frequency divider 42, and the counter Reset the value.

The synchronizer for maintaining the synchronization of the time windows in the time window controller 32 is an envelope detector 36, a peak position detector 37, a changeover switch 38, an averaging device 39,
The time window center position memory 40, the peak position comparator 43, and the up / down counter 44 are included.

As described above, the spread spectrum communication receiver has the initial mode and the steady mode, and each operates differently. That is, in the initial mode, since the time window controller 32 has no time window set, the control using the time window is not performed. At this time, the synchronizer detects the center position of the time window set as the initial value in the time window controller 32 by the envelope detector 36, the peak position detector 37, the averaging device 39, and the time window center position memory 40. , A time window is set in the time window controller 32.

In the steady mode, the time window controller 32
Operates and control using the time window is performed. At this time,
The synchronizer includes an envelope detector 36 and a peak position detector 3
7, time window center position memory 40, peak position comparator 4
3. With the up / down counter 44, the peak position (the output of the peak position detector 37) and the center position of the time window (the value stored in the time window center position memory 40) within one cycle of the spread code.
The synchronization is maintained by controlling so that the difference between the two becomes minimum.

That is, the peak position comparator 43 outputs "+1" when the peak position within one cycle of the spread code is larger than the center position of the time window, and outputs "-1" when it is smaller.
Is output, and the up / down counter 44 successively adds.
Here, when the counter value of the up / down counter 44 exceeds the threshold value, the shift signal for instructing the shift of the phase of the sampling clock is sent to the m-frequency divider 42, so that the phase of the sampling clock shifts. Windows are kept synchronized.

[0010]

In the conventional synchronizer for a spread spectrum communication receiver, the peak position detector 37 determines all envelope detection values within one cycle of the spread code in the steady mode. ing. However, since one cycle of the spread code also has a noise component, an error may occur between the value of the peak position detector 37 and the actual correlation peak position. Since this error becomes a comparison error in the peak position comparator 43 and a phase control error of the sampling clock in the m-frequency divider 42, it may be difficult to maintain synchronization.

An object of the present invention is to provide a synchronization device for a spread spectrum communication receiver which eliminates the above error factors and can easily maintain synchronization in a steady mode.

[0012]

A synchronizer for a spread spectrum communication receiver according to the present invention provides a time window for a signal despread with a predetermined sampling clock, and a signal passing through this time window is set. In a spread spectrum communication receiver that demodulates by using, the envelope detector that performs envelope detection on the signal that has been despread by the spectrum and the output signal of the envelope detector are input for each sampling point, and the spread code And a peak position for detecting the maximum peak position from the integrated value of each sampling point after the spread code has passed a plurality of cycles of the spreading code. A detector,
The phase of the sampling clock is shifted in the direction in which the difference between the peak position comparator that compares the center position of the time window and the peak position detected by the peak position detector and the peak position comparator is minimized. And a sampling clock control means.

[0013]

In the present invention, the envelope detection signal is integrated for each sampling point in one cycle of the spreading code over a plurality of cycles of the spreading code, and the correlation peak position is detected from the integrated value of each sampling point. It has a feature. This makes it possible to detect the correlation peak position within one cycle of the spread code while suppressing the influence of noise. Therefore, the comparison operation between the center position of the time window and the correlation peak position is stable,
It is possible to easily hold synchronization.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows the configuration of a first embodiment of the present invention.
The same components as those in the conventional configuration shown in FIG. 3 are designated by the same reference numerals.

In the figure, the feature of this embodiment lies in the configuration from the envelope detector 36 activated in the steady mode to the peak position comparator 43. That is, the output of the envelope detector 36 is input via the changeover switch 38 to the integrating means composed of the adder 11 and the memory 12, and its output is input to the peak position detector 13.
The detected peak position is input to the peak position comparator 43. The value of the memory 12 is reset at the same time when the changeover switch 38 is switched to the steady mode.

The other structure is the same as the conventional structure shown in FIG. A matched filter or convolver can be used for the passive correlator 31. Further, the sampling clock control means in the present invention corresponds to the oscillator 41, the m frequency divider 42 and the up / down counter 44 in this embodiment.

Since the adder 11 and the memory 12 constituting the integrating means are sampled n times during one cycle of the spread code, n pieces are prepared for each. The n adders 11 add the value of each sampling point of the envelope detection signal and the value of the corresponding memory 12 and store the sum in each memory 12. By repeating this over a plurality of cycles of the spread code, the integrated value at each sampling point of the envelope detection signal can be obtained. In the peak position detector 13, after a plurality of spread code cycles have passed, each memory 1
The maximum value is detected from the integrated value of each sampling point stored in 2 and the corresponding peak position is detected by the peak position comparator 4
Output to 3. At this time, the value of each memory 12 is reset.

As described above, in the steady mode, the envelope detection signal is integrated at each sampling point within one period of the spread code, and the correlation peak position is detected from the integrated value at each sampling point, thereby affecting the noise. It is possible to detect the correlation peak position within one cycle of the spread code with high accuracy while suppressing. At this time, the synchronization device causes the peak position (output of the peak position detector 37) and the center position of the time window (stored value in the time window center position memory 40) within one cycle of the spread code.
The synchronization is maintained by controlling so that the difference between the two becomes minimum. That is, the sampling clock generated by the oscillator 41 and the m-frequency divider 42 shifts the phase by the shift signal given from the up / down counter 44 to hold the time windows in synchronism.

In the initial mode, as in the conventional case, the peak position detector 37 converts the envelope detection signal from the spread code to 1
The maximum peak position in the cycle is detected, the averaging device 39 further averages the spread codes over a plurality of cycles, and the time window center position memory 40 is set as the first position of the time window center position.
And is set as an initial value in the time window controller 32. However, it is possible to use the integrating means shown in the present embodiment in place of the averaging device 39. An example will be shown below.

FIG. 2 shows the configuration of the second embodiment of the present invention. The same parts as those in the first embodiment shown in FIG. 1 are designated by the same reference numerals. In the figure, the feature of this embodiment is that the peak position of the envelope detection signal that determines the center position of the time window is detected by applying the configuration of the first embodiment and using the integrating means also in the initial mode. It is in the mechanism to do. That is, the output of the envelope detector 36 is the adder 11 and the memory 12
Is input to the integrating means constituted by and its output is input to the peak position detector 13, and the peak position detected there is input to the time window center position memory 40 in the initial mode via the changeover switch 38. In the steady mode, the peak position comparator 43 is input. Other configurations are the same as those in the first embodiment.

When the changeover switch 38 is set to the initial mode at the start of communication, the value in the memory 12 is reset at the same time. In the initial mode, the n adders 11 add the value of each sampling point of the output signal of the envelope detector 36 and the corresponding value of the memory 12 and store the sum in each memory 12. By repeating this over a plurality of cycles of the spread code, the integrated value at each sampling point of the envelope detection signal can be obtained. Peak position detector 13
Then, after the lapse of a plurality of cycles of the spread code, the maximum value is detected from the integrated value of each sampling point stored in each memory 12, and the corresponding peak position is set as the first center position of the time window. Output to. The time window controller 32 sets the time window center position stored in the time window center position memory 40 as an initial value.

Next, when the changeover switch 38 is set to the steady mode, the value of each memory 12 is simultaneously reset. The steady mode is the same as in the first embodiment described above, and will be omitted.

As described above, in the initial mode and the steady mode, the envelope detection signal is integrated for each sampling point within one period of the spread code, and the correlation peak position is detected from the integrated value of each sampling point, It is possible to detect the correlation peak position within one cycle of the spread code with high accuracy while suppressing the influence of noise. Therefore, in the initial mode, the first center position of the time window is accurately determined,
It can be set in the time window controller 32. Further, in the steady mode, the time windows can be easily held in synchronization as in the first embodiment.

[0024]

As described above, according to the present invention, the envelope detection signal is integrated for each sampling point within one cycle of the spreading code, and the correlation peak is calculated from the integrated value of each sampling point over a plurality of cycles of the spreading code. By detecting the position, a position close to the actual correlation peak position can be obtained. That is, the synchronization can be easily maintained even in the presence of noise.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of an embodiment of the invention described in claim 1.

FIG. 2 is a block diagram showing the configuration of an embodiment of the invention described in claim 2.

FIG. 3 is a block diagram showing a configuration of a conventional spread spectrum communication receiver.

[Explanation of symbols]

 11 Adder 12 Memory 13 Peak position detector 31 Passive correlator 32 Time window controller 33 Delay detector 34 Diversity combiner 35 Decoder 36 Envelope detector 37 Peak position detector 38 Changeover switch 39 Averager 40 Time window center Position memory 41 Oscillator 42 m Divider 43 Peak position comparator 44 Up-down counter

Claims (1)

[Claims] 1. A spread spectrum communication receiver for performing a demodulation using a signal that has undergone spectrum despreading with a predetermined sampling clock and using a signal that has passed through this time window. An envelope detector for performing envelope detection on the received signal, and an output signal of the envelope detector is input for each sampling point, and the value of each sampling point in one cycle of the spreading code is input to a plurality of cycles of the spreading code. Integrating means for integrating over, a peak position detector for detecting the maximum peak position from the integrated value of each sampling point after a plurality of spread code cycles, a center position of the time window, and the peak position The peak position comparator for comparing the peak position detected by the detector and the sample position in the direction in which the difference between the peak position comparator and the peak position comparator is minimized. Synchronizer of the spread spectrum communication receiver, characterized in that a sampling clock control means for shift the phase of Gukurokku.