JPH0754796B2 - Thin film manufacturing method - Google Patents
Thin film manufacturing methodInfo
- Publication number
- JPH0754796B2 JPH0754796B2 JP58202619A JP20261983A JPH0754796B2 JP H0754796 B2 JPH0754796 B2 JP H0754796B2 JP 58202619 A JP58202619 A JP 58202619A JP 20261983 A JP20261983 A JP 20261983A JP H0754796 B2 JPH0754796 B2 JP H0754796B2
- Authority
- JP
- Japan
- Prior art keywords
- thin film
- amorphous
- substrate
- single crystal
- light
- Prior art date
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
- H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/22—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials using physical deposition, e.g. vacuum deposition or sputtering
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- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/29—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by the substrates
- H10P14/2901—Materials
- H10P14/2902—Materials being Group IVA materials
- H10P14/2905—Silicon, silicon germanium or germanium
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- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/32—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by intermediate layers between substrates and deposited layers
- H10P14/3202—Materials thereof
- H10P14/3238—Materials thereof being insulating materials
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- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3406—Carbon, e.g. diamond-like carbon
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- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3408—Silicon carbide
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- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
- H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
- H10P14/3411—Silicon, silicon germanium or germanium
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- H—ELECTRICITY
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- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/34—Deposited materials, e.g. layers
- H10P14/3451—Structure
- H10P14/3452—Microstructure
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- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
- H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
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- H—ELECTRICITY
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- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/20—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials
- H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
- H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
- H10P14/3818—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using particle beams
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Description
【発明の詳細な説明】 〔発明の利用分野〕 本発明はSi,SiC等の非晶質薄膜、特に単結晶化に好適な
非晶質薄膜の製造方法に係り、さらに詳しくは、三次元
構造の半導体素子の製造に好適な単結晶化の容易な非晶
質薄膜の製造方法に関する。Description: FIELD OF THE INVENTION The present invention relates to a method for producing an amorphous thin film of Si, SiC or the like, particularly an amorphous thin film suitable for single crystallization, and more specifically, a three-dimensional structure. The present invention relates to a method for producing an amorphous thin film which is suitable for producing a semiconductor element and which can be easily single-crystallized.
Si単結晶基板を結晶成長の種とし、該基板上に形成した
絶縁膜上に該基板上から延びて堆積された多結晶または
非晶質Si薄膜を単結晶化する方法には、レーザ・アニー
ルを用いたブリッジング・エピタキシャル法がある（特
開昭56−73697号公報参照）。この場合、堆積した多結
晶または非晶質Si薄膜を一度溶融させ、固化する際に結
晶成長させるものであり、溶融手段としては、レーザ光
の他に電子ビーム、ストリップ・ヒーター等が用いられ
る。しかし、この方法ではSi薄膜を一度溶融させ、続い
て固化させるため、折角表面が平滑な多結晶または非晶
質Siを用いても、膜表面に凹凸が生じるという点が、こ
の方法をLSI等の半導体装置に適用する上での最大の欠
点となっている。また一方、すでに素子の形成された下
地基板の上に絶縁膜を介して、この技術を用て単結晶Si
を結晶成長させれば、Si薄膜の溶融に伴ない、下地基板
に形成されている素子が熱的損傷を受けることになる。
したがって、ブリッジング・エピタキシャル法を用て所
謂三次元デバイスを製作することは極めて困難といわざ
るを得ない。Laser annealing is used as a method for single-crystallizing a polycrystalline or amorphous Si thin film extending from the substrate on an insulating film formed on the substrate using the Si single-crystal substrate as a seed for crystal growth. There is a bridging / epitaxial method using the above (see Japanese Patent Laid-Open No. 56-73697). In this case, the deposited polycrystalline or amorphous Si thin film is melted once and crystal is grown when it is solidified. As a melting means, an electron beam, a strip heater or the like is used in addition to laser light. However, in this method, since the Si thin film is melted once and then solidified, even if polycrystalline or amorphous Si having a smooth surface is used, unevenness occurs on the film surface. Is the biggest drawback in applying to the semiconductor device. On the other hand, using this technique, a single crystal Si is formed on the underlying substrate on which the device has already been formed, via an insulating film.
If the crystal is grown, the element formed on the base substrate will be thermally damaged as the Si thin film is melted.
Therefore, it must be said that it is extremely difficult to manufacture a so-called three-dimensional device using the bridging epitaxial method.
本発明の目的は、以上のような従来技術の欠点をなく
し、下地基板もしくは下地基板上に作製した素子に損傷
を与えることなく、表面形状が平滑で稠密な所望する物
質の薄膜を、下地基板もしくは一部に絶縁膜を有する下
地基板上に形成させることができる薄膜の製造方法を提
供することにある。The object of the present invention is to eliminate the above-mentioned drawbacks of the prior art and to form a thin film of a desired substance having a smooth surface and a dense surface without damaging the underlying substrate or an element formed on the underlying substrate. Alternatively, it is to provide a method for manufacturing a thin film that can be formed on a base substrate having an insulating film in part.
本発明の基本的な考え方は、例えば、表面の一部に絶縁
膜を形成されたSi基板の上に非晶質Si薄膜を被着し、そ
の後基板を電気炉あるいはレーザ光等で加熱し、非晶質
Si薄膜を溶融することなく、固相反応で単結晶Si薄膜を
結晶成長させる所にある。この場合、基板Siと非晶質Si
薄膜との界面清浄度及び非晶質Si薄膜の稠密性をいかに
して高めるかが固相成長成功のポイントとなっている。The basic idea of the present invention is, for example, depositing an amorphous Si thin film on a Si substrate having an insulating film formed on a part of the surface, and then heating the substrate with an electric furnace or laser light, Amorphous
This is a place where single-crystal Si thin films are grown by solid phase reaction without melting the Si thin films. In this case, substrate Si and amorphous Si
How to improve the cleanliness of the interface with the thin film and the denseness of the amorphous Si thin film is the key to successful solid phase growth.
前者の問題点は超高真空中で基板表面を清浄化し、その
まま同じ真空槽内でSiを蒸着（分子蒸着）することによ
り解決することが可能である。一方、後者の問題点は非
晶質Ｓ薄膜の堆積速度を遅くする、さらに堆積後にイオ
ン打込みによりボイド等を消滅させる等の方法により改
善がはかられているものの未だ充分とはいい難い状態で
ある。もし非晶質Si薄膜の稠密性が充分でないと、結晶
成長中に体積変化が生じ、そのためストレス等が発生
し、結晶成長の進行が阻害されることになる。The former problem can be solved by cleaning the substrate surface in ultra-high vacuum and then depositing Si (molecular vapor deposition) in the same vacuum chamber. On the other hand, the latter problem has been improved by methods such as slowing down the deposition rate of the amorphous S thin film and eliminating the voids by ion implantation after the deposition, but it is still not enough. is there. If the denseness of the amorphous Si thin film is not sufficient, a volume change occurs during crystal growth, which causes stress or the like to hinder the progress of crystal growth.
そこで、本発明は作製する非晶質Si薄膜の高稠密化の問
題点を解決し、固相反応で表面平滑な単結晶Si薄膜をを
得ることができる新しい方法を提供するものである。Therefore, the present invention provides a new method capable of solving the problem of high densification of an amorphous Si thin film to be produced and obtaining a single crystal Si thin film having a smooth surface by a solid-phase reaction.
まず、本発明の基本的な考え方について説明する。First, the basic idea of the present invention will be described.
堆積する非晶質Si薄膜の稠密性を高めるには、ボイドの
発生を防ぎながら、Si薄膜を堆積することが必要であ
る。今、２個又は３個以上の分子が連なった状態でSi薄
膜を堆積すれば、クラスターとクラスターの間にボイド
が生じ、得られる非晶質Si薄膜の稠密性が低下すること
になる。したがって、稠密性を高めるためには、単原子
状態でSi原子を堆積するか、分子状態で堆積したSi原子
間のボンドを堆積後に基板表面で切断するようにする工
夫が必要である。Si−Si間の結合エネルギーは3.0eVで
あるから、それ以上のエネルギーを有する光を照射しつ
つ、Si膜を堆積すれば上記の条件は満足されることにな
る。In order to increase the denseness of the deposited amorphous Si thin film, it is necessary to deposit the Si thin film while preventing the generation of voids. Now, when Si thin films are deposited in a state where two or more molecules are connected, voids are generated between the clusters, and the denseness of the obtained amorphous Si thin film is lowered. Therefore, in order to improve the denseness, it is necessary to devise to deposit Si atoms in a monoatomic state or to cut bonds between Si atoms deposited in a molecular state on the substrate surface after deposition. Since the Si-Si bond energy is 3.0 eV, the above conditions can be satisfied if the Si film is deposited while irradiating light having an energy higher than that.
以下本発明を実施例によって具体的に説明する。 The present invention will be specifically described below with reference to examples.
非晶質Si薄膜の堆積には通常の分子線蒸着装置を用い
た。同装置の基本構造を第１図（ａ）、（ｂ）に示す。
図において、１は真空容器、２は超高真空排気系への接
続部、３は被蒸着試料を載置した試料取付台、４は光
源、５は光透通窓、６は反射鏡、７は蒸発部、８は試料
である。蒸発部７では蒸発用試料を抵抗加熱、電子ビー
ム加熱等の通常の手法によって蒸発させるようになって
いる。A conventional molecular beam deposition apparatus was used to deposit the amorphous Si thin film. The basic structure of the device is shown in FIGS. 1 (a) and 1 (b).
In the figure, 1 is a vacuum container, 2 is a connection part to an ultrahigh vacuum exhaust system, 3 is a sample mount on which a sample to be vapor-deposited is mounted, 4 is a light source, 5 is a light transmitting window, 6 is a reflecting mirror, 7 Is an evaporator, and 8 is a sample. In the evaporation unit 7, the evaporation sample is evaporated by a usual method such as resistance heating or electron beam heating.
以上の装置を用い、第２図（ａ）に示すような、表面の
一部に酸化膜９（厚さ0.1μｍ）をもったSi単結晶基板1
0の表面上にSiの分子線蒸着（真空度:10-11Torr,基板温
度：室温，堆積速度:1Å/sec）を行ないつつ、同時に光
照射した場合の結果について述べる。光源４には、CW・
Arレーザーの第２高調波（波長:0.26,0.24μｍ）を用
い、第１図（ｂ）に示すように試料基板10に平行に光を
導入した。蒸着終了後には基板10から酸化膜９上にかけ
て非晶質Si薄膜11が堆積されていることがわかった。Using the above apparatus, a Si single crystal substrate 1 having an oxide film 9 (thickness 0.1 μm) on a part of the surface as shown in FIG. 2 (a)
We will describe the results of simultaneous irradiation with molecular beam deposition of Si (vacuum degree: 10 -11 Torr, substrate temperature: room temperature, deposition rate: 1Å / sec) on 0 surface. The light source 4 has a CW
Using the second harmonic (wavelength: 0.26, 0.24 μm) of an Ar laser, light was introduced parallel to the sample substrate 10 as shown in FIG. 1 (b). It was found that after the vapor deposition, the amorphous Si thin film 11 was deposited from the substrate 10 to the oxide film 9.
以上の分子線蒸着を３時間行ない、約１μｍの厚さを有
する非晶質Si薄膜11を堆積した〔第２図（ｂ）〕後に光
学的測定を行ない、非晶質Si薄膜の屈折率を求めた所、
単結晶Siのそれ（4.0）と大略同じ値が得られた。一
方、光照射を行なわないで堆積した試料の場合、屈折率
の値は3.3と小さく、したがって、光照射と分子線蒸着
を同時に行なうことにより、緻密な非晶質Si薄膜が得ら
れることがわかった。The above molecular beam deposition was carried out for 3 hours, and an amorphous Si thin film 11 having a thickness of about 1 μm was deposited [FIG. 2 (b)]. Then, optical measurement was performed to determine the refractive index of the amorphous Si thin film. Where I asked,
Almost the same value as that of single crystal Si (4.0) was obtained. On the other hand, in the case of the sample deposited without light irradiation, the refractive index value was as small as 3.3. Therefore, it was found that a dense amorphous Si thin film can be obtained by performing light irradiation and molecular beam evaporation at the same time. It was
これらの試料を、電気炉でアニール（600℃,4時間）し
た所、光照射した非晶質Si薄膜では第２図（ｃ）に示す
ように、酸化膜９の端から酸化膜９上に約４μｍの長さ
で基板10の上から延びて単結晶成長領域12が観察され
た。また、その前方は多結晶Si領域13であった。さらに
長時間のアニールを行なえば、非晶質Si薄膜11の全体が
単結晶化される。When these samples were annealed (600 ° C., 4 hours) in an electric furnace, the amorphous Si thin film irradiated with light was irradiated from the edge of the oxide film 9 onto the oxide film 9 as shown in FIG. 2 (c). A single crystal growth region 12 was observed extending from above the substrate 10 with a length of about 4 μm. In front of it, there was a polycrystalline Si region 13. If annealing is performed for a further long time, the entire amorphous Si thin film 11 is single-crystallized.
一方、光照射していない試料の場合には、単結晶成長領
域の長さは高々0.5〜1.0μｍ程度であった。また、第１
図（ａ）のような光照射法を用いた場合も、上記とほぼ
同様な結果が得られた。On the other hand, in the case of the sample not irradiated with light, the length of the single crystal growth region was at most about 0.5 to 1.0 μm. Also, the first
Even when the light irradiation method as shown in FIG. 6A was used, almost the same results as above were obtained.
これらの実験結果から、本発明の有効性が確認された。From these experimental results, the effectiveness of the present invention was confirmed.
以上説明したように、本発明は、例えばSiの蒸着中に光
が導入され、光照射とSiの蒸着とが同時に行ない、Si−
Si間のボンドができるのを防ぎながら蒸着を行なうとこ
ろに特徴があり、いわゆる光CVDのように光照射により
反応を促進するものとは全く異なる。As described above, in the present invention, for example, light is introduced during vapor deposition of Si, light irradiation and vapor deposition of Si are simultaneously performed, and Si-
The feature is that deposition is performed while preventing the formation of bonds between Si, which is completely different from the one that promotes the reaction by light irradiation such as so-called photo-CVD.
以上の実施例においては、光源としてArレーザーを用い
たが、非晶質Siを形成するには波長が0.41μｍ（3.0eV
のエネルギーに相当）以下であれば、他のいかなる光源
を用いても良いことは明らかである。また、非晶質Si薄
膜の単結晶化の実施例として電気炉によるアニールを用
いたが、他の手段（レーザ、電子線、ストリップ・ヒー
ター等）を用いても良いことは明らかである。In the above examples, an Ar laser was used as a light source, but a wavelength of 0.41 μm (3.0 eV) was used to form amorphous Si.
It is obvious that any other light source may be used as long as it is equal to or less than the energy of). Further, although the annealing by the electric furnace is used as an example of the single crystallization of the amorphous Si thin film, it is obvious that other means (laser, electron beam, strip heater, etc.) may be used.
本発明の原理を用いることにより、Si以外の無機結晶性
物質の緻密な非晶質薄膜を形成することも明らかであ
る。この場合、ダイヤモンド、SiC、NaCl,Fe,Au等の結
合エネルギーはそれぞれ7.4eV,12.3eV,7.9eV,4.1eV及び
4.0eVであるから、これらのエネルギー以上の光を導入
しながら、これら物質の構成要素をガス状態で供給すれ
ば良いことになる。It is also clear that by using the principle of the present invention, a dense amorphous thin film of an inorganic crystalline substance other than Si is formed. In this case, the binding energies of diamond, SiC, NaCl, Fe, Au, etc. are 7.4 eV, 12.3 eV, 7.9 eV, 4.1 eV and
Since it is 4.0 eV, it is sufficient to supply the constituent elements of these substances in a gas state while introducing light of these energies or more.
以上説明したように、本発明によれば表面平滑で、稠密
な非晶質薄膜、ひいては単結晶薄膜を得ることが可能と
なり、三次元構造の半導体素子の作製が容易となる効果
がある。As described above, according to the present invention, it is possible to obtain a dense amorphous thin film having a smooth surface, and thus a single crystal thin film, which has the effect of facilitating the production of a semiconductor device having a three-dimensional structure.
第１図は本発明に使用する分子線蒸着装置の説明図、第
２図は本発明における薄膜の製造工程説明図である。 図において、１……真空容器、２……超真空排気系への
接続部、３……被蒸着試料を載置した試料取付台、４…
…光源、５……光透過窓、６……反射鏡、７……蒸発
部、８……試料蒸着膜、９……酸化膜、10……Si基板、
11……非晶質Si膜、12……単結晶Si成長領域、13……多
結晶Si領域。FIG. 1 is an explanatory diagram of a molecular beam vapor deposition apparatus used in the present invention, and FIG. 2 is an explanatory diagram of a thin film manufacturing process in the present invention. In the figure, 1 ... vacuum container, 2 ... connection part to the ultra-vacuum exhaust system, 3 ... sample mount on which the sample to be deposited is placed, 4 ...
... light source, 5 ... light transmitting window, 6 ... reflecting mirror, 7 ... evaporation part, 8 ... sample vapor deposition film, 9 ... oxide film, 10 ... Si substrate,
11 …… Amorphous Si film, 12 …… Single crystal Si growth region, 13 …… Polycrystalline Si region.
───────────────────────────────────────────────────── フロントページの続き (72)発明者 蕨迫 光紀 東京都国分寺市東恋ヶ窪１丁目280番地 株式会社日立製作所中央研究所内 (72)発明者 本岡 輝昭 東京都国分寺市東恋ヶ窪１丁目280番地 株式会社日立製作所中央研究所内 (56)参考文献 特開 昭58−119630（ＪＰ，Ａ) 特開 昭57−164572（ＪＰ，Ａ) 「電子材料」19〔11〕（1980−11）Ｐ. 69−77 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Mitsunori Warabi, 1-280 Higashi Koigakubo, Kokubunji, Tokyo Inside Central Research Laboratory, Hitachi, Ltd. (72) Teruaki Motooka 1-280, Higashi Koigakubo, Kokubunji, Tokyo Hitachi, Ltd. (56) Reference JP 58-119630 (JP, A) JP 57-164572 (JP, A) "Electronic Materials" 19 [11] (1980-11) P. 69-77
Claims (3)
成する薄膜の製造方法において、上記非晶質薄膜を構成
する物質の原子間結合エネルギー以上のエネルギーを有
する光を上記基板上に照射して、分子状態で堆積された
上記物質の原子間結合を切断し、稠密な非晶質薄膜を形
成することを特徴とする薄膜の製造方法。1. A method of manufacturing a thin film in which an amorphous thin film is formed on a substrate by irradiating a molecular beam, and the substrate is irradiated with light having an energy equal to or higher than an interatomic bond energy of a substance forming the amorphous thin film. A method for producing a thin film, which comprises irradiating an upper surface of the material to break interatomic bonds of the substance deposited in a molecular state to form a dense amorphous thin film.
薄膜の堆積中もしくは堆積後に上記単結晶基板をアニー
ルして、上記非晶質薄膜の少なくとも一部を固相反応に
よって単結晶化することを特徴とする特許請求の範囲第
１項に記載の薄膜の製造方法。2. The substrate is a single crystal substrate, the single crystal substrate is annealed during or after the deposition of the amorphous thin film, and at least a part of the amorphous thin film is subjected to a solid phase reaction to form a single crystal. The method for producing a thin film according to claim 1, characterized by:
であり、上記光のエネルギーは3.0eV以上であることを
特徴とする特許請求の範囲第１項または第２項に記載の
薄膜の製造方法。3. The thin film according to claim 1 or 2, wherein the material forming the amorphous thin film is silicon and the light energy is 3.0 eV or more. Production method.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58202619A JPH0754796B2 (en) | 1983-10-31 | 1983-10-31 | Thin film manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP58202619A JPH0754796B2 (en) | 1983-10-31 | 1983-10-31 | Thin film manufacturing method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6095918A JPS6095918A (en) | 1985-05-29 |
| JPH0754796B2 true JPH0754796B2 (en) | 1995-06-07 |
Family
ID=16460373
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58202619A Expired - Lifetime JPH0754796B2 (en) | 1983-10-31 | 1983-10-31 | Thin film manufacturing method |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0754796B2 (en) |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP0055032B1 (en) * | 1980-12-23 | 1986-04-23 | National Research Development Corporation | Field effect transistors |
| JPS58119630A (en) * | 1982-01-11 | 1983-07-16 | Nec Corp | Molecular beam crystal growth method |
-
1983
- 1983-10-31 JP JP58202619A patent/JPH0754796B2/en not_active Expired - Lifetime
Non-Patent Citations (1)
| Title |
|---|
| 「電子材料」１９〔１１〕（１９８０−１１）Ｐ．６９−７７ |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6095918A (en) | 1985-05-29 |
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