JPH0779391A - Television signal receiving method and receiver using the same - Google Patents

Abstract

(57) [Abstract] [Purpose] To obtain a TV signal receiving method and receiver that does not require switching of the horizontal deflection circuit. A frequency conversion circuit 123 is newly added to the conventional TV signal receiver, and a switching circuit for the horizontal oscillation frequency, the power supply voltage of the horizontal deflection circuit, the resonance capacitor capacity, etc. is deleted from the horizontal deflection circuit. [Effect] By providing the frequency conversion circuit, TV signals, BS signals, and video signals can be converted into signals having the same number of scanning lines as the baseband signals of the HDTV signals, 1125, and a frame frequency of 30 Hz. The switching circuit for the high voltage part such as the resonance capacitor capacity becomes unnecessary.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a television signal receiving method and receiver, and more particularly to a terrestrial television signal receiving apparatus, a satellite broadcast receiving apparatus, and a signal received by the receiving apparatus. Is a high-definition signal such as a MUSE signal, a device for converting the signal into a baseband signal, and a television signal receiver and a receiving method.

[0002]

2. Description of the Related Art Although high-definition signals can be received by current television receivers such as clear-vision broadcasting and satellite broadcasting, on the other hand, broadcasting different from conventional broadcasting such as high-definition broadcasting is possible. Trying to spread.
As a method for transmitting such high-definition broadcasting, N
MUSE (Multi) proposed by HK (Japan Broadcasting Corporation)
ple Subnyquist Sampling E
There is a coding system, and a test broadcast of the same has started.

To spread the high-definition broadcasting as described above, a receiver capable of not only receiving the high-definition broadcasting but also the current television broadcasting is required. As such a receiver, since it conventionally corresponds to the number of scanning lines of 1125 as the baseband signal of the high-definition signal and the frame frequency of 30 Hz, and the number of scanning lines of 525 as the NTSC signal of the television broadcast and the frame frequency of 30 Hz, 33.7 when the horizontal frequency is high definition signal
5kHz and 15.73kHz in case of NTSC signal or NTSC signal is ED (Extended Define)
edition) TV signal processing (the number of scanning lines is 525, and the frame frequency is 60 Hz), which is 31.47 kHz. The horizontal deflection circuits of these receivers perform horizontal deflection scanning at 33.75 kHz during high-definition broadcast reception, and perform horizontal deflection scanning at 15.73 kHz or 31.47 kHz during television broadcast reception.

FIG. 2 is a block diagram showing a conventional example of such a television receiver. In this conventional example, an NTSC signal which is a received television signal is subjected to EDTV signal processing, and horizontal frequencies are 33.75 kHz and 31.47.
This is the case when the frequency is set to kHz.

In FIG. 2, 101 is a terrestrial broadcasting television signal (hereinafter referred to as TV signal) receiving antenna, and 10 is a receiving antenna.
2 is a satellite broadcasting signal (hereinafter referred to as BS signal) receiving antenna, 103 is a video input terminal, 104 is a TV signal receiving antenna input terminal, 105 is a BS signal receiving antenna input terminal, 106 is a TV tuner, and 107 is a TV signal detection circuit. , 108 is a BS tuner, 109 is a BS signal detection circuit, 110 is a TV signal processing circuit, 111 is a BS signal processing circuit, 112 is a MUSE decoder, 113 is a signal switching circuit, 114 is an EDTV signal processing circuit, and 121 is a high-definition signal input. Terminals, 115 are signal switching circuits, 116 is a video output circuit, 117 is a synchronous reproduction circuit, 118 is a frequency discrimination circuit, 119A is a horizontal deflection circuit, and 120 is a display device with an aspect ratio of 16: 9.

The high-definition signal is received by the satellite broadcast receiving device (102, 105, 111), and after being decoded by the MUSE decoder 112, the number of scanning lines is 1125.
A baseband signal of a high-definition signal having a frame frequency of 30 Hz is input to the signal switching circuit 115. Further, TV signals, BS signals, and video signals other than high-definition signals are selected by the signal switching circuit 113 and then converted into signals having 525 scanning lines and a frame frequency of 60 Hz by the EDTV signal processing circuit, and then the signal switching circuit. It is input to 115. The signal switching circuit 115 selects and outputs the baseband signal (the number of scanning lines is 1125, the frame frequency is 30 Hz) of the HDTV signal input from the two types or the HDTV input terminal 121. That is, the horizontal frequency is 3
A signal of 3.75 kHz or 31.47 kHz is output. The signal output from the signal switching circuit 115 passes through the video output circuit 116 and the display device 1 having an aspect ratio of 16: 9.
20 is output to the synchronous reproduction circuit 117 at the same time. The sync reproducing circuit 117 is provided in the signal switching circuit 11
The sync signal is reproduced based on the signal selected in 5, and is output to the horizontal deflection circuit 119A and the frequency determination circuit 118. The frequency discrimination circuit 118 discriminates whether the horizontal frequency is 33.75 kHz or 31.47 kHz according to the input synchronizing signal, and outputs the discrimination result to the horizontal deflection circuit 119A. The horizontal deflection circuit 119A switches the horizontal oscillation frequency, the power supply voltage of the horizontal output circuit, the resonance capacitor capacity, and the like according to the determination result output from the frequency determination circuit 118, and performs horizontal deflection scanning in synchronization with the input synchronization signal. There is.

[0007]

In the above-mentioned prior art,
Horizontal frequency is 33.75kHz or 15.73kHz
(When the NTSC signal is processed by the EDTV signal, 31.
(47 kHz), horizontal deflection scanning is performed so as to synchronize with each horizontal frequency. For this purpose, the horizontal deflection circuit has a horizontal oscillation frequency, a power supply voltage of the horizontal deflection circuit,
A switching circuit for switching the resonance capacitor capacity and the like is required. Also, when switching the power supply voltage and the resonance capacitor capacity of the horizontal deflection circuit, the reliability of the switching element becomes a problem because the high voltage part is switched.

An object of the present invention is to provide a horizontal deflection circuit,
It is to provide a television signal receiver that does not require a switching circuit.

[0009]

In order to achieve the above object, TV signals other than high-definition signals, BS signals, and video signals have the same number of scanning lines 1125 as high-definition signals.
A means for converting the book into a signal having a frame frequency of 30 Hz is provided.

[0010]

In the present invention, by converting TV signals, BS signals, and video signals other than high-definition signals into signals having the same number of scanning lines as the high-definition signals, 1125 and a frame frequency of 30 Hz, the horizontal frequency becomes only 33.75 kHz, The horizontal deflection circuit also needs to be synchronized only with 33.75 kHz, and a switching circuit for the horizontal oscillation frequency, the power supply voltage of the horizontal deflection circuit, the resonance capacitor capacity, etc. is unnecessary.

[0011]

EXAMPLES Examples of the present invention will be described below. Figure 1
1 is a block diagram showing a TV signal receiver as an embodiment of the present invention. In the figure, 101 is a TV signal receiving antenna, 102 is a BS signal receiving antenna, 103 is a video input terminal, 104 is a TV signal receiving antenna input terminal, 1
Reference numeral 05 is a BS signal receiving antenna input terminal, 106 is a TV tuner, 107 is a TV signal detection circuit, 108 is a BS tuner, 109 is a BS signal detection circuit, 110 is a TV signal processing circuit, 111 is a BS signal processing circuit, and 112 is a MU.
SE decoder, 113 signal switching circuit, 114 EDT
V signal processing circuit, 123 is frequency conversion circuit, 124 is
An up converter including an EDTV signal processing circuit 114 and a frequency conversion circuit 123, 121 a high-definition signal input terminal, 115 a signal switching circuit, 116 a video output circuit, 117 a synchronous reproduction circuit, 119B a horizontal deflection circuit,
Reference numeral 120 is a display device having an aspect ratio of 16: 9, and 121 is a high-definition signal input terminal.

In the embodiment shown in FIG. 1, a frequency conversion circuit 123 is newly added to the conventional TV signal receiver shown in FIG.
9A is a horizontal deflection circuit 119B in which switching circuits such as the horizontal oscillation frequency, the power supply voltage of the horizontal deflection circuit, and the resonance capacitor capacity are deleted.

In FIG. 1, in this receiver, the MUSE
When a signal is received, the BS signal processing circuit 111, MUS
After passing through the E-decoder 112, the baseband signal of the high-definition signal (the number of scanning lines is 1125, the frame frequency is 30
Hz) is input to the signal switching circuit 115. When a BS signal or a TV signal other than the MUSE signal is received, it is input to the signal switching circuit 113 via the BS signal processing circuit 111 (in the case of a BS signal) or the TV signal processing circuit 110 (in the case of a TV signal). The video signal input from the video input terminal 103 is also input to the signal switching circuit 113. The signal selectively output by the signal switching circuit 113 is the ED
The EDTV signal is processed by the TV signal processing circuit 114, and the number of scanning lines becomes 525 and the frame frequency becomes 60 Hz, which is input to the frequency conversion circuit 123. The frequency conversion circuit 123 converts the input 525 scanning lines and a frame frequency of 60 Hz into a signal having the same scanning line number of 1125 and a frame frequency of 30 Hz as the baseband signal of the HDTV signal, and outputs the signal to the signal switching circuit 115. The signal switching circuit 115 is a baseband signal of a high-definition signal, 1125 scanning lines similar to the baseband signal of a high-definition signal, a signal converted to a frame frequency of 30 Hz, or a high-definition signal input from a high-definition signal input terminal 121. Select and output any of the baseband signals of.
The signal output from the signal switching circuit 115 passes through the video output circuit 116 and the display device 120 having an aspect ratio of 16: 9.
Is simultaneously input to the synchronous reproduction circuit 117. The synchronous reproduction circuit 117 reproduces the synchronous signal based on the signal selected by the signal switching circuit 115 and outputs it to the horizontal deflection circuit 119B. The horizontal deflection circuit 119B performs horizontal deflection scanning in synchronization with the synchronization signal output from the synchronization reproduction circuit 117.

Therefore, in FIG. 1, the signal switching circuit 11 is used for any of the MUSE signal, the TV signal, the BS signal, the video signal, and the baseband signal of the high definition signal input from the high definition signal input terminal 121.
The horizontal frequency of the signal output from the signal 5 is only 33.75 kHz, and the horizontal deflection circuit 119B may always perform horizontal deflection scanning at the horizontal deflection frequency of 33.75 kHz.
A switching circuit for the horizontal oscillation frequency, the power supply voltage, the resonance capacitor capacity, etc., which is required in the horizontal deflection circuit 119A of the conventional TV receiver shown in FIG.

Next, the frequency conversion circuit 12 will be described with reference to FIG.
An example of the configuration of No. 3 will be described in detail.

In FIG. 3, reference numeral 204 is a memory, 202 is a write clock generating means, 203 is a read clock generating means, and 201 is a write clock generating means 202.
Is a control circuit for controlling the read clock generating means 203, and 205 is a D / A converter.

The EDTV signal processing 114 digitally converts the input signal into an EDTV signal processing digital signal by an A / D converter in the EDTV signal processing to perform EDTV signal processing with 525 scanning lines and a frame frequency of 60 Hz. Output. The memory 204 writes the digital data processed by the EDTV signal at the timing of the clock pulse output from the write clock generating means 202. The read clock generating means 203 has 33.75 clock pulses output from the write clock generating means 202.
/31.47 times the frequency of the clock pulse memory 20
By reading from 4, the signal is converted into a signal having 1125 scanning lines and a frame frequency of 30 Hz. The converted signal is analog-converted and output via the D / A converter 205. Further, the control circuit 201 controls the write clock generating means 202 and the read clock generating means 203 in synchronization with each other so as to reset each frame.

Further, as an embodiment according to the present invention when the NTSC signal is not processed by the EDTV signal, the up converter 124 in FIG. 1 is replaced by the frequency conversion circuit 125 in FIG.
Described below is the case of replacing with.

In FIG. 4, 206 is an A / D converter, 2
Reference numeral 04 is a memory, 202 is a write clock generation means, 2
Reference numeral 03 is a read clock generating means, 201 is a write clock generating means 202 and read clock generating means 2
A control circuit for controlling 03, 205 is a D / A converter. EDT from the up converter 124 in FIG.
The V signal processing 114 is deleted and the A / D converter 206 is added.

In the frequency conversion circuit 125, the clock pulse of the read clock generating means 203 is a memory pulse having a frequency of 33.75 / 15.73 times the clock pulse output from the write clock generating means 202. By reading more, A / D
A signal having 525 scanning lines and a frame frequency of 30 Hz input to the converter 206 is converted into a signal having 1125 scanning lines and a frame frequency of 30 Hz and output from the D / A converter 205.

In this embodiment, the aspect ratio of the display device 120 is 16: 9, but the aspect ratio is 5: 3.
It is also possible to replace the display device with the above, and the aspect ratio is not particularly specified.

[0022]

According to the present invention, the frequency conversion circuit converts a TV signal, a BS signal, and a video signal into a signal having the same number of scanning lines as the baseband signal of the high-definition signal, 1125, and a frame frequency of 30 Hz. The deflection circuit does not require a switching circuit for the horizontal oscillation frequency, the power supply voltage, the resonance capacitor capacity, and the like.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a block diagram showing an example of a conventional television signal receiver.

FIG. 3 shows an example of the configuration of a frequency conversion circuit.

FIG. 4 is an example of a frequency conversion circuit when an NTSC signal is not processed by an EDTV signal.

[Explanation of symbols]

101 ... TV signal receiving antenna, 102 ... BS signal receiving antenna, 103 ... Video input terminal, 104 ... TV signal receiving antenna input terminal, 105 ... BS signal receiving antenna input terminal, 106 ... TV tuner, 107 ... TV signal detection circuit, 108 ... BS tuner, 109 ... BS signal detection circuit, 110 ... TV signal processing circuit, 111 ... BS signal processing circuit, 112 ... MUSE decoder, 113 ... Signal switching circuit, 114 ... EDTV signal processing circuit, 123 ... Frequency conversion circuit, 124 ... Up converter, 121 ...
HDTV signal input terminal, 115 ... Signal switching circuit, 1
16 ... Video output circuit 117 ... Synchronous reproduction circuit 119B
... Horizontal deflection circuit, 120 ... Display device with aspect ratio of 16: 9, 121 ... High-definition signal input terminal

Front Page Continuation (72) Inventor Koichi Sudo, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Stock Information, Hitachi Image Information System (72) Inventor Atsushi Haraya, 292 Yoshida-cho, Totsuka-ku, Yokohama, Kanagawa Hitachi Information Video Media Business Unit (72) Inventor Kazuhiro Umizaki 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Hitachi, Ltd. Information Video Media Business Unit

Claims (5)

[Claims] 1. A terrestrial broadcast television signal receiving device,
Satellite broadcast receiving device, screen display device, and when the signal received from the satellite broadcast receiving device is a high-definition signal, a signal that can be displayed on the screen display device from the signal format depending on the transmission method of the high-definition signal In a television signal receiving method for converting into a format, when the signal received from the receiving device is a signal other than high-definition, the signal other than high-definition is the same as the output of the signal format conversion means using frequency conversion means. A method for receiving a television signal, characterized by converting to a signal format. 2. A terrestrial broadcasting television signal receiving device,
Satellite broadcast receiving device, screen display device, and when the signal received from the satellite broadcast receiving device is a high-definition signal, a signal that can be displayed on the screen display device from the signal format depending on the transmission method of the high-definition signal In a television receiver provided with a signal format conversion means for converting to a format, when the signal received from the receiving device is a signal other than high definition, the signal other than high definition is output from the signal format conversion means. A television signal receiver provided with frequency conversion means for converting into the same signal format as the above. 3. The television signal receiver according to claim 2, wherein the signal format conversion means is means for converting a high-definition signal into a baseband signal of a high-definition signal. . 4. The television signal receiver according to claim 2 or 3, wherein the frequency converting means converts the signals output from the terrestrial broadcasting television signal receiving device and the satellite broadcasting receiving device into digital signals. A / D converter for converting to digital, a memory for writing the digital signal, a write clock generating means for generating a clock for writing in the memory, a read clock for generating a clock for reading the digital signal written in the memory means,
A television signal receiver comprising a D / A converter for converting a digital signal read from a memory into an analog signal. 5. The television signal receiver according to claim 2, 3 or 4, wherein the screen display device comprises a horizontally long display device having an aspect ratio of 16: 9 or 5: 3. John signal receiver.