JPH0782092A - Method for manufacturing compound semiconductor substrate - Google Patents

Abstract

(57) [Summary] [Object] To provide a method for manufacturing a compound semiconductor substrate having a semi-insulating epitaxial layer free from dislocations. [Structure] After growing an epitaxial layer made of a compound semiconductor on the surface of a substrate and then heat treating the substrate to make the epitaxial layer semi-insulating, it is proposed to use a substrate having no dislocation on at least the surface. It is a thing. [Effect] Not only is a compound semiconductor substrate having a dislocation-free semi-insulating epitaxial layer easily obtained, but the use of the substrate makes it possible to manufacture electronic devices such as FETs having excellent characteristics. is there.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for producing a compound semiconductor substrate used for an electronic device, and more particularly to a technique suitable for producing a semiconductor substrate having a compound semiconductor epitaxial layer having a high resistivity.

[0002]

2. Description of the Related Art In a III-V group compound semiconductor device, a high resistance buffer layer is used as a barrier layer for insulating an operation layer (active layer) from a substrate, and is also used for element isolation in an integrated circuit. There is. Therefore, it is important for the buffer layer to have high resistance, that is, to be semi-insulating in order to improve device characteristics.

Conventionally, the III-V compound semiconductor high resistance layer is generally formed by a vapor phase epitaxial growth method. In the semi-insulating process, a doping gas containing a semi-insulating impurity is caused to flow from the bypass pipe during the vapor phase growth, or the semi-insulating impurity previously added to the source material for vapor phase growth is grown. Sometimes, a method of doping the epitaxial layer on the substrate surface is adopted.

However, in the former method, the compound of the semi-insulating impurity introduced from the bypass pipe is decomposed and deposited in the bypass pipe, or the semi-insulating impurity reacts with HCl (hydrogen chloride) gas in the bypass pipe. Then, since it is transported in the form of chloride, if the doping amount is increased, the HCl concentration becomes high, and there is a drawback that the substrate is etched. On the other hand, the latter method has a drawback that a required amount of semi-insulating impurities cannot be transported if the segregation coefficient of the semi-insulating impurity source with respect to the source material is small.

Therefore, when the GaAs epitaxial layer is grown, the segregation coefficient to the GaAs crust is 1 ×.
Iron of 10 ⁻³ was added to the Ga source, and the iron-doped GaAs layer was vapor-phase grown by the chloride method.

Further, the semi-insulating impurity source iron, chromium, vanadium and the like are so-called "deep acceptor impurities", but if these deep acceptor impurities penetrate into the active layer from the buffer layer, the characteristics deteriorate. Further, using a semiconductor substrate having a deep acceptor impurity invaded layer at the interface between the buffer layer and the active layer, for example, an FET
When manufacturing (field effect transistor), a deep trap layer is formed at the interface between the buffer layer and the active layer,
Electrons that flow through the active layer are trapped and electrons are emitted to the active layer, which causes noise.

Therefore, the present applicant has previously developed a method for manufacturing a semi-insulating compound semiconductor substrate, which is characterized by making a p-type epitaxial layer formed on a compound semiconductor substrate semi-insulating by heat treatment, Filed an application (Japanese Patent Laid-Open No. 4-9
No. 8000), according to which the semi-insulating property of the epitaxial layer is realized, but the side gate effect in the case of integrated circuit, that is, the disadvantage that the drain current is changed by the voltage of the adjacent device is avoided. I couldn't.

[0008] The inventors of the above-mentioned prior application have further earnestly studied and developed a method of manufacturing a compound semiconductor substrate characterized in that the side gate effect can be prevented by carefully selecting heat treatment conditions. And filed a prior application (Japanese Patent Application No. 5-123839).

[0009]

However, in making the epitaxial layer semi-insulating, the semi-insulating impurity is doped into the epitaxial layer as described above, and how dislocations existing in the epitaxial layer are formed. One of the important issues is how to reduce it. The reason is that impurities tend to segregate around dislocations, resulting in a decrease in resistivity of the epitaxial layer.

The present invention has been made to achieve the above object, and an object thereof is to provide a method for producing a compound semiconductor substrate having a semi-insulating epitaxial layer in which dislocations do not exist. It is in.

[0011]

As a result of earnest studies on the semi-insulating property of a compound semiconductor epitaxial layer, the present inventor has found that dislocations exist in a substrate regardless of how thick the epitaxial layer is grown. It was found that the effect of the dislocations also spreads to the epitaxial layer, and therefore, it was thought that a dislocation-free epitaxial layer could be grown by using a dislocation-free substrate. Then, by conducting heat treatment on the substrate formed by stacking the dislocation-free epitaxial layers as in the above-mentioned prior application, it was thought that a semi-insulating compound semiconductor substrate with an extremely high resistance could be obtained, and as a result of various studies, The present invention has been completed.

That is, according to the present invention, after the epitaxial layer made of a compound semiconductor is grown on the surface of the substrate and then the substrate is heat-treated to semi-insulate the epitaxial layer, at least a substrate having no dislocation on the surface is formed. Is proposed to be used. As the substrate, for example, a dislocation-free I grown by In-added longitudinal magnetic field application complete B ₂ O ₃ cover Czochralski method (VM-FEC) is used.
A substrate cut from an n-doped GaAs single crystal or a dislocation-free GaAs single crystal grown by the VGF method is mirror-polished and used. Moreover, it is desirable that the heat treatment of the substrate is performed under the arsenic vapor pressure. However, in the heat treatment performed after forming the protective film such as silicon nitride on the surface of the epitaxial layer, it is not necessary to apply the arsenic vapor pressure.

[0013]

According to the above means, by using at least a dislocation-free substrate on the surface on which the epitaxial layer is laminated, even if dislocation exists in the bulk of the substrate, the effect of the dislocation propagates to the epitaxial layer. Intercepted,
A dislocation-free epitaxial layer is obtained. In addition, since a deep level defect is formed in the epitaxial layer by performing heat treatment after the epitaxial growth, the impurities forming the shallow level in the epitaxial layer are compensated by the deep level defect, and the epitaxial layer is Is semi-insulating. A substrate with no dislocations on its surface is generally called a dislocation-free substrate and covers the entire surface of the substrate (excluding the peripheral edge of 5 mm).
Has an average EPD of less than 5000 cm ^-2 and has an EPD of 5
The area of 00 cm ^-2 or less is 50% or more of the entire surface.

[0014]

EXAMPLE As an example of the present invention, GaAs will be described below.
As an example, the case of manufacturing a semi-insulating wafer formed by stacking a GaAs epitaxial layer on a single crystal substrate,
The features of the present invention will be clarified. First, for example, from a dislocation-free In-doped GaAs single crystal grown by an In-added longitudinal magnetic field-applied complete B ₂ O ₃ cover Czochralski method, a substrate inclined by 2 ° from the (100) plane toward the (110) plane is cut out. It was mirror-polished.

Then, on this GaAs single crystal substrate,
An undoped GaAs layer was epitaxially grown as follows using a hot wall type chloride vapor deposition apparatus. That is, a boat containing Ga is placed on the upstream side in the reaction tube, and a GaAs single crystal substrate is placed on the downstream side in the reaction tube, and the temperatures of the Ga boat and the GaAs single crystal substrate are 820 ° C. and 740 ° C., respectively. So that it was heated in an electric furnace.

At that time, arsenic trichloride (As) is used as the As source.
Cl ₃ ) was placed in a bubbler, and H ₂ gas was supplied as a carrier gas into the reaction tube. Total gas flow is 1SL
M, and the AsCl ₃ mole fraction was 2.7 × 10 ⁻³ . Epitaxial growth under these conditions for 3 hours,
A GaAs epitaxial layer having a thickness of 30 μm was obtained. When hole measurement was performed on this GaAs layer, the G
It was found that the conductivity type of the aAs epitaxial layer was p-type and the carrier concentration was 1 × 10 ¹⁴ cm ^-3 .

Then, the epitaxially grown GaAs substrate was taken out, placed in a quartz ampoule together with arsenic, and vacuum-sealed. At this time, the amount of arsenic was determined such that arsenic would not volatilize from the substrate surface at the processing temperature during the heat treatment. Next, this quartz ampoule was placed in a heating furnace, heat-treated at 950 ° C. for 3 hours, and then cooled.

After the heat treatment, the surface of the wafer is ground by about 10 μm by lapping and polishing to remove the thermal metamorphic layer, and then van der Pau (Van der Pa).
The resistivity was measured by the uw) method. As a result, GaAs
It was confirmed that the resistivity of the epitaxial layer was 1 × 10 ⁷ Ω · cm or more. In addition, this wafer is immersed in a potassium hydroxide (KOH) solution at 400 ° C. for 150 seconds to perform etching, and EPD (Etch Pit Densi) is used.
When ty) was investigated, the dislocation density of the GaAs epitaxial layer was 100 dislocations / cm ² or less.

The semi-insulating Ga produced as described above
A channel layer is formed on the As epitaxial layer by a well-known ion implantation method to produce a GaAs IC,
I investigated its characteristics. As a result, in the obtained IC, there was no side gate effect, and variations in individual FET characteristics were extremely small. As a result, the yield of the completed IC can be improved.

It should be noted that, instead of the substrate cut out from the In-doped GaAs single crystal, a substrate cut out from a dislocation-free GaAs single crystal grown by the VGF method may be used, which is similar to the above embodiment. The effect, that is, a dislocation-free semi-insulating GaAs epitaxial layer was obtained, and the characteristic of the electronic device fabricated in the epitaxial layer was extremely excellent.

Further, according to the present invention, a substrate made of a III-V group compound semiconductor other than GaAs or a II-VI group compound semiconductor, or a semiconductor substrate made of silicon, an insulating substrate made of sapphire, or the like has the same composition as the substrate. It is needless to say that the present invention can be applied not only to the case of growing the epitaxial layer of, but also to the case of epitaxially growing a layer having a composition different from that of the substrate.

[0022]

According to the method of manufacturing a compound semiconductor substrate of the present invention, since a substrate having no dislocation on the surface on which the epitaxial layer is laminated is used and the heat treatment is performed after the epitaxial growth, the dislocation exists in the substrate bulk. Even in this case, the influence of the dislocations is prevented from spreading to the epitaxial layer, and a dislocation-free epitaxial layer is obtained. Also,
The deep level defects formed in the epitaxial layer compensate for the impurities forming the shallow level in the epitaxial layer, so that the epitaxial layer is made semi-insulating. Therefore, there is an effect that not only a dislocation-free semi-insulating compound semiconductor substrate can be easily obtained but also an electronic device such as an FET having excellent characteristics can be manufactured by using the substrate.

Claims (1)

[Claims] 1. When a epitaxial layer made of a compound semiconductor is grown on the surface of a substrate and then the substrate is heat treated to semi-insulate the epitaxial layer, at least a substrate having no dislocation on the surface is used. A method of manufacturing a compound semiconductor substrate having the characteristics.