JPH0799721A - Overload preventive circuit for dc motor - Google Patents

Abstract

PURPOSE:To stop electric conduction through a motor forcibly in conformity with timing, when the motor is locked, even when the voltage of a DC power supply is high or low. CONSTITUTION:Motor voltage VM is stepped down, and voltage VC obtained by delaying stepped-down voltage is input to one of a comparison circuit. Motor voltage VM is input to the other as it is. When overload works, VM suddenly drops, and VC drops late (or drops slowly), thus resulting in VM/VC. Electric conduction is stopped at that time.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a technique for preventing the damage of a DC motor or the like by forcibly stopping the energization of the DC motor when the DC motor is overloaded.

[0002]

2. Description of the Related Art FIG. 5 schematically shows a conventional overload prevention technique. As is apparent from FIG. 5, a series circuit of a DC power supply, a DC motor, and a forced stop switch is configured to drive the DC motor. The forced stop switch is automatically turned off when an overload acts on the DC motor to stop energizing the DC motor. In order to forcibly stop energizing the DC motor, a voltage corresponding to the voltage applied to the DC motor (for example, the voltage applied to the DC motor is a divided voltage, etc., hereinafter referred to as the motor voltage) VM is applied to one terminal. To the other terminal, and input the reference voltage VS to the other terminal.
A comparator circuit is added to turn off the forced stop switch when <VS. The motor voltage VM decreases when the DC motor is overloaded. The reference voltage VS is shown in FIG.
It is set to the motor voltage when the DC motor is locked, as shown in (B). Therefore, according to the circuit of FIG. 5 (A), as shown in FIG. 5 (B), when the motor locks, the forced stop switch is turned off to prevent damage to the DC motor.

[0003]

However, the motor voltage when the DC motor is locked is not always constant.
For example, when a rechargeable battery is used as a DC power supply, the motor voltage at lock is relatively high immediately after charging, but the battery voltage is low just before recharging, so lock The motor voltage becomes low (see Fig. 5 (C)). As is well known, the battery voltage also changes depending on the temperature. Therefore, the motor voltage when locked in the low temperature environment is lower than the motor voltage when locked in the high temperature environment.

Therefore, if the value of the reference voltage is set to be forcibly stopped at the time of locking when the battery voltage is high, it is possible to use the battery immediately before recharging or to use it in a low temperature environment. In that case, the energization is forcibly turned off before the DC motor is locked, and the work that can be accomplished before the locking is impossible. On the contrary, if the reference voltage is set according to the case where the battery voltage is low, the energization will not be stopped even if the motor is locked in the environment where the battery voltage is high, and the damage to the motor cannot be prevented. The present invention overcomes the problem that the motor voltage is not constant when the motor is locked, and the energization is forcibly stopped before or after the locking regardless of the usage conditions.

[0005]

SUMMARY OF THE INVENTION The present invention relates to a DC motor overload prevention circuit which is added to a series circuit of a DC power supply, a DC motor and a forced stop switch, and this circuit is schematically shown in FIG. As described above, a voltage drop circuit that drops the voltage VM corresponding to the voltage applied to the DC motor by a predetermined voltage, a delay circuit that delays a change in the output voltage of the voltage drop circuit, and an output voltage Vc of the delay circuit. To one terminal and the voltage VM to the other terminal,
And a comparator circuit for turning off the forced stop switch when VM <VC. Note that the delay circuit mentioned here includes not only a circuit that delays the change but also a circuit that changes the voltage change into a gradual change by integrating or averaging the past voltage. That is, the delay circuit described here has a broad sense, and includes an integrating circuit and an averaging circuit in addition to the delay circuit having a narrow sense.

[0006]

According to this circuit, the voltage input to the delay circuit is the motor voltage V because the voltage drop circuit is used.
The voltage is lower than M by a predetermined voltage Va. When the fluctuation of the motor voltage is gentle, that is, while the DC motor is rotating normally, the output voltage VC from the delay circuit
Becomes VC = VM-Va, and the relationship of VM> VC is maintained. Therefore, the forced stop switch is not turned off.

However, when the DC motor is overloaded, the motor voltage VM drops rapidly. At this time, the voltage input to the delay circuit also decreases, but the voltage output from the delay circuit changes (or changes slowly) with a delay.
M <VC and the forced stop switch is turned off. At this time, if the voltage drop Va by the voltage drop circuit is set to an appropriate value, VM = VC can be set when the motor is locked.

This phenomenon can be similarly obtained in an environment in which the voltage of the DC power source is high or in a low environment, as illustrated in FIGS. For this reason, the imperfections of the conventional technique described with reference to FIGS. 5B and 5C are overcome, and energization can be forcibly stopped at the time of locking or before and after locking regardless of the use environment.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Next, one embodiment embodying the present invention will be described. This embodiment is an application of the present invention to a DC motor for a battery-powered electric tool, and its specific circuit is shown in FIG. In the figure, BP indicates a battery pack. This battery pack BP has a nickel-cadmium battery cell built therein and can be charged.
When the battery pack BP is housed in the battery housing part of the electric tool, the battery contacts are connected to the contacts CN1 and CN2 on the tool side. This battery pack BP is rechargeable, and the charged battery pack BP is housed in the above-mentioned battery housing portion, taken out from the battery housing portion after use and replaced.

When the battery pack BP is set, the contact C
The battery pack BP, the manual power switch SW1 for operation, and the forward / reverse changeover switches SW2a, SW via N1 and CN2.
A circuit in which 2b, the DC motor M, and the forced stop switch FET are connected in series is completed. The manual power switch SW1 for operation can be switched between the a and b contacts, and becomes the a contact while the tool user is in the on operation and the b contact when the on operation is stopped. Forward / reverse selector switch SW2a, S
W2b can be switched between the d / e contact side and the c / f contact side. When the d / e contact side is applied, a direct current is applied to the DC motor M in the forward direction, and when it is the c / f contact side. Sends a direct current in the reverse direction. When the manual power switch SW1 is turned on and the a contact is closed while the forced stop switch FET is on, a current flows through the DC motor M. On the other hand, if the b contact is closed without the manual power switch SW1 being turned on, the braking circuit of the DC motor M is completed.

A field effect transistor FET is used for the forced stop switch and forcibly turns off the motor M. As long as the forced stop switch FET is off, no current flows in the motor M even if the manual power switch SW1 is turned on. Even if the manual power switch SW1 is turned on, the energization of the motor M is forcibly stopped when the forced stop switch FET is turned off. The field effect transistor FET for forced stop is turned on when a high voltage is applied to the gate electrode, and turned off when the high voltage is not applied.

Next, a field effect transistor F for forced stop
The ET control circuit will be described. In the figure, 2 is a forced stop circuit for turning off the field effect transistor FET when the remaining capacity of the battery pack BP is insufficient. Reference numeral 6 in the figure denotes a circuit for forcibly stopping the energization of the motor M when the motor M is overloaded. Although the subject of the present invention is embodied by the forced stop circuit 6 at the time of overload, the description will be given first regarding the forced stop circuit 2.
The description of the forced stop circuit 6 is given after paragraph 0021.

The forced stop circuit 2 has a first comparator circuit CM1, a positive side input terminal to which a voltage V1 obtained by dividing the battery voltage is input, and a negative side input terminal to the first Zener diode ZD1. Breakdown voltage V2 (which becomes a constant voltage) is input. Here, the above-mentioned potentials V1 and V2
Is, while the remaining capacity of the battery pack BP is within the proper range,
When the DC motor M is started (at this time, V1 is the lowest)
Also has a relationship of V1> V2, the battery pack B
When the remaining capacity of P becomes equal to or less than a predetermined value, the relationship of V1 <V2 is adjusted when the motor M is started.

The output of the first comparison circuit CM1 is input to the S1 terminal of the first NAND type latch circuit 4. The battery voltage is input to the R1 terminal of the NAND latch circuit 4 (see FIG. 2).
The voltage of the part shown in the middle circle A is input). The operation of this circuit will be described with reference to FIG. Battery pack BP
At the time of replacement, the manual power switch SW1 is off and the a contact is open. When the charged battery pack BP is set in this state, V1> V2, and the first comparison circuit CM
1 outputs a high voltage, and the high voltage is input to the S1 contact (slightly delayed by the capacitor C1). On the other hand, the voltage input to the R1 terminal also becomes high (again, it becomes a high voltage with a slight delay due to the capacitor C2). Due to the difference in capacitance between the capacitors C1 and C2, the R1 terminal is S1
It becomes a high voltage later than the terminal.

The behavior of the NAND latch circuit 4 changes as shown in FIG. 3 (B). As described above, at the moment when the battery pack BP is inserted, the S1 and R1 terminals are both low, and Q1
Both the a terminal and the Q1b terminal become high. Next, the S1 terminal becomes the high voltage first. So Q1a terminal is low, Q1b
The terminal remains high. After that, the R1 terminal also becomes a high voltage. At this time, the outputs of the Q1a and Q1b terminals remain unchanged, the Q1a terminal remains low, and the Q1b terminal remains high.

The gate of the forced stop switch FET is connected to the Q1b terminal of the first latch circuit 4 via the diode D2. While the Q1b terminal is low, the gate potential is low, and the forced stop switch FET is off. Further, as described later, the gate of the forced stop switch FET is connected to the Q2b terminal of the second latch circuit 8 via the diode D3. Therefore, the gate potential is low while the Q2b terminal is low, and the forced stop switch FET is turned off.
That is, the forced stop switch FET is connected to the Q1b terminal and the Q2
It turns on when both terminals b are high, and is forced off when at least one of them is low.

As described above, when the battery pack BP is removed for replacement, both the S1 terminal and the R1 terminal become low.
When the charged battery pack BP is set next, paragraph 0
The phenomenon described in 015 occurs, and the Q1b terminal becomes high. While the Q1b terminal is high, the forced stop switch FET is on (provided that the Q2b terminal is also high). Then, when the manual power switch SW1 is operated to close the contact a, a current starts to flow in the motor M and the tool starts to rotate. In this embodiment, the Q1b terminal becomes high when the battery pack is replaced. If the battery cannot be replaced, a reset switch is provided between the battery and the circle A in FIG. And when this reset switch is installed,
By operating the reset switch, the battery voltage can be temporarily prevented from being applied to the R1 terminal, and then the battery voltage can be applied. Even in this way, the first latch circuit 4 can be reset. By doing so, the present embodiment can be applied to a type in which the battery cannot be replaced.

When a current starts to flow in the motor M, a large current at the time of start-up flows, so that the battery voltage drops and a circle A in FIG.
The voltage at the site indicated by also decreases. If the remaining capacity of the battery is greater than or equal to a predetermined value, the first
The voltage V1 input to the plus terminal of the comparator circuit CM1 is still higher than the breakdown voltage (V2) of the Zener diode ZD1, and the S1 terminal remains high. Therefore, the FET is kept on and the tool operates properly (Fig. 3 (A)).
See a → ha). When the remaining capacity of the battery falls below a specified value,
The battery voltage at the time of start-up decreases, and the voltage V1 becomes equal to or lower than the breakdown voltage (V2) of the Zener diode ZD1. Then, the S1 terminal becomes low (slightly delayed by the capacitor C1), the Q1a terminal becomes high, and the Q1b terminal becomes low (see (a)-(b) in FIG. 3 (A)). When the Q1b terminal becomes low, the forced stop switch element FET is turned off and current does not flow to the motor M even if the manual power switch SW1 is turned on. For this reason, the tool is forcibly stopped, and it is prohibited to continue the work when the remaining battery capacity is insufficient.

When the operation switch SW1 is turned on when the remaining capacity of the battery is insufficient and immediately after that, the forced stop switch FET is turned off as described above, no current flows to the motor M, and the battery voltage becomes Rise again. Therefore, the comparison circuit CM1 outputs high again. In the case of the NAND type latch circuit 4, even if the S1 terminal becomes high again, Q1a, Q1
The 1b terminal does not change, and the forced stop switch FET is kept in the off state. It should be noted that the time from when the manual power switch SW1 is turned on until the battery voltage drops and the forced stop switch FET is turned off is a moment, and the tightening work cannot be performed.

Column (a) of FIG. 3 (A) shows the period after the battery pack BP is inserted until the manual power switch SW1 is turned on.
The column (b) shows the voltage fluctuation after operating the manual power switch SW1 when the remaining capacity of the battery pack BP is insufficient.
Column C shows the voltage fluctuation after the manual power switch SW1 is operated in the state where the remaining capacity of the battery pack BP is sufficient. Actually, the change of a → ro or the change of a → ha occurs.
As is apparent from the above, when the remaining capacity of the battery decreases, the first latch circuit 4 turns off the forced stop switch (FET). This state continues until the battery is removed and a new battery is set, and when replacing the battery, the first latch circuit 4
Is reset and the forced stop switch (FET) is turned on.

In the case of this embodiment, a circuit 6 for forcibly stopping the energization of the DC motor M is added in order to prevent the DC motor M from being burned when the tool is overloaded. The two forced stop circuits 2 and 6 turn off the forced stop switch FET when either of them outputs low. As described below, the manual power switch SW1
Immediately after turning on, the side of the forced stop circuit 6 is configured to output a high voltage, and the shortage of the remaining capacity of the battery is detected based on the battery voltage at the time of starting the motor, and the forced stop switch FET is turned off. The operation of the forced stop circuit 2 is not disturbed by the circuit 6 forcibly turning off at the time of overload. Further, the forced stop circuit at the time of overload does not need to work immediately after the manual power switch SW1 is turned on, and it is preferable that it does not work.

The forced stop circuit 6 at the time of overload has a second comparison circuit CM2, and the motor voltage VM obtained by dividing the voltage applied to the motor M is input to the plus side input terminal. On the other hand, the diode D1 is inserted in series between the negative side input terminal and the motor voltage VM, and the capacitor C4
And a resistor R3 are connected in parallel. The diode D1 lowers the voltage output to the capacitors C4 and R3 side by a predetermined voltage Va from the motor voltage VM due to its internal resistance. That is, in this embodiment, the diode D
1 realizes a voltage drop circuit. The voltage which is reduced by a predetermined voltage Va from the motor voltage VM by the diode D1 is applied to the capacitor C4 and the resistor R3. The capacitor C4 carries out an integrating action and the resistor R3 carries out a discharging action. In this embodiment, however, the resistance value of the resistor R3 is set to a very large value, and as a result, the voltage VC inputted to the negative side input terminal is a diode. A change in which the change in the voltage output from D1 is smoothed out occurs. That is, in this embodiment, the resistor R3 and the capacitor C4
This realizes a kind of delay circuit. Note that this embodiment shows an example of delaying the change by slowing it down. However, in addition to this, a delay circuit in a narrow sense that completely delays the change for a fixed time (in this case, the change pattern itself does not change) or the past voltage is changed. It may be a circuit that delays the change by averaging. This embodiment can also be evaluated as a kind of averaging circuit.

FIG. 4 shows the measured value of the motor voltage VM and the averaged voltage VC after stepping down the voltage. The motor voltage VM decreases immediately after the manual power supply switch SW1 is turned on, but the motor voltage is promptly restored if the load is normal. For this reason, VM <VC does not hold. On the contrary, when the motor M starts to be overloaded, the motor voltage continues to decrease. At this time, since VC changes more slowly and gradually, VM <VC holds when the overload condition continues. That is, the second comparison circuit CM2 switches from high to low before and after the motor M locks due to the overload.
Note that this action is established regardless of the voltage of the battery pack BP,
Whether the voltage of the battery pack BP is higher or lower than the average, the second comparison circuit C is used before and after the motor M is locked.
M2 switches from high to low.

The output of the second comparison circuit CM2 is input to the S2 terminal of the second NAND type latch circuit 8. The voltage of the portion B between the manual power switch SW1 for operation and the motor M is input to the R2 terminal of the second NAND type latch circuit 8. However, since the capacitor C3 is used, R2
The voltage at the terminal rises after the switch SW1 is turned on. As described above, the voltage of the R1 terminal also rises with a delay due to the capacitor C2, but since the voltage of the portion (maru A) where the battery voltage is applied is applied to this R1 terminal even when the switch SW1 is turned off, The voltage rises when the battery pack is inserted, and the high voltage is already applied when the switch SW1 is turned on. On the other hand, since the potential of the part (B) is applied to the R2 terminal, the switch S
A high potential is applied after W1 is turned on, and the high voltage is slightly delayed. This is shown in Figure 3 (A).
Are illustrated in columns B and C.

Immediately after the manual power switch SW1 is turned on, the S2 terminal is high and the R2 terminal is low (FIG. 3).
(See (A) b and c). Therefore, the Q2b terminal is high, and the forced stop switch FET is never turned off. That is, the forced stop circuit 6 does not turn off the forced stop switch FET when the motor M is started, and the side of the stop circuit 2 determines whether the forced stop switch FET is turned off or remains on. After a lapse of a predetermined time after the switch SW1 is turned on, the R2 terminal also becomes high, but even if the R2 terminal becomes high, the Q2b terminal continues to be high.

When the battery voltage drops due to an overload during the rotation of the motor M, VM <VC, and the second comparator circuit CM2 is turned off as described above, the S2 terminal is low, and R2 is low.
The terminal goes high. As a result, Q2b of the second latch circuit 8
The terminal is turned off, and the forced stop switch FET is turned off (see Fig. 3 (A) C → D). As a result, it is possible to prevent the DC motor M from being continuously energized with the DC motor M being overloaded and being damaged.

When the forced stop switch FET is turned off,
The battery voltage rises and the second comparison circuit CM2 goes high.
However, even if it becomes high, the forced stop switch FET remains off, and the motor M is not energized again in the overloaded state. In this case, the manual power switch S for operation once
When W1 is turned off, the electric charge of the capacitor C3 is discharged through the resistor, so that the R2 terminal becomes low and the Q2b terminal of the second latch circuit 8 becomes high. Therefore, when the manual power switch SW1 for operation is turned on again, the motor M starts to move again. At this time, if the remaining capacity of the battery is sufficient, the forced stop circuit 2 does not forcibly stop the DC motor M, and if the overload condition is resolved, the forced stop circuit 6 forcibly stops the DC motor M. Nor. In the above embodiments, the field effect transistor FET is used as the switch for the forced stop. However, the invention is not limited to this, and a relay or a bipolar transistor can be used.

[0028]

According to the present invention, regardless of the state of the DC power supply, the energization of the motor is forcibly stopped almost in response to the lock of the DC motor. It is effectively prevented that possible work is interrupted or that the motor is damaged too late.

[Brief description of drawings]

FIG. 1 is a diagram schematically showing the concept of the present invention.

FIG. 2 is a circuit diagram of an embodiment.

FIG. 3 is an explanatory view of the operation of the embodiment.

FIG. 4 is an explanatory view of the operation of the embodiment.

FIG. 5 is a diagram illustrating a conventional technique.

[Explanation of symbols]

 FET: forced stop switch D1, diode: voltage drop circuit C4 (capacitor), R3 (resistance): delay circuit

Claims (1)

[Claims] 1. A DC motor overload prevention circuit added to a series circuit of a DC power supply, a DC motor, and a forced stop switch, wherein a voltage drop for decreasing a voltage VM corresponding to a voltage applied to the DC motor by a predetermined voltage. Circuit, a delay circuit for delaying the change of the output voltage of the voltage drop circuit, and the output voltage Vc of the delay circuit are input to one terminal, the voltage VM is input to the other terminal, and when VM <VC A DC motor overload prevention circuit including a comparison circuit for turning off the forced stop switch.