JPH08186196A - Semiconductor device mounting structure - Google Patents

Abstract

(57) [Abstract] [Purpose] In a PGA type semiconductor device mounting structure, the number of terminals, which is half the number of pads of a semiconductor chip, is P
It is possible to reduce the size and density of a GA type semiconductor package. [Structure] Pad of semiconductor chip 21 and wiring pattern 1
Substrate 1 in which wires 5 and 17 are connected to wires 22 and 23
1, 12, 13 have four-layer wiring patterns 14, 15,
Substrates 11, 12, and 13 are provided with multi-structured connection terminals 1 formed by forming the terminals 17 and 18 and penetrating the rod-shaped terminals 4 through the cylindrical insulator 3 in the cylindrical terminals 2. That is, the cylindrical terminal 2 is provided in the through hole 16 portion of the two-layer wiring patterns 14 and 15.
And the rod-shaped terminals 4 are connected to the through holes 19 of the other two wiring patterns 17 and 18, respectively. Then, the multiple structure connection terminal 1 is provided with wiring patterns 32, 3 on both front and back surfaces.
3 is connected to the circuit board 31. That is, the circuit board 3
The cylindrical terminal 2 is connected to the wiring pattern 32 on the one surface side 1 and the rod-shaped terminal 4 is connected to the wiring pattern 33 on the other surface side.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device mounting structure.

[0002]

2. Description of the Related Art IC (Integrated Circuit)
unit: integrated circuit) or LSI (Large Scale)
Integration: A PGA (pin grid array) type is one of the mounting techniques for semiconductor devices such as large-scale integrated circuits. FIG. 5 shows a conventional PGA type LSI.
1 shows an example structure of a package, which is an input / output pad (not shown) of an LSI chip 52 mounted on a substrate 51.
And the wiring patterns 53, 53, 5 formed on the substrate 51.
, Are connected to each other by wires 54, 54, 54 ,.
Terminal pins 55, 55, 5 corresponding to 3, 53, 53, ...
5, ... are provided. The LSI chip 52, the wiring patterns 53, 53, 53, ... And the wires 54, 54, 54, ... On the substrate 51 are sealed with an insulating resin 56. As described above, the conventional PGA type LSI package has the number of terminal pins 55, 55, 55, ... Corresponding to the number of input / output pads of the LSI chip 52 on a one-to-one basis.

[0003]

As described above, the conventional PGA type LSI package requires the same number of terminal pins 55, 55, 55, ... As the number of input / output pads of the LSI chip 52. Therefore, if the number of terminals of the LSI increases, the number of terminal pins also increases, which causes the package to become large. Therefore, it is difficult to reduce the size and density of the PGA type LSI package.

An object of the present invention is to make a PGA type semiconductor package compact and highly dense in a PGA type semiconductor device mounting structure with the number of terminals being half the number of pads of a semiconductor chip. is there.

[0005]

In order to solve the above-mentioned problems, the invention according to claim 1 is a mounting structure of a semiconductor device having a connection terminal on a substrate in which a pad of a semiconductor chip and a wiring pattern are connected by a wire. The wiring pattern having a multilayer structure is formed on the substrate, and the substrate is provided with a multi-structured connection terminal formed by penetrating a rod-shaped terminal through a tubular insulator in the tubular terminal. The structure is characterized in that the cylindrical terminal is connected to at least one layer of the pattern and the rod-shaped terminal is connected to another layer of the wiring pattern.

The invention according to claim 2 is the same as claim 1.
In the invention described above, the wiring pattern has a structure of at least three layers or more, two layers of which are connected at a through hole portion of the substrate, and at the through hole portion, the cylindrical terminal or the rod terminal. It is characterized by a configuration in which any one of them is connected.

Further, the invention according to claim 3 is the same as claim 1
Alternatively, in the invention described in 2, the multiple structure connection terminal is connected to a circuit board having wiring patterns on both front and back surfaces,
In addition, the tubular terminal is connected to the wiring pattern on one surface side of the circuit board, and the rod-shaped terminal is connected to the wiring pattern on the other surface side of the circuit board.

[0008]

According to the first aspect of the present invention, a multi-structured connection terminal is formed by penetrating a rod-shaped terminal through a cylindrical insulator in a substrate on which a wiring pattern having a multilayer structure is formed. And connecting the cylindrical terminal to at least one wiring pattern layer and connecting the rod-shaped terminal to another wiring pattern layer. Since it becomes possible to connect two terminals, the number of terminals is half the number of pads of the semiconductor chip.

According to the second aspect of the present invention, by connecting either the cylindrical terminal or the rod terminal at the through hole portion of the substrate to which the two wiring pattern layers are connected, three or more layers are formed. It can also be applied to the case of a PGA type semiconductor package having a multilayer wiring pattern.

Further, according to the invention of claim 3, by connecting the cylindrical terminal to the wiring pattern on one side of the circuit board and connecting the rod-shaped terminal to the wiring pattern on the other side of the circuit board, By connecting the multi-structure connection terminals, the PGA type semiconductor package having the wiring pattern of the multilayer structure can be connected to the circuit board having the wiring patterns on both front and back surfaces.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the mounting structure of a semiconductor device according to the present invention will be described below with reference to FIGS. First, FIG. 1 shows a structure of a multiple structure connection terminal 1 used for a mounting structure of a semiconductor device according to the present invention.
Is a cylindrical insulator, and 4 is a rod-shaped terminal. That is, the multiple structure connection terminal 1 is formed by penetrating a rod-shaped terminal 4 made of a conductive metal into a tubular terminal 2 made of a conductive metal via a cylindrical insulator 3 made of an electrically insulating material. The terminal 2 and the tubular insulator 3 have substantially the same length, and the rod-shaped terminal 4 has a length protruding from the tubular terminal 2 to the upper and lower sides by a predetermined amount. A flange 5 is formed on the outer circumference of the cylindrical terminal 2.

FIG. 2 shows an example of the structure of a PGA type LSI package 10 using the above-mentioned multiple structure connection terminal 1. This LSI package 10 has three layers of substrates 11 and 1.
2 and 13 have four layers of wiring patterns 14, 15, 17, 18
Are stacked. This four-layer wiring pattern 14, 15,
The first and second wiring patterns 17 and 18 connect the first wiring pattern 14 and the second wiring pattern 15 formed on both front and back surfaces of the first substrate 11 by through holes 16.
Third wiring pattern 17 and third substrate 1 formed on
The fourth wiring pattern 18 formed on the third substrate 3 is connected by the through hole 19 of the third substrate 13. The through hole 19 of the third substrate 13 is formed on the same center line as the through hole 16 of the first substrate 11.

Then, as shown in FIG. 4, the first substrate 1
I / O pads (not shown) of the LSI chip 21 mounted on the first substrate 1 and the wiring patterns 15 and 1 on the first substrate 11.
, 15 are connected by wires 22, 22, 22, ..
Other input / output pads (not shown) and the wiring patterns 17, 17, 17, ... On the second substrate 12 are connected to the wire 2
3, 23, 23, ... Connected respectively. Further, the LSI chip 21 on the first substrate 11, the wiring patterns 15, 15, 15, ..., The wiring patterns 17, 17, 17, ... On the second substrate 12, and the wires 22, 22, 2.
2, ..., Wires 23, 23, 23 ,.
It is sealed by.

In the above structure, as shown in FIG.
While inserting the cylindrical terminal 2 of the multiple structure connection terminal 1 into the through hole 16 of the first substrate 11, the second substrate 12
And the cylindrical insulator 3 is inserted into the through hole 19 of the third substrate 13 through. Here, the cylindrical terminal 2 is in a state where the upper end is abutted against the lower surface of the second substrate 12 and the flange 5 on the outer periphery is overlapped with the lower surface of the first wiring pattern 14, as shown in the figure. Further, the rod-shaped terminal 4 is in a state in which the upper end thereof slightly protrudes from the fourth wiring pattern 18 on the third substrate 13.

Then, the flange 5 on the outer periphery of the cylindrical terminal 2 is connected to the first wiring pattern 14 by the solder 6, and the upper end of the rod-shaped terminal 4 is connected to the fourth wiring pattern 18 by the solder 7. A PGA type LSI package 10 is configured. From the above, as shown in FIG.
PGA provided with a large number of multi-structured connection terminals 1 each including the wiring pattern 15 and the third wiring pattern 17
It becomes a die LSI package 10. In FIG. 4, dummy wiring patterns 15, which are not actually used,
17 and the multi-structure connection terminal 1 are connected to 15 ', 17',
They are indicated by 1 '.

FIG. 3 shows an example of the structure of connecting the PGA type LSI package 10 to the circuit board having the above-described structure. The circuit board 31 has wiring patterns 32 and 33 formed on both front and back surfaces thereof. ing. The lower end of the rod-shaped terminal 4 of the multi-structured connection terminal 1 provided in the PGA type LSI package 10 penetrates through the circuit board 31. Here, as shown in the figure, the cylindrical terminal 2 is in a state where the lower end is abutted against the upper surface of the circuit board 31 and the wiring pattern 32 on the upper surface is in contact with the periphery thereof. In addition, the bar-shaped terminal 4 has a lower end of the wiring pattern 3 on the lower surface of the circuit board 31.
It is in a state of slightly protruding from the number three.

Then, the lower end of the rod-shaped terminal 4 is connected to the wiring pattern 33 by the solder 34, and the lower end of the cylindrical terminal 2 is connected to the wiring pattern 32 by the solder 35, whereby the PGA type LSI package 10 is connected to the circuit board. Connect to 31. As described above, the PGA type LSI package 1
By using the multiple structure connection terminal 1 for 0, two pads of the LSI chip 21 can be handled by one multiple structure connection terminal 1, so that the PGA type LSI package 10 can be miniaturized and mounted at high density. You can

In the above embodiments, the mounting structure of the LSI is used, but the present invention is not limited to this, and a mounting structure of another semiconductor device such as an IC may be used. In addition, it is needless to say that the specific detailed structure and the like can be appropriately changed.

[0019]

As described above, according to the semiconductor device mounting structure of the first aspect of the present invention, the cylindrical insulator is provided in the cylindrical terminal for the substrate having the wiring pattern of the multilayer structure. A PGA-type semiconductor for assembling a multi-structured connection terminal penetrating the rod-shaped terminal through the connection, connecting the cylindrical terminal to at least one wiring pattern layer, and connecting the rod-shaped terminal to another wiring pattern layer. In the package, one of the multiple structure connection terminals can be connected to two terminals, and the number of terminals can be half the number of pads of the semiconductor chip. Therefore, miniaturization and high density of the PGA type semiconductor package can be achieved.

According to the semiconductor device mounting structure of the second aspect of the invention, either the cylindrical terminal or the rod terminal is connected in the through hole portion of the substrate to which the two wiring pattern layers are connected. Therefore, it can be applied to the case of a PGA type semiconductor package having a wiring pattern of a multilayer structure of three layers or more.

Further, according to the mounting structure of the semiconductor device of the third aspect of the present invention, the circuit board is provided with the cylindrical terminals in the wiring pattern on the one surface side and the rod terminals in the wiring pattern on the other surface side. Since the connection is made and the connection terminals of the multiple structure are connected, the PGA type semiconductor package having the wiring pattern of the multilayer structure can be connected to the circuit board having the wiring patterns on both front and back surfaces.

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional side view showing a structure of a multiple structure connection terminal used for a mounting structure of a semiconductor device according to the present invention.

FIG. 2 is a PGA type LS as an example to which the present invention is applied.
It is a principal part longitudinal cross-sectional view which showed the structure of I package.

FIG. 3 is a vertical sectional side view of an essential part showing an example of a connection structure of the LSI package of FIG. 2 to a circuit board.

FIG. 4 is a schematic plan view of an essential part of the LSI package of FIG. 2 as viewed from above.

FIG. 5 is a vertical sectional side view of a main part showing an example structure of a conventional PGA type LSI package.

[Explanation of symbols]

 1 Multiple Structure Connection Terminal 2 Cylindrical Terminal 3 Cylindrical Insulator 4 Rod Terminal 5 Flange 6,7 Solder 10 LSI Package 11,12,13 Substrate 14,15,17,18 Wiring Pattern 16,19 Through Hole 21 Semiconductor Chip 22 , 23 wire 24 insulating resin 31 circuit board 32, 33 wiring pattern 34, 35 solder

Claims (3)

[Claims] 1. A mounting structure of a semiconductor device, comprising a connection terminal on a substrate in which a pad of a semiconductor chip and a wiring pattern are connected by a wire, wherein the wiring pattern having a multilayer structure is formed on the substrate, and a cylindrical terminal is provided. The substrate is provided with a multi-structured connection terminal formed by penetrating a rod-shaped terminal through a tubular insulator, and the tubular terminal is connected to at least one layer of the wiring pattern to obtain the wiring pattern. A mounting structure for a semiconductor device, wherein the rod-shaped terminal is connected to another layer of the semiconductor device. 2. The wiring pattern has a structure of at least three layers or more, two layers of which are connected at a through hole portion of the substrate, and the cylindrical terminal or the rod terminal is formed at the through hole portion. 2. The mounting structure for a semiconductor device according to claim 1, wherein any one of the above is connected. 3. A circuit board having wiring patterns on both front and back surfaces, the multi-structured connection terminals are connected, and the cylindrical terminals are connected to the wiring pattern on one surface side of the circuit board. The semiconductor device mounting structure according to claim 1, wherein the rod-shaped terminal is connected to the wiring pattern on the other surface side.